Lines Matching defs:ath11k_hw_regs
347 struct ath11k_hw_regs { struct
348 u32 hal_tcl1_ring_base_lsb;
349 u32 hal_tcl1_ring_base_msb;
350 u32 hal_tcl1_ring_id;
351 u32 hal_tcl1_ring_misc;
352 u32 hal_tcl1_ring_tp_addr_lsb;
353 u32 hal_tcl1_ring_tp_addr_msb;
354 u32 hal_tcl1_ring_consumer_int_setup_ix0;
355 u32 hal_tcl1_ring_consumer_int_setup_ix1;
356 u32 hal_tcl1_ring_msi1_base_lsb;
357 u32 hal_tcl1_ring_msi1_base_msb;
358 u32 hal_tcl1_ring_msi1_data;
359 u32 hal_tcl2_ring_base_lsb;
360 u32 hal_tcl_ring_base_lsb;
362 u32 hal_tcl_status_ring_base_lsb;
364 u32 hal_reo1_ring_base_lsb;
365 u32 hal_reo1_ring_base_msb;
366 u32 hal_reo1_ring_id;
367 u32 hal_reo1_ring_misc;
368 u32 hal_reo1_ring_hp_addr_lsb;
369 u32 hal_reo1_ring_hp_addr_msb;
370 u32 hal_reo1_ring_producer_int_setup;
371 u32 hal_reo1_ring_msi1_base_lsb;
372 u32 hal_reo1_ring_msi1_base_msb;
373 u32 hal_reo1_ring_msi1_data;
374 u32 hal_reo2_ring_base_lsb;
375 u32 hal_reo1_aging_thresh_ix_0;
376 u32 hal_reo1_aging_thresh_ix_1;
377 u32 hal_reo1_aging_thresh_ix_2;
378 u32 hal_reo1_aging_thresh_ix_3;
380 u32 hal_reo1_ring_hp;
381 u32 hal_reo1_ring_tp;
382 u32 hal_reo2_ring_hp;
384 u32 hal_reo_tcl_ring_base_lsb;
385 u32 hal_reo_tcl_ring_hp;
387 u32 hal_reo_status_ring_base_lsb;
388 u32 hal_reo_status_hp;
390 u32 hal_reo_cmd_ring_base_lsb;
391 u32 hal_reo_cmd_ring_hp;
416 extern const struct ath11k_hw_regs ipq8074_regs; argument