3210 		    arvif->rate_ctrl[i] || arvif->rtscts[i]) {  in ath10k_new_peer_tid_config()
3216 			arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_new_peer_tid_config()
3230 			arg.rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_DEFAULT_LOWEST_RATE;  in ath10k_new_peer_tid_config()
7007 			      u32 *rate_ctrl_flag, u8 *rate_ctrl,  in ath10k_mac_tid_bitrate_config()  argument
7020 		*rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_AUTO;  in ath10k_mac_tid_bitrate_config()
7046 		*rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_FIXED_RATE;  in ath10k_mac_tid_bitrate_config()
7050 		*rate_ctrl = WMI_PEER_TID_CONFIG_RATE_UPPER_CAP;  in ath10k_mac_tid_bitrate_config()
7080 				arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7097 				arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7113 			arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7129 			arsta->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
7130 			arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7149 				arvif->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
7173 				arvif->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
7214 				arg->rate_ctrl =  in ath10k_mac_parse_tid_config()
7221 				arg->rate_ctrl =  in ath10k_mac_parse_tid_config()
7242 							    &arg->rate_ctrl,  in ath10k_mac_parse_tid_config()
7249 				arg->rate_ctrl = 0;  in ath10k_mac_parse_tid_config()
7288 		arg.rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_AUTO;  in ath10k_mac_reset_tid_config()
7304 			arsta->rate_ctrl[i] = 0;  in ath10k_mac_reset_tid_config()
7311 			arvif->rate_ctrl[i] = 0;  in ath10k_mac_reset_tid_config()
7359 				arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_sta_tid_cfg_wk()
7392 			    arvif->rate_ctrl[i] > WMI_TID_CONFIG_RATE_CONTROL_AUTO) {  in ath10k_sta_tid_cfg_wk()
7393 				arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()
7397 			if (arsta->rate_ctrl[i] >  in ath10k_sta_tid_cfg_wk()
7401 				arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()
7404 				arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_sta_tid_cfg_wk()
7434 		arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()