209 int xpcs_write(struct dw_xpcs *xpcs, int dev, u32 reg, u16 val)  in xpcs_write()  function
228 	return xpcs_write(xpcs, dev, DW_VENDOR | reg, val);  in xpcs_write_vendor()
299 	ret = xpcs_write(xpcs, dev, MDIO_CTRL1, MDIO_CTRL1_RESET);  in xpcs_soft_reset()
403 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, ret);  in xpcs_config_usxgmii()
439 	ret = xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV3, adv);  in _xpcs_config_aneg_c73()
452 	ret = xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV2, adv);  in _xpcs_config_aneg_c73()
463 	return xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV1, adv);  in _xpcs_config_aneg_c73()
481 	return xpcs_write(xpcs, MDIO_MMD_AN, MDIO_CTRL1, ret);  in xpcs_config_aneg_c73()
666 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0, ret);  in xpcs_config_eee()
679 	return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1, ret);  in xpcs_config_eee()
712 		ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL,  in xpcs_config_aneg_c37_sgmii()
735 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL, ret);  in xpcs_config_aneg_c37_sgmii()
751 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);  in xpcs_config_aneg_c37_sgmii()
756 		ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL,  in xpcs_config_aneg_c37_sgmii()
783 		ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL,  in xpcs_config_aneg_c37_1000basex()
796 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL, ret);  in xpcs_config_aneg_c37_1000basex()
815 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0);  in xpcs_config_aneg_c37_1000basex()
820 		ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL,  in xpcs_config_aneg_c37_1000basex()
838 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);  in xpcs_config_2500basex()
848 	return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, ret);  in xpcs_config_2500basex()
1052 		xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0);  in xpcs_get_state_c37_sgmii()
1083 				xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, an_intr);  in xpcs_get_state_c37_1000basex()
1144 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, val);  in xpcs_link_up_sgmii()
1173 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, val);  in xpcs_link_up_1000basex()
1200 		xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, ret);  in xpcs_an_restart()