202 	iowrite32(val, gsi->virt + reg_offset(reg));  in gsi_irq_type_update()
230 	iowrite32(~0, gsi->virt + reg_offset(reg));  in gsi_irq_ev_ctrl_enable()
233 	iowrite32(val, gsi->virt + reg_offset(reg));  in gsi_irq_ev_ctrl_enable()
245 	iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_irq_ev_ctrl_disable()
263 	iowrite32(~0, gsi->virt + reg_offset(reg));  in gsi_irq_ch_ctrl_enable()
266 	iowrite32(val, gsi->virt + reg_offset(reg));  in gsi_irq_ch_ctrl_enable()
279 	iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_irq_ch_ctrl_disable()
292 	iowrite32(val, gsi->virt + reg_offset(reg));  in gsi_irq_ieob_enable_one()
312 	iowrite32(val, gsi->virt + reg_offset(reg));  in gsi_irq_ieob_disable()
330 	iowrite32(ERROR_INT, gsi->virt + reg_offset(reg));  in gsi_irq_enable()
343 	iowrite32(val, gsi->virt + reg_offset(reg));  in gsi_irq_enable()
357 	iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_irq_disable()
360 	iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_irq_disable()
367 	return ring->virt + (index % ring->count) * GSI_RING_ELEMENT_SIZE;  in gsi_ring_virt()
393 	iowrite32(val, gsi->virt + reg);  in gsi_command()
405 	val = ioread32(gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_state()
516 	void __iomem *virt = gsi->virt;  in gsi_channel_state()  local
520 	val = ioread32(virt + reg_n_offset(reg, channel_id));  in gsi_channel_state()
714 	iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_doorbell()
731 	iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_program()
735 	iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_program()
743 	iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_program()
747 	iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_program()
754 	iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_program()
758 	iowrite32(0, gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_program()
761 	iowrite32(0, gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_program()
764 	iowrite32(0, gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_program()
768 	iowrite32(0, gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_program()
771 	iowrite32(0, gsi->virt + reg_n_offset(reg, evt_ring_id));  in gsi_evt_ring_program()
846 	iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));  in gsi_channel_program()
852 	iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));  in gsi_channel_program()
860 	iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));  in gsi_channel_program()
864 	iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));  in gsi_channel_program()
893 	iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));  in gsi_channel_program()
903 	iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));  in gsi_channel_program()
907 	iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));  in gsi_channel_program()
911 	iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));  in gsi_channel_program()
919 	val = ioread32(gsi->virt + offset);  in gsi_channel_program()
921 	iowrite32(val, gsi->virt + offset);  in gsi_channel_program()
1141 	channel_mask = ioread32(gsi->virt + reg_offset(reg));  in gsi_isr_chan_ctrl()
1144 	iowrite32(channel_mask, gsi->virt + reg_offset(reg));  in gsi_isr_chan_ctrl()
1162 	event_mask = ioread32(gsi->virt + reg_offset(reg));  in gsi_isr_evt_ctrl()
1165 	iowrite32(event_mask, gsi->virt + reg_offset(reg));  in gsi_isr_evt_ctrl()
1225 	val = ioread32(gsi->virt + offset);  in gsi_isr_glob_err()
1226 	iowrite32(0, gsi->virt + offset);  in gsi_isr_glob_err()
1229 	iowrite32(~0, gsi->virt + reg_offset(clr_reg));  in gsi_isr_glob_err()
1272 	val = ioread32(gsi->virt + reg_offset(reg));  in gsi_isr_gp_int1()
1301 	val = ioread32(gsi->virt + reg_offset(reg));  in gsi_isr_glob_ee()
1307 	iowrite32(val, gsi->virt + reg_offset(reg));  in gsi_isr_glob_ee()
1327 	event_mask = ioread32(gsi->virt + reg_offset(reg));  in gsi_isr_ieob()
1332 	iowrite32(event_mask, gsi->virt + reg_offset(reg));  in gsi_isr_ieob()
1351 	val = ioread32(gsi->virt + reg_offset(reg));  in gsi_isr_general()
1354 	iowrite32(val, gsi->virt + reg_offset(reg));  in gsi_isr_general()
1379 	while ((intr_mask = ioread32(gsi->virt + offset))) {  in gsi_isr()
1546 	ring->virt = dma_alloc_coherent(dev, size, &addr, GFP_KERNEL);  in gsi_ring_alloc()
1547 	if (!ring->virt)  in gsi_ring_alloc()
1562 	dma_free_coherent(gsi->dev, size, ring->virt, ring->addr);  in gsi_ring_free()
1599 	iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));  in gsi_channel_doorbell()
1622 	index = gsi_ring_index(ring, ioread32(gsi->virt + offset));  in gsi_channel_update()
1788 	iowrite32(val, gsi->virt + reg_offset(reg));  in gsi_generic_command()
1793 	val = ioread32(gsi->virt + offset);  in gsi_generic_command()
1796 	iowrite32(val, gsi->virt + offset);  in gsi_generic_command()
1810 	iowrite32(ERROR_INT, gsi->virt + reg_offset(reg));  in gsi_generic_command()
1972 	iowrite32(reg_bit(reg, INTYPE), gsi->virt + reg_offset(reg));  in gsi_irq_setup()
1979 	iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_irq_setup()
1982 	iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_irq_setup()
1985 	iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_irq_setup()
1988 	iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_irq_setup()
1993 		iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_irq_setup()
1996 		iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_irq_setup()
2000 	iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_irq_setup()
2031 	val = ioread32(gsi->virt + reg_offset(reg));  in gsi_ring_setup()
2075 	val = ioread32(gsi->virt + reg_offset(reg));  in gsi_setup()
2091 	iowrite32(0, gsi->virt + reg_offset(reg));  in gsi_setup()