41 static int ef100_pci_walk_xilinx_table(struct efx_nic *efx, u64 offset,
50 static u32 _ef100_pci_get_bar_bits_with_width(struct efx_nic *efx,  in _ef100_pci_get_bar_bits_with_width()  argument
56 	efx_readd(efx, &dword, structure_start + ROUND_DOWN_TO_DWORD(lbn));  in _ef100_pci_get_bar_bits_with_width()
61 #define ef100_pci_get_bar_bits(efx, entry_location, bitdef)	\  argument
62 	_ef100_pci_get_bar_bits_with_width(efx, entry_location,	\
66 static int ef100_pci_parse_ef100_entry(struct efx_nic *efx, int entry_location,  in ef100_pci_parse_ef100_entry()  argument
69 	u64 offset = ef100_pci_get_bar_bits(efx, entry_location, EF100_FUNC_CTL_WIN_OFF) <<  in ef100_pci_parse_ef100_entry()
71 	u32 bar = ef100_pci_get_bar_bits(efx, entry_location, EF100_BAR);  in ef100_pci_parse_ef100_entry()
73 	netif_dbg(efx, probe, efx->net_dev,  in ef100_pci_parse_ef100_entry()
78 		netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_ef100_entry()
85 		netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_ef100_entry()
97 static bool ef100_pci_does_bar_overflow(struct efx_nic *efx, int bar,  in ef100_pci_does_bar_overflow()  argument
101 					pci_resource_len(efx->pci_dev, bar);  in ef100_pci_does_bar_overflow()
107 static int ef100_pci_parse_continue_entry(struct efx_nic *efx, int entry_location,  in ef100_pci_parse_continue_entry()  argument
116 	efx_reado(efx, &entry, entry_location);  in ef100_pci_parse_continue_entry()
123 	previous_bar = efx->mem_bar;  in ef100_pci_parse_continue_entry()
127 		netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_continue_entry()
134 		efx_fini_io(efx);  in ef100_pci_parse_continue_entry()
136 		if (ef100_pci_does_bar_overflow(efx, bar, offset)) {  in ef100_pci_parse_continue_entry()
137 			netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_continue_entry()
144 		rc = efx_init_io(efx, bar,  in ef100_pci_parse_continue_entry()
146 				 pci_resource_len(efx->pci_dev, bar));  in ef100_pci_parse_continue_entry()
148 			netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_continue_entry()
154 	rc = ef100_pci_walk_xilinx_table(efx, offset, result);  in ef100_pci_parse_continue_entry()
159 		efx_fini_io(efx);  in ef100_pci_parse_continue_entry()
162 		rc = efx_init_io(efx, previous_bar,  in ef100_pci_parse_continue_entry()
164 				 pci_resource_len(efx->pci_dev, previous_bar));  in ef100_pci_parse_continue_entry()
166 			netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_continue_entry()
179 static int ef100_pci_walk_xilinx_table(struct efx_nic *efx, u64 offset,  in ef100_pci_walk_xilinx_table()  argument
186 		u32 id = ef100_pci_get_bar_bits(efx, current_entry, ENTRY_FORMAT);  in ef100_pci_walk_xilinx_table()
187 		u32 last = ef100_pci_get_bar_bits(efx, current_entry, ENTRY_LAST);  in ef100_pci_walk_xilinx_table()
188 		u32 rev = ef100_pci_get_bar_bits(efx, current_entry, ENTRY_REV);  in ef100_pci_walk_xilinx_table()
194 		entry_size = ef100_pci_get_bar_bits(efx, current_entry, ENTRY_SIZE);  in ef100_pci_walk_xilinx_table()
196 		netif_dbg(efx, probe, efx->net_dev,  in ef100_pci_walk_xilinx_table()
198 			  id, entry_size, current_entry, efx->mem_bar);  in ef100_pci_walk_xilinx_table()
201 			netif_err(efx, probe, efx->net_dev,  in ef100_pci_walk_xilinx_table()
210 				netif_err(efx, probe, efx->net_dev,  in ef100_pci_walk_xilinx_table()
216 			rc = ef100_pci_parse_ef100_entry(efx, current_entry,  in ef100_pci_walk_xilinx_table()
223 				netif_err(efx, probe, efx->net_dev,  in ef100_pci_walk_xilinx_table()
229 			rc = ef100_pci_parse_continue_entry(efx, current_entry, result);  in ef100_pci_walk_xilinx_table()
243 		if (ef100_pci_does_bar_overflow(efx, efx->mem_bar, current_entry)) {  in ef100_pci_walk_xilinx_table()
244 			netif_err(efx, probe, efx->net_dev,  in ef100_pci_walk_xilinx_table()
252 static int _ef100_pci_get_config_bits_with_width(struct efx_nic *efx,  in _ef100_pci_get_config_bits_with_width()  argument
259 	rc = pci_read_config_dword(efx->pci_dev, pos, &temp);  in _ef100_pci_get_config_bits_with_width()
261 		netif_err(efx, probe, efx->net_dev,  in _ef100_pci_get_config_bits_with_width()
272 #define ef100_pci_get_config_bits(efx, entry_location, bitdef, result)	\  argument
273 	_ef100_pci_get_config_bits_with_width(efx, entry_location,	\
280 static int ef100_pci_parse_xilinx_cap(struct efx_nic *efx, int vndr_cap,  in ef100_pci_parse_xilinx_cap()  argument
290 	rc = ef100_pci_get_config_bits(efx, vndr_cap, TBL_BAR, &bar);  in ef100_pci_parse_xilinx_cap()
292 		netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_xilinx_cap()
300 		netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_xilinx_cap()
306 	rc = ef100_pci_get_config_bits(efx, vndr_cap, TBL_OFF_LO, &offset_lo);  in ef100_pci_parse_xilinx_cap()
308 		netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_xilinx_cap()
316 		rc = ef100_pci_get_config_bits(efx, vndr_cap, TBL_OFF_HI, &offset_high);  in ef100_pci_parse_xilinx_cap()
318 			netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_xilinx_cap()
328 	if (offset > pci_resource_len(efx->pci_dev, bar) - sizeof(u32) * 2) {  in ef100_pci_parse_xilinx_cap()
329 		netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_xilinx_cap()
336 	rc = efx_init_io(efx, bar,  in ef100_pci_parse_xilinx_cap()
338 			 pci_resource_len(efx->pci_dev, bar));  in ef100_pci_parse_xilinx_cap()
340 		netif_err(efx, probe, efx->net_dev,  in ef100_pci_parse_xilinx_cap()
345 	rc = ef100_pci_walk_xilinx_table(efx, offset, result);  in ef100_pci_parse_xilinx_cap()
348 	efx_fini_io(efx);  in ef100_pci_parse_xilinx_cap()
355 static int ef100_pci_find_func_ctrl_window(struct efx_nic *efx,  in ef100_pci_find_func_ctrl_window()  argument
363 	while ((cap = pci_find_next_ext_capability(efx->pci_dev, cap, PCI_EXT_CAP_ID_VNDR)) != 0) {  in ef100_pci_find_func_ctrl_window()
372 		rc = ef100_pci_get_config_bits(efx, vndr_cap, ID, &vsec_id);  in ef100_pci_find_func_ctrl_window()
374 			netif_err(efx, probe, efx->net_dev,  in ef100_pci_find_func_ctrl_window()
380 		rc = ef100_pci_get_config_bits(efx, vndr_cap, VER, &vsec_ver);  in ef100_pci_find_func_ctrl_window()
382 			netif_err(efx, probe, efx->net_dev,  in ef100_pci_find_func_ctrl_window()
389 		rc = ef100_pci_get_config_bits(efx, vndr_cap, LEN, &vsec_len);  in ef100_pci_find_func_ctrl_window()
391 			netif_err(efx, probe, efx->net_dev,  in ef100_pci_find_func_ctrl_window()
402 			rc = ef100_pci_parse_xilinx_cap(efx, vndr_cap,  in ef100_pci_find_func_ctrl_window()
410 		netif_err(efx, probe, efx->net_dev,  in ef100_pci_find_func_ctrl_window()
425 	struct efx_nic *efx = pci_get_drvdata(pci_dev);  in ef100_pci_remove()  local
428 	if (!efx)  in ef100_pci_remove()
431 	probe_data = container_of(efx, struct efx_probe_data, efx);  in ef100_pci_remove()
434 	efx_fini_struct_tc(efx);  in ef100_pci_remove()
437 	ef100_remove(efx);  in ef100_pci_remove()
438 	efx_fini_io(efx);  in ef100_pci_remove()
443 	efx_fini_struct(efx);  in ef100_pci_remove()
452 	struct efx_nic *efx;  in ef100_pci_probe()  local
460 	efx = &probe_data->efx;  in ef100_pci_probe()
462 	efx->type = (const struct efx_nic_type *)entry->driver_data;  in ef100_pci_probe()
464 	efx->pci_dev = pci_dev;  in ef100_pci_probe()
465 	pci_set_drvdata(pci_dev, efx);  in ef100_pci_probe()
466 	rc = efx_init_struct(efx, pci_dev);  in ef100_pci_probe()
470 	efx->vi_stride = EF100_DEFAULT_VI_STRIDE;  in ef100_pci_probe()
473 	rc = ef100_pci_find_func_ctrl_window(efx, &fcw);  in ef100_pci_probe()
488 	if (fcw.offset > pci_resource_len(efx->pci_dev, fcw.bar) - ESE_GZ_FCW_LEN) {  in ef100_pci_probe()
495 	rc = efx_init_io(efx, fcw.bar,  in ef100_pci_probe()
497 			 pci_resource_len(efx->pci_dev, fcw.bar));  in ef100_pci_probe()
501 	efx->reg_base = fcw.offset;  in ef100_pci_probe()
503 	rc = efx->type->probe(efx);  in ef100_pci_probe()
507 	efx->state = STATE_PROBED;  in ef100_pci_probe()
524 	struct efx_nic *efx = pci_get_drvdata(dev);  in ef100_pci_sriov_configure()  local
527 	if (efx->type->sriov_configure) {  in ef100_pci_sriov_configure()
528 		rc = efx->type->sriov_configure(efx, num_vfs);  in ef100_pci_sriov_configure()