Lines Matching +full:asym +full:- +full:pause
1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2019 Renesas Electronics Corporation
6 * Copyright (C) 2015-2016 Cogent Embedded, Inc. <source@cogentembedded.com>
14 #include <linux/dma-mapping.h>
66 return -ETIMEDOUT; in ravb_wait()
87 switch (priv->speed) { in ravb_set_rate_gbeth()
104 switch (priv->speed) { in ravb_set_rate_rcar()
116 u32 reserve = (unsigned long)skb->data & (RAVB_ALIGN - 1); in ravb_set_buffer_align()
119 skb_reserve(skb, RAVB_ALIGN - reserve); in ravb_set_buffer_align()
153 ravb_modify(priv->ndev, PIR, mask, set ? mask : 0); in ravb_mdio_ctrl()
180 return (ravb_read(priv->ndev, PIR) & PIR_MDI) != 0; in ravb_get_mdio_data()
192 /* Free TX skb function for AVB-IP */
196 struct net_device_stats *stats = &priv->stats[q]; in ravb_tx_free()
197 unsigned int num_tx_desc = priv->num_tx_desc; in ravb_tx_free()
203 for (; priv->cur_tx[q] - priv->dirty_tx[q] > 0; priv->dirty_tx[q]++) { in ravb_tx_free()
206 entry = priv->dirty_tx[q] % (priv->num_tx_ring[q] * in ravb_tx_free()
208 desc = &priv->tx_ring[q][entry]; in ravb_tx_free()
209 txed = desc->die_dt == DT_FEMPTY; in ravb_tx_free()
214 size = le16_to_cpu(desc->ds_tagl) & TX_DS; in ravb_tx_free()
216 if (priv->tx_skb[q][entry / num_tx_desc]) { in ravb_tx_free()
217 dma_unmap_single(ndev->dev.parent, le32_to_cpu(desc->dptr), in ravb_tx_free()
220 if (entry % num_tx_desc == num_tx_desc - 1) { in ravb_tx_free()
222 dev_kfree_skb_any(priv->tx_skb[q][entry]); in ravb_tx_free()
223 priv->tx_skb[q][entry] = NULL; in ravb_tx_free()
225 stats->tx_packets++; in ravb_tx_free()
230 stats->tx_bytes += size; in ravb_tx_free()
231 desc->die_dt = DT_EEMPTY; in ravb_tx_free()
242 if (!priv->gbeth_rx_ring) in ravb_rx_ring_free_gbeth()
245 for (i = 0; i < priv->num_rx_ring[q]; i++) { in ravb_rx_ring_free_gbeth()
246 struct ravb_rx_desc *desc = &priv->gbeth_rx_ring[i]; in ravb_rx_ring_free_gbeth()
248 if (!dma_mapping_error(ndev->dev.parent, in ravb_rx_ring_free_gbeth()
249 le32_to_cpu(desc->dptr))) in ravb_rx_ring_free_gbeth()
250 dma_unmap_single(ndev->dev.parent, in ravb_rx_ring_free_gbeth()
251 le32_to_cpu(desc->dptr), in ravb_rx_ring_free_gbeth()
255 ring_size = sizeof(struct ravb_rx_desc) * (priv->num_rx_ring[q] + 1); in ravb_rx_ring_free_gbeth()
256 dma_free_coherent(ndev->dev.parent, ring_size, priv->gbeth_rx_ring, in ravb_rx_ring_free_gbeth()
257 priv->rx_desc_dma[q]); in ravb_rx_ring_free_gbeth()
258 priv->gbeth_rx_ring = NULL; in ravb_rx_ring_free_gbeth()
267 if (!priv->rx_ring[q]) in ravb_rx_ring_free_rcar()
270 for (i = 0; i < priv->num_rx_ring[q]; i++) { in ravb_rx_ring_free_rcar()
271 struct ravb_ex_rx_desc *desc = &priv->rx_ring[q][i]; in ravb_rx_ring_free_rcar()
273 if (!dma_mapping_error(ndev->dev.parent, in ravb_rx_ring_free_rcar()
274 le32_to_cpu(desc->dptr))) in ravb_rx_ring_free_rcar()
275 dma_unmap_single(ndev->dev.parent, in ravb_rx_ring_free_rcar()
276 le32_to_cpu(desc->dptr), in ravb_rx_ring_free_rcar()
281 (priv->num_rx_ring[q] + 1); in ravb_rx_ring_free_rcar()
282 dma_free_coherent(ndev->dev.parent, ring_size, priv->rx_ring[q], in ravb_rx_ring_free_rcar()
283 priv->rx_desc_dma[q]); in ravb_rx_ring_free_rcar()
284 priv->rx_ring[q] = NULL; in ravb_rx_ring_free_rcar()
291 const struct ravb_hw_info *info = priv->info; in ravb_ring_free()
292 unsigned int num_tx_desc = priv->num_tx_desc; in ravb_ring_free()
296 info->rx_ring_free(ndev, q); in ravb_ring_free()
298 if (priv->tx_ring[q]) { in ravb_ring_free()
302 (priv->num_tx_ring[q] * num_tx_desc + 1); in ravb_ring_free()
303 dma_free_coherent(ndev->dev.parent, ring_size, priv->tx_ring[q], in ravb_ring_free()
304 priv->tx_desc_dma[q]); in ravb_ring_free()
305 priv->tx_ring[q] = NULL; in ravb_ring_free()
309 if (priv->rx_skb[q]) { in ravb_ring_free()
310 for (i = 0; i < priv->num_rx_ring[q]; i++) in ravb_ring_free()
311 dev_kfree_skb(priv->rx_skb[q][i]); in ravb_ring_free()
313 kfree(priv->rx_skb[q]); in ravb_ring_free()
314 priv->rx_skb[q] = NULL; in ravb_ring_free()
317 kfree(priv->tx_align[q]); in ravb_ring_free()
318 priv->tx_align[q] = NULL; in ravb_ring_free()
323 kfree(priv->tx_skb[q]); in ravb_ring_free()
324 priv->tx_skb[q] = NULL; in ravb_ring_free()
335 rx_ring_size = sizeof(*rx_desc) * priv->num_rx_ring[q]; in ravb_rx_ring_format_gbeth()
336 memset(priv->gbeth_rx_ring, 0, rx_ring_size); in ravb_rx_ring_format_gbeth()
338 for (i = 0; i < priv->num_rx_ring[q]; i++) { in ravb_rx_ring_format_gbeth()
340 rx_desc = &priv->gbeth_rx_ring[i]; in ravb_rx_ring_format_gbeth()
341 rx_desc->ds_cc = cpu_to_le16(GBETH_RX_DESC_DATA_SIZE); in ravb_rx_ring_format_gbeth()
342 dma_addr = dma_map_single(ndev->dev.parent, priv->rx_skb[q][i]->data, in ravb_rx_ring_format_gbeth()
348 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_rx_ring_format_gbeth()
349 rx_desc->ds_cc = cpu_to_le16(0); in ravb_rx_ring_format_gbeth()
350 rx_desc->dptr = cpu_to_le32(dma_addr); in ravb_rx_ring_format_gbeth()
351 rx_desc->die_dt = DT_FEMPTY; in ravb_rx_ring_format_gbeth()
353 rx_desc = &priv->gbeth_rx_ring[i]; in ravb_rx_ring_format_gbeth()
354 rx_desc->dptr = cpu_to_le32((u32)priv->rx_desc_dma[q]); in ravb_rx_ring_format_gbeth()
355 rx_desc->die_dt = DT_LINKFIX; /* type */ in ravb_rx_ring_format_gbeth()
362 unsigned int rx_ring_size = sizeof(*rx_desc) * priv->num_rx_ring[q]; in ravb_rx_ring_format_rcar()
366 memset(priv->rx_ring[q], 0, rx_ring_size); in ravb_rx_ring_format_rcar()
368 for (i = 0; i < priv->num_rx_ring[q]; i++) { in ravb_rx_ring_format_rcar()
370 rx_desc = &priv->rx_ring[q][i]; in ravb_rx_ring_format_rcar()
371 rx_desc->ds_cc = cpu_to_le16(RX_BUF_SZ); in ravb_rx_ring_format_rcar()
372 dma_addr = dma_map_single(ndev->dev.parent, priv->rx_skb[q][i]->data, in ravb_rx_ring_format_rcar()
378 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_rx_ring_format_rcar()
379 rx_desc->ds_cc = cpu_to_le16(0); in ravb_rx_ring_format_rcar()
380 rx_desc->dptr = cpu_to_le32(dma_addr); in ravb_rx_ring_format_rcar()
381 rx_desc->die_dt = DT_FEMPTY; in ravb_rx_ring_format_rcar()
383 rx_desc = &priv->rx_ring[q][i]; in ravb_rx_ring_format_rcar()
384 rx_desc->dptr = cpu_to_le32((u32)priv->rx_desc_dma[q]); in ravb_rx_ring_format_rcar()
385 rx_desc->die_dt = DT_LINKFIX; /* type */ in ravb_rx_ring_format_rcar()
392 const struct ravb_hw_info *info = priv->info; in ravb_ring_format()
393 unsigned int num_tx_desc = priv->num_tx_desc; in ravb_ring_format()
396 unsigned int tx_ring_size = sizeof(*tx_desc) * priv->num_tx_ring[q] * in ravb_ring_format()
400 priv->cur_rx[q] = 0; in ravb_ring_format()
401 priv->cur_tx[q] = 0; in ravb_ring_format()
402 priv->dirty_rx[q] = 0; in ravb_ring_format()
403 priv->dirty_tx[q] = 0; in ravb_ring_format()
405 info->rx_ring_format(ndev, q); in ravb_ring_format()
407 memset(priv->tx_ring[q], 0, tx_ring_size); in ravb_ring_format()
409 for (i = 0, tx_desc = priv->tx_ring[q]; i < priv->num_tx_ring[q]; in ravb_ring_format()
411 tx_desc->die_dt = DT_EEMPTY; in ravb_ring_format()
414 tx_desc->die_dt = DT_EEMPTY; in ravb_ring_format()
417 tx_desc->dptr = cpu_to_le32((u32)priv->tx_desc_dma[q]); in ravb_ring_format()
418 tx_desc->die_dt = DT_LINKFIX; /* type */ in ravb_ring_format()
421 desc = &priv->desc_bat[RX_QUEUE_OFFSET + q]; in ravb_ring_format()
422 desc->die_dt = DT_LINKFIX; /* type */ in ravb_ring_format()
423 desc->dptr = cpu_to_le32((u32)priv->rx_desc_dma[q]); in ravb_ring_format()
426 desc = &priv->desc_bat[q]; in ravb_ring_format()
427 desc->die_dt = DT_LINKFIX; /* type */ in ravb_ring_format()
428 desc->dptr = cpu_to_le32((u32)priv->tx_desc_dma[q]); in ravb_ring_format()
436 ring_size = sizeof(struct ravb_rx_desc) * (priv->num_rx_ring[q] + 1); in ravb_alloc_rx_desc_gbeth()
438 priv->gbeth_rx_ring = dma_alloc_coherent(ndev->dev.parent, ring_size, in ravb_alloc_rx_desc_gbeth()
439 &priv->rx_desc_dma[q], in ravb_alloc_rx_desc_gbeth()
441 return priv->gbeth_rx_ring; in ravb_alloc_rx_desc_gbeth()
449 ring_size = sizeof(struct ravb_ex_rx_desc) * (priv->num_rx_ring[q] + 1); in ravb_alloc_rx_desc_rcar()
451 priv->rx_ring[q] = dma_alloc_coherent(ndev->dev.parent, ring_size, in ravb_alloc_rx_desc_rcar()
452 &priv->rx_desc_dma[q], in ravb_alloc_rx_desc_rcar()
454 return priv->rx_ring[q]; in ravb_alloc_rx_desc_rcar()
461 const struct ravb_hw_info *info = priv->info; in ravb_ring_init()
462 unsigned int num_tx_desc = priv->num_tx_desc; in ravb_ring_init()
468 priv->rx_skb[q] = kcalloc(priv->num_rx_ring[q], in ravb_ring_init()
469 sizeof(*priv->rx_skb[q]), GFP_KERNEL); in ravb_ring_init()
470 priv->tx_skb[q] = kcalloc(priv->num_tx_ring[q], in ravb_ring_init()
471 sizeof(*priv->tx_skb[q]), GFP_KERNEL); in ravb_ring_init()
472 if (!priv->rx_skb[q] || !priv->tx_skb[q]) in ravb_ring_init()
475 for (i = 0; i < priv->num_rx_ring[q]; i++) { in ravb_ring_init()
476 skb = __netdev_alloc_skb(ndev, info->max_rx_len, GFP_KERNEL); in ravb_ring_init()
480 priv->rx_skb[q][i] = skb; in ravb_ring_init()
485 priv->tx_align[q] = kmalloc(DPTR_ALIGN * priv->num_tx_ring[q] + in ravb_ring_init()
486 DPTR_ALIGN - 1, GFP_KERNEL); in ravb_ring_init()
487 if (!priv->tx_align[q]) in ravb_ring_init()
492 if (!info->alloc_rx_desc(ndev, q)) in ravb_ring_init()
495 priv->dirty_rx[q] = 0; in ravb_ring_init()
499 (priv->num_tx_ring[q] * num_tx_desc + 1); in ravb_ring_init()
500 priv->tx_ring[q] = dma_alloc_coherent(ndev->dev.parent, ring_size, in ravb_ring_init()
501 &priv->tx_desc_dma[q], in ravb_ring_init()
503 if (!priv->tx_ring[q]) in ravb_ring_init()
511 return -ENOMEM; in ravb_ring_init()
521 /* EMAC Mode: PAUSE prohibition; Duplex; TX; RX; CRC Pass Through */ in ravb_emac_init_gbeth()
522 ravb_write(ndev, ECMR_ZPF | ((priv->duplex > 0) ? ECMR_DM : 0) | in ravb_emac_init_gbeth()
530 (ndev->dev_addr[0] << 24) | (ndev->dev_addr[1] << 16) | in ravb_emac_init_gbeth()
531 (ndev->dev_addr[2] << 8) | (ndev->dev_addr[3]), MAHR); in ravb_emac_init_gbeth()
532 ravb_write(ndev, (ndev->dev_addr[4] << 8) | (ndev->dev_addr[5]), MALR); in ravb_emac_init_gbeth()
534 /* E-MAC status register clear */ in ravb_emac_init_gbeth()
538 /* E-MAC interrupt enable register */ in ravb_emac_init_gbeth()
541 if (priv->phy_interface == PHY_INTERFACE_MODE_MII) { in ravb_emac_init_gbeth()
553 ravb_write(ndev, ndev->mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN, RFLR); in ravb_emac_init_rcar()
555 /* EMAC Mode: PAUSE prohibition; Duplex; RX Checksum; TX; RX */ in ravb_emac_init_rcar()
557 (ndev->features & NETIF_F_RXCSUM ? ECMR_RCSC : 0) | in ravb_emac_init_rcar()
564 (ndev->dev_addr[0] << 24) | (ndev->dev_addr[1] << 16) | in ravb_emac_init_rcar()
565 (ndev->dev_addr[2] << 8) | (ndev->dev_addr[3]), MAHR); in ravb_emac_init_rcar()
567 (ndev->dev_addr[4] << 8) | (ndev->dev_addr[5]), MALR); in ravb_emac_init_rcar()
569 /* E-MAC status register clear */ in ravb_emac_init_rcar()
572 /* E-MAC interrupt enable register */ in ravb_emac_init_rcar()
576 /* E-MAC init function */
580 const struct ravb_hw_info *info = priv->info; in ravb_emac_init()
582 info->emac_init(ndev); in ravb_emac_init()
622 const struct ravb_hw_info *info = priv->info; in ravb_dmac_init_rcar()
649 if (info->multi_irqs) { in ravb_dmac_init_rcar()
671 const struct ravb_hw_info *info = priv->info; in ravb_dmac_init()
679 error = info->dmac_init(ndev); in ravb_dmac_init()
683 /* Setting the control will start the AVB-DMAC process. */ in ravb_dmac_init()
701 while (count--) { in ravb_get_tx_tstamp()
709 list_for_each_entry_safe(ts_skb, ts_skb2, &priv->ts_skb_list, in ravb_get_tx_tstamp()
711 skb = ts_skb->skb; in ravb_get_tx_tstamp()
712 tag = ts_skb->tag; in ravb_get_tx_tstamp()
713 list_del(&ts_skb->list); in ravb_get_tx_tstamp()
734 if (unlikely(skb->len < sizeof(__sum16))) in ravb_rx_csum()
736 hw_csum = skb_tail_pointer(skb) - sizeof(__sum16); in ravb_rx_csum()
737 skb->csum = csum_unfold((__force __sum16)get_unaligned_le16(hw_csum)); in ravb_rx_csum()
738 skb->ip_summed = CHECKSUM_COMPLETE; in ravb_rx_csum()
739 skb_trim(skb, skb->len - sizeof(__sum16)); in ravb_rx_csum()
748 skb = priv->rx_skb[RAVB_BE][entry]; in ravb_get_skb_gbeth()
749 priv->rx_skb[RAVB_BE][entry] = NULL; in ravb_get_skb_gbeth()
750 dma_unmap_single(ndev->dev.parent, le32_to_cpu(desc->dptr), in ravb_get_skb_gbeth()
760 const struct ravb_hw_info *info = priv->info; in ravb_rx_gbeth()
772 entry = priv->cur_rx[q] % priv->num_rx_ring[q]; in ravb_rx_gbeth()
773 boguscnt = priv->dirty_rx[q] + priv->num_rx_ring[q] - priv->cur_rx[q]; in ravb_rx_gbeth()
774 stats = &priv->stats[q]; in ravb_rx_gbeth()
778 desc = &priv->gbeth_rx_ring[entry]; in ravb_rx_gbeth()
779 while (desc->die_dt != DT_FEMPTY) { in ravb_rx_gbeth()
782 desc_status = desc->msc; in ravb_rx_gbeth()
783 pkt_len = le16_to_cpu(desc->ds_cc) & RX_DS; in ravb_rx_gbeth()
785 if (--boguscnt < 0) in ravb_rx_gbeth()
788 /* We use 0-byte descriptors to mark the DMA mapping errors */ in ravb_rx_gbeth()
793 stats->multicast++; in ravb_rx_gbeth()
796 stats->rx_errors++; in ravb_rx_gbeth()
798 stats->rx_crc_errors++; in ravb_rx_gbeth()
800 stats->rx_frame_errors++; in ravb_rx_gbeth()
802 stats->rx_length_errors++; in ravb_rx_gbeth()
804 stats->rx_missed_errors++; in ravb_rx_gbeth()
806 die_dt = desc->die_dt & 0xF0; in ravb_rx_gbeth()
811 skb->protocol = eth_type_trans(skb, ndev); in ravb_rx_gbeth()
812 napi_gro_receive(&priv->napi[q], skb); in ravb_rx_gbeth()
813 stats->rx_packets++; in ravb_rx_gbeth()
814 stats->rx_bytes += pkt_len; in ravb_rx_gbeth()
817 priv->rx_1st_skb = ravb_get_skb_gbeth(ndev, entry, desc); in ravb_rx_gbeth()
818 skb_put(priv->rx_1st_skb, pkt_len); in ravb_rx_gbeth()
822 skb_copy_to_linear_data_offset(priv->rx_1st_skb, in ravb_rx_gbeth()
823 priv->rx_1st_skb->len, in ravb_rx_gbeth()
824 skb->data, in ravb_rx_gbeth()
826 skb_put(priv->rx_1st_skb, pkt_len); in ravb_rx_gbeth()
831 skb_copy_to_linear_data_offset(priv->rx_1st_skb, in ravb_rx_gbeth()
832 priv->rx_1st_skb->len, in ravb_rx_gbeth()
833 skb->data, in ravb_rx_gbeth()
835 skb_put(priv->rx_1st_skb, pkt_len); in ravb_rx_gbeth()
837 priv->rx_1st_skb->protocol = in ravb_rx_gbeth()
838 eth_type_trans(priv->rx_1st_skb, ndev); in ravb_rx_gbeth()
839 napi_gro_receive(&priv->napi[q], in ravb_rx_gbeth()
840 priv->rx_1st_skb); in ravb_rx_gbeth()
841 stats->rx_packets++; in ravb_rx_gbeth()
842 stats->rx_bytes += pkt_len; in ravb_rx_gbeth()
847 entry = (++priv->cur_rx[q]) % priv->num_rx_ring[q]; in ravb_rx_gbeth()
848 desc = &priv->gbeth_rx_ring[entry]; in ravb_rx_gbeth()
852 for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) { in ravb_rx_gbeth()
853 entry = priv->dirty_rx[q] % priv->num_rx_ring[q]; in ravb_rx_gbeth()
854 desc = &priv->gbeth_rx_ring[entry]; in ravb_rx_gbeth()
855 desc->ds_cc = cpu_to_le16(GBETH_RX_DESC_DATA_SIZE); in ravb_rx_gbeth()
857 if (!priv->rx_skb[q][entry]) { in ravb_rx_gbeth()
858 skb = netdev_alloc_skb(ndev, info->max_rx_len); in ravb_rx_gbeth()
862 dma_addr = dma_map_single(ndev->dev.parent, in ravb_rx_gbeth()
863 skb->data, in ravb_rx_gbeth()
870 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_rx_gbeth()
871 desc->ds_cc = cpu_to_le16(0); in ravb_rx_gbeth()
872 desc->dptr = cpu_to_le32(dma_addr); in ravb_rx_gbeth()
873 priv->rx_skb[q][entry] = skb; in ravb_rx_gbeth()
877 desc->die_dt = DT_FEMPTY; in ravb_rx_gbeth()
880 *quota -= limit - (++boguscnt); in ravb_rx_gbeth()
889 const struct ravb_hw_info *info = priv->info; in ravb_rx_rcar()
890 int entry = priv->cur_rx[q] % priv->num_rx_ring[q]; in ravb_rx_rcar()
891 int boguscnt = (priv->dirty_rx[q] + priv->num_rx_ring[q]) - in ravb_rx_rcar()
892 priv->cur_rx[q]; in ravb_rx_rcar()
893 struct net_device_stats *stats = &priv->stats[q]; in ravb_rx_rcar()
904 desc = &priv->rx_ring[q][entry]; in ravb_rx_rcar()
905 while (desc->die_dt != DT_FEMPTY) { in ravb_rx_rcar()
908 desc_status = desc->msc; in ravb_rx_rcar()
909 pkt_len = le16_to_cpu(desc->ds_cc) & RX_DS; in ravb_rx_rcar()
911 if (--boguscnt < 0) in ravb_rx_rcar()
914 /* We use 0-byte descriptors to mark the DMA mapping errors */ in ravb_rx_rcar()
919 stats->multicast++; in ravb_rx_rcar()
923 stats->rx_errors++; in ravb_rx_rcar()
925 stats->rx_crc_errors++; in ravb_rx_rcar()
927 stats->rx_frame_errors++; in ravb_rx_rcar()
929 stats->rx_length_errors++; in ravb_rx_rcar()
931 stats->rx_missed_errors++; in ravb_rx_rcar()
933 u32 get_ts = priv->tstamp_rx_ctrl & RAVB_RXTSTAMP_TYPE; in ravb_rx_rcar()
935 skb = priv->rx_skb[q][entry]; in ravb_rx_rcar()
936 priv->rx_skb[q][entry] = NULL; in ravb_rx_rcar()
937 dma_unmap_single(ndev->dev.parent, le32_to_cpu(desc->dptr), in ravb_rx_rcar()
948 ts.tv_sec = ((u64) le16_to_cpu(desc->ts_sh) << in ravb_rx_rcar()
949 32) | le32_to_cpu(desc->ts_sl); in ravb_rx_rcar()
950 ts.tv_nsec = le32_to_cpu(desc->ts_n); in ravb_rx_rcar()
951 shhwtstamps->hwtstamp = timespec64_to_ktime(ts); in ravb_rx_rcar()
955 skb->protocol = eth_type_trans(skb, ndev); in ravb_rx_rcar()
956 if (ndev->features & NETIF_F_RXCSUM) in ravb_rx_rcar()
958 napi_gro_receive(&priv->napi[q], skb); in ravb_rx_rcar()
959 stats->rx_packets++; in ravb_rx_rcar()
960 stats->rx_bytes += pkt_len; in ravb_rx_rcar()
963 entry = (++priv->cur_rx[q]) % priv->num_rx_ring[q]; in ravb_rx_rcar()
964 desc = &priv->rx_ring[q][entry]; in ravb_rx_rcar()
968 for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) { in ravb_rx_rcar()
969 entry = priv->dirty_rx[q] % priv->num_rx_ring[q]; in ravb_rx_rcar()
970 desc = &priv->rx_ring[q][entry]; in ravb_rx_rcar()
971 desc->ds_cc = cpu_to_le16(RX_BUF_SZ); in ravb_rx_rcar()
973 if (!priv->rx_skb[q][entry]) { in ravb_rx_rcar()
974 skb = netdev_alloc_skb(ndev, info->max_rx_len); in ravb_rx_rcar()
978 dma_addr = dma_map_single(ndev->dev.parent, skb->data, in ravb_rx_rcar()
979 le16_to_cpu(desc->ds_cc), in ravb_rx_rcar()
985 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_rx_rcar()
986 desc->ds_cc = cpu_to_le16(0); in ravb_rx_rcar()
987 desc->dptr = cpu_to_le32(dma_addr); in ravb_rx_rcar()
988 priv->rx_skb[q][entry] = skb; in ravb_rx_rcar()
992 desc->die_dt = DT_FEMPTY; in ravb_rx_rcar()
995 *quota -= limit - (++boguscnt); in ravb_rx_rcar()
1004 const struct ravb_hw_info *info = priv->info; in ravb_rx()
1006 return info->receive(ndev, quota, q); in ravb_rx()
1025 const struct ravb_hw_info *info = priv->info; in ravb_stop_dma()
1029 error = ravb_wait(ndev, TCCR, info->tccr_mask, 0); in ravb_stop_dma()
1039 /* Stop the E-MAC's RX/TX processes. */ in ravb_stop_dma()
1047 /* Stop AVB-DMAC process */ in ravb_stop_dma()
1051 /* E-MAC interrupt handler */
1061 pm_wakeup_event(&priv->pdev->dev, 0); in ravb_emac_interrupt_unlocked()
1063 ndev->stats.tx_carrier_errors++; in ravb_emac_interrupt_unlocked()
1066 if (priv->no_avb_link) in ravb_emac_interrupt_unlocked()
1069 if (priv->avb_link_active_low) in ravb_emac_interrupt_unlocked()
1086 spin_lock(&priv->lock); in ravb_emac_interrupt()
1088 spin_unlock(&priv->lock); in ravb_emac_interrupt()
1107 priv->stats[RAVB_BE].rx_over_errors++; in ravb_error_interrupt()
1111 priv->stats[RAVB_NC].rx_over_errors++; in ravb_error_interrupt()
1115 priv->rx_fifo_errors++; in ravb_error_interrupt()
1122 const struct ravb_hw_info *info = priv->info; in ravb_queue_interrupt()
1129 if (napi_schedule_prep(&priv->napi[q])) { in ravb_queue_interrupt()
1131 if (!info->irq_en_dis) { in ravb_queue_interrupt()
1138 __napi_schedule(&priv->napi[q]); in ravb_queue_interrupt()
1168 const struct ravb_hw_info *info = priv->info; in ravb_interrupt()
1172 spin_lock(&priv->lock); in ravb_interrupt()
1185 if (info->nc_queues) { in ravb_interrupt()
1186 for (q = RAVB_NC; q >= RAVB_BE; q--) { in ravb_interrupt()
1196 /* E-MAC status summary */ in ravb_interrupt()
1214 spin_unlock(&priv->lock); in ravb_interrupt()
1226 spin_lock(&priv->lock); in ravb_multi_interrupt()
1246 spin_unlock(&priv->lock); in ravb_multi_interrupt()
1256 spin_lock(&priv->lock); in ravb_dma_interrupt()
1262 spin_unlock(&priv->lock); in ravb_dma_interrupt()
1278 struct net_device *ndev = napi->dev; in ravb_poll()
1280 const struct ravb_hw_info *info = priv->info; in ravb_poll()
1281 bool gptp = info->gptp || info->ccc_gac; in ravb_poll()
1284 int q = napi - priv->napi; in ravb_poll()
1290 entry = priv->cur_rx[q] % priv->num_rx_ring[q]; in ravb_poll()
1291 desc = &priv->gbeth_rx_ring[entry]; in ravb_poll()
1296 if (gptp || desc->die_dt != DT_FEMPTY) { in ravb_poll()
1302 spin_lock_irqsave(&priv->lock, flags); in ravb_poll()
1307 spin_unlock_irqrestore(&priv->lock, flags); in ravb_poll()
1311 /* Re-enable RX/TX interrupts */ in ravb_poll()
1312 spin_lock_irqsave(&priv->lock, flags); in ravb_poll()
1313 if (!info->irq_en_dis) { in ravb_poll()
1320 spin_unlock_irqrestore(&priv->lock, flags); in ravb_poll()
1323 priv->rx_over_errors = priv->stats[RAVB_BE].rx_over_errors; in ravb_poll()
1324 if (info->nc_queues) in ravb_poll()
1325 priv->rx_over_errors += priv->stats[RAVB_NC].rx_over_errors; in ravb_poll()
1326 if (priv->rx_over_errors != ndev->stats.rx_over_errors) in ravb_poll()
1327 ndev->stats.rx_over_errors = priv->rx_over_errors; in ravb_poll()
1328 if (priv->rx_fifo_errors != ndev->stats.rx_fifo_errors) in ravb_poll()
1329 ndev->stats.rx_fifo_errors = priv->rx_fifo_errors; in ravb_poll()
1331 return budget - quota; in ravb_poll()
1338 ravb_modify(ndev, ECMR, ECMR_DM, priv->duplex > 0 ? ECMR_DM : 0); in ravb_set_duplex_gbeth()
1345 const struct ravb_hw_info *info = priv->info; in ravb_adjust_link()
1346 struct phy_device *phydev = ndev->phydev; in ravb_adjust_link()
1350 spin_lock_irqsave(&priv->lock, flags); in ravb_adjust_link()
1352 /* Disable TX and RX right over here, if E-MAC change is ignored */ in ravb_adjust_link()
1353 if (priv->no_avb_link) in ravb_adjust_link()
1356 if (phydev->link) { in ravb_adjust_link()
1357 if (info->half_duplex && phydev->duplex != priv->duplex) { in ravb_adjust_link()
1359 priv->duplex = phydev->duplex; in ravb_adjust_link()
1363 if (phydev->speed != priv->speed) { in ravb_adjust_link()
1365 priv->speed = phydev->speed; in ravb_adjust_link()
1366 info->set_rate(ndev); in ravb_adjust_link()
1368 if (!priv->link) { in ravb_adjust_link()
1371 priv->link = phydev->link; in ravb_adjust_link()
1373 } else if (priv->link) { in ravb_adjust_link()
1375 priv->link = 0; in ravb_adjust_link()
1376 priv->speed = 0; in ravb_adjust_link()
1377 if (info->half_duplex) in ravb_adjust_link()
1378 priv->duplex = -1; in ravb_adjust_link()
1381 /* Enable TX and RX right over here, if E-MAC change is ignored */ in ravb_adjust_link()
1382 if (priv->no_avb_link && phydev->link) in ravb_adjust_link()
1385 spin_unlock_irqrestore(&priv->lock, flags); in ravb_adjust_link()
1394 struct device_node *np = ndev->dev.parent->of_node; in ravb_phy_init()
1396 const struct ravb_hw_info *info = priv->info; in ravb_phy_init()
1402 priv->link = 0; in ravb_phy_init()
1403 priv->speed = 0; in ravb_phy_init()
1404 priv->duplex = -1; in ravb_phy_init()
1407 pn = of_parse_phandle(np, "phy-handle", 0); in ravb_phy_init()
1420 iface = priv->rgmii_override ? PHY_INTERFACE_MODE_RGMII in ravb_phy_init()
1421 : priv->phy_interface; in ravb_phy_init()
1426 err = -ENOENT; in ravb_phy_init()
1430 if (!info->half_duplex) { in ravb_phy_init()
1431 /* 10BASE, Pause and Asym Pause is not supported */ in ravb_phy_init()
1462 phy_start(ndev->phydev); in ravb_phy_start()
1471 return priv->msg_enable; in ravb_get_msglevel()
1478 priv->msg_enable = value; in ravb_set_msglevel()
1536 const struct ravb_hw_info *info = priv->info; in ravb_get_sset_count()
1540 return info->stats_len; in ravb_get_sset_count()
1542 return -EOPNOTSUPP; in ravb_get_sset_count()
1550 const struct ravb_hw_info *info = priv->info; in ravb_get_ethtool_stats()
1555 num_rx_q = info->nc_queues ? NUM_RX_QUEUE : 1; in ravb_get_ethtool_stats()
1556 /* Device-specific stats */ in ravb_get_ethtool_stats()
1558 struct net_device_stats *stats = &priv->stats[q]; in ravb_get_ethtool_stats()
1560 data[i++] = priv->cur_rx[q]; in ravb_get_ethtool_stats()
1561 data[i++] = priv->cur_tx[q]; in ravb_get_ethtool_stats()
1562 data[i++] = priv->dirty_rx[q]; in ravb_get_ethtool_stats()
1563 data[i++] = priv->dirty_tx[q]; in ravb_get_ethtool_stats()
1564 data[i++] = stats->rx_packets; in ravb_get_ethtool_stats()
1565 data[i++] = stats->tx_packets; in ravb_get_ethtool_stats()
1566 data[i++] = stats->rx_bytes; in ravb_get_ethtool_stats()
1567 data[i++] = stats->tx_bytes; in ravb_get_ethtool_stats()
1568 data[i++] = stats->multicast; in ravb_get_ethtool_stats()
1569 data[i++] = stats->rx_errors; in ravb_get_ethtool_stats()
1570 data[i++] = stats->rx_crc_errors; in ravb_get_ethtool_stats()
1571 data[i++] = stats->rx_frame_errors; in ravb_get_ethtool_stats()
1572 data[i++] = stats->rx_length_errors; in ravb_get_ethtool_stats()
1573 data[i++] = stats->rx_missed_errors; in ravb_get_ethtool_stats()
1574 data[i++] = stats->rx_over_errors; in ravb_get_ethtool_stats()
1581 const struct ravb_hw_info *info = priv->info; in ravb_get_strings()
1585 memcpy(data, info->gstrings_stats, info->gstrings_size); in ravb_get_strings()
1597 ring->rx_max_pending = BE_RX_RING_MAX; in ravb_get_ringparam()
1598 ring->tx_max_pending = BE_TX_RING_MAX; in ravb_get_ringparam()
1599 ring->rx_pending = priv->num_rx_ring[RAVB_BE]; in ravb_get_ringparam()
1600 ring->tx_pending = priv->num_tx_ring[RAVB_BE]; in ravb_get_ringparam()
1609 const struct ravb_hw_info *info = priv->info; in ravb_set_ringparam()
1612 if (ring->tx_pending > BE_TX_RING_MAX || in ravb_set_ringparam()
1613 ring->rx_pending > BE_RX_RING_MAX || in ravb_set_ringparam()
1614 ring->tx_pending < BE_TX_RING_MIN || in ravb_set_ringparam()
1615 ring->rx_pending < BE_RX_RING_MIN) in ravb_set_ringparam()
1616 return -EINVAL; in ravb_set_ringparam()
1617 if (ring->rx_mini_pending || ring->rx_jumbo_pending) in ravb_set_ringparam()
1618 return -EINVAL; in ravb_set_ringparam()
1623 if (info->gptp) in ravb_set_ringparam()
1632 synchronize_irq(ndev->irq); in ravb_set_ringparam()
1636 if (info->nc_queues) in ravb_set_ringparam()
1641 priv->num_rx_ring[RAVB_BE] = ring->rx_pending; in ravb_set_ringparam()
1642 priv->num_tx_ring[RAVB_BE] = ring->tx_pending; in ravb_set_ringparam()
1656 if (info->gptp) in ravb_set_ringparam()
1657 ravb_ptp_init(ndev, priv->pdev); in ravb_set_ringparam()
1669 const struct ravb_hw_info *hw_info = priv->info; in ravb_get_ts_info()
1671 info->so_timestamping = in ravb_get_ts_info()
1678 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); in ravb_get_ts_info()
1679 info->rx_filters = in ravb_get_ts_info()
1683 if (hw_info->gptp || hw_info->ccc_gac) in ravb_get_ts_info()
1684 info->phc_index = ptp_clock_index(priv->ptp.clock); in ravb_get_ts_info()
1693 wol->supported = WAKE_MAGIC; in ravb_get_wol()
1694 wol->wolopts = priv->wol_enabled ? WAKE_MAGIC : 0; in ravb_get_wol()
1700 const struct ravb_hw_info *info = priv->info; in ravb_set_wol()
1702 if (!info->magic_pkt || (wol->wolopts & ~WAKE_MAGIC)) in ravb_set_wol()
1703 return -EOPNOTSUPP; in ravb_set_wol()
1705 priv->wol_enabled = !!(wol->wolopts & WAKE_MAGIC); in ravb_set_wol()
1707 device_set_wakeup_enable(&priv->pdev->dev, priv->wol_enabled); in ravb_set_wol()
1736 name = devm_kasprintf(dev, GFP_KERNEL, "%s:%s", ndev->name, ch); in ravb_hook_irq()
1738 return -ENOMEM; in ravb_hook_irq()
1750 const struct ravb_hw_info *info = priv->info; in ravb_open()
1751 struct platform_device *pdev = priv->pdev; in ravb_open()
1752 struct device *dev = &pdev->dev; in ravb_open()
1755 napi_enable(&priv->napi[RAVB_BE]); in ravb_open()
1756 if (info->nc_queues) in ravb_open()
1757 napi_enable(&priv->napi[RAVB_NC]); in ravb_open()
1759 if (!info->multi_irqs) { in ravb_open()
1760 error = request_irq(ndev->irq, ravb_interrupt, IRQF_SHARED, in ravb_open()
1761 ndev->name, ndev); in ravb_open()
1767 error = ravb_hook_irq(ndev->irq, ravb_multi_interrupt, ndev, in ravb_open()
1771 error = ravb_hook_irq(priv->emac_irq, ravb_emac_interrupt, ndev, in ravb_open()
1775 error = ravb_hook_irq(priv->rx_irqs[RAVB_BE], ravb_be_interrupt, in ravb_open()
1779 error = ravb_hook_irq(priv->tx_irqs[RAVB_BE], ravb_be_interrupt, in ravb_open()
1783 error = ravb_hook_irq(priv->rx_irqs[RAVB_NC], ravb_nc_interrupt, in ravb_open()
1787 error = ravb_hook_irq(priv->tx_irqs[RAVB_NC], ravb_nc_interrupt, in ravb_open()
1792 if (info->err_mgmt_irqs) { in ravb_open()
1793 error = ravb_hook_irq(priv->erra_irq, ravb_multi_interrupt, in ravb_open()
1797 error = ravb_hook_irq(priv->mgmta_irq, ravb_multi_interrupt, in ravb_open()
1811 if (info->gptp) in ravb_open()
1812 ravb_ptp_init(ndev, priv->pdev); in ravb_open()
1825 if (info->gptp) in ravb_open()
1828 if (!info->multi_irqs) in ravb_open()
1830 if (info->err_mgmt_irqs) in ravb_open()
1831 free_irq(priv->mgmta_irq, ndev); in ravb_open()
1833 if (info->err_mgmt_irqs) in ravb_open()
1834 free_irq(priv->erra_irq, ndev); in ravb_open()
1836 free_irq(priv->tx_irqs[RAVB_NC], ndev); in ravb_open()
1838 free_irq(priv->rx_irqs[RAVB_NC], ndev); in ravb_open()
1840 free_irq(priv->tx_irqs[RAVB_BE], ndev); in ravb_open()
1842 free_irq(priv->rx_irqs[RAVB_BE], ndev); in ravb_open()
1844 free_irq(priv->emac_irq, ndev); in ravb_open()
1846 free_irq(ndev->irq, ndev); in ravb_open()
1848 if (info->nc_queues) in ravb_open()
1849 napi_disable(&priv->napi[RAVB_NC]); in ravb_open()
1850 napi_disable(&priv->napi[RAVB_BE]); in ravb_open()
1864 ndev->stats.tx_errors++; in ravb_tx_timeout()
1866 schedule_work(&priv->work); in ravb_tx_timeout()
1873 const struct ravb_hw_info *info = priv->info; in ravb_tx_timeout_work()
1874 struct net_device *ndev = priv->ndev; in ravb_tx_timeout_work()
1880 if (info->gptp) in ravb_tx_timeout_work()
1890 * re-enables the TX and RX and skip the following in ravb_tx_timeout_work()
1891 * re-initialization procedure. in ravb_tx_timeout_work()
1898 if (info->nc_queues) in ravb_tx_timeout_work()
1905 * should return here to avoid re-enabling the TX and RX in in ravb_tx_timeout_work()
1916 if (info->gptp) in ravb_tx_timeout_work()
1917 ravb_ptp_init(ndev, priv->pdev); in ravb_tx_timeout_work()
1926 const struct ravb_hw_info *info = priv->info; in ravb_start_xmit()
1927 unsigned int num_tx_desc = priv->num_tx_desc; in ravb_start_xmit()
1937 spin_lock_irqsave(&priv->lock, flags); in ravb_start_xmit()
1938 if (priv->cur_tx[q] - priv->dirty_tx[q] > (priv->num_tx_ring[q] - 1) * in ravb_start_xmit()
1943 spin_unlock_irqrestore(&priv->lock, flags); in ravb_start_xmit()
1950 entry = priv->cur_tx[q] % (priv->num_tx_ring[q] * num_tx_desc); in ravb_start_xmit()
1951 priv->tx_skb[q][entry / num_tx_desc] = skb; in ravb_start_xmit()
1954 buffer = PTR_ALIGN(priv->tx_align[q], DPTR_ALIGN) + in ravb_start_xmit()
1956 len = PTR_ALIGN(skb->data, DPTR_ALIGN) - skb->data; in ravb_start_xmit()
1967 * length of the second DMA descriptor (skb->len - len) in ravb_start_xmit()
1973 memcpy(buffer, skb->data, len); in ravb_start_xmit()
1974 dma_addr = dma_map_single(ndev->dev.parent, buffer, len, in ravb_start_xmit()
1976 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_start_xmit()
1979 desc = &priv->tx_ring[q][entry]; in ravb_start_xmit()
1980 desc->ds_tagl = cpu_to_le16(len); in ravb_start_xmit()
1981 desc->dptr = cpu_to_le32(dma_addr); in ravb_start_xmit()
1983 buffer = skb->data + len; in ravb_start_xmit()
1984 len = skb->len - len; in ravb_start_xmit()
1985 dma_addr = dma_map_single(ndev->dev.parent, buffer, len, in ravb_start_xmit()
1987 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_start_xmit()
1992 desc = &priv->tx_ring[q][entry]; in ravb_start_xmit()
1993 len = skb->len; in ravb_start_xmit()
1994 dma_addr = dma_map_single(ndev->dev.parent, skb->data, skb->len, in ravb_start_xmit()
1996 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_start_xmit()
1999 desc->ds_tagl = cpu_to_le16(len); in ravb_start_xmit()
2000 desc->dptr = cpu_to_le32(dma_addr); in ravb_start_xmit()
2003 if (info->gptp || info->ccc_gac) { in ravb_start_xmit()
2008 desc--; in ravb_start_xmit()
2009 dma_unmap_single(ndev->dev.parent, dma_addr, in ravb_start_xmit()
2014 ts_skb->skb = skb_get(skb); in ravb_start_xmit()
2015 ts_skb->tag = priv->ts_skb_tag++; in ravb_start_xmit()
2016 priv->ts_skb_tag &= 0x3ff; in ravb_start_xmit()
2017 list_add_tail(&ts_skb->list, &priv->ts_skb_list); in ravb_start_xmit()
2020 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in ravb_start_xmit()
2021 desc->tagh_tsr = (ts_skb->tag >> 4) | TX_TSR; in ravb_start_xmit()
2022 desc->ds_tagl |= cpu_to_le16(ts_skb->tag << 12); in ravb_start_xmit()
2030 desc->die_dt = DT_FEND; in ravb_start_xmit()
2031 desc--; in ravb_start_xmit()
2032 desc->die_dt = DT_FSTART; in ravb_start_xmit()
2034 desc->die_dt = DT_FSINGLE; in ravb_start_xmit()
2038 priv->cur_tx[q] += num_tx_desc; in ravb_start_xmit()
2039 if (priv->cur_tx[q] - priv->dirty_tx[q] > in ravb_start_xmit()
2040 (priv->num_tx_ring[q] - 1) * num_tx_desc && in ravb_start_xmit()
2045 spin_unlock_irqrestore(&priv->lock, flags); in ravb_start_xmit()
2049 dma_unmap_single(ndev->dev.parent, le32_to_cpu(desc->dptr), in ravb_start_xmit()
2050 le16_to_cpu(desc->ds_tagl), DMA_TO_DEVICE); in ravb_start_xmit()
2053 priv->tx_skb[q][entry / num_tx_desc] = NULL; in ravb_start_xmit()
2061 return (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) ? RAVB_NC : in ravb_select_queue()
2069 const struct ravb_hw_info *info = priv->info; in ravb_get_stats()
2072 nstats = &ndev->stats; in ravb_get_stats()
2073 stats0 = &priv->stats[RAVB_BE]; in ravb_get_stats()
2075 if (info->tx_counters) { in ravb_get_stats()
2076 nstats->tx_dropped += ravb_read(ndev, TROCR); in ravb_get_stats()
2080 if (info->carrier_counters) { in ravb_get_stats()
2081 nstats->collisions += ravb_read(ndev, CXR41); in ravb_get_stats()
2083 nstats->tx_carrier_errors += ravb_read(ndev, CXR42); in ravb_get_stats()
2087 nstats->rx_packets = stats0->rx_packets; in ravb_get_stats()
2088 nstats->tx_packets = stats0->tx_packets; in ravb_get_stats()
2089 nstats->rx_bytes = stats0->rx_bytes; in ravb_get_stats()
2090 nstats->tx_bytes = stats0->tx_bytes; in ravb_get_stats()
2091 nstats->multicast = stats0->multicast; in ravb_get_stats()
2092 nstats->rx_errors = stats0->rx_errors; in ravb_get_stats()
2093 nstats->rx_crc_errors = stats0->rx_crc_errors; in ravb_get_stats()
2094 nstats->rx_frame_errors = stats0->rx_frame_errors; in ravb_get_stats()
2095 nstats->rx_length_errors = stats0->rx_length_errors; in ravb_get_stats()
2096 nstats->rx_missed_errors = stats0->rx_missed_errors; in ravb_get_stats()
2097 nstats->rx_over_errors = stats0->rx_over_errors; in ravb_get_stats()
2098 if (info->nc_queues) { in ravb_get_stats()
2099 stats1 = &priv->stats[RAVB_NC]; in ravb_get_stats()
2101 nstats->rx_packets += stats1->rx_packets; in ravb_get_stats()
2102 nstats->tx_packets += stats1->tx_packets; in ravb_get_stats()
2103 nstats->rx_bytes += stats1->rx_bytes; in ravb_get_stats()
2104 nstats->tx_bytes += stats1->tx_bytes; in ravb_get_stats()
2105 nstats->multicast += stats1->multicast; in ravb_get_stats()
2106 nstats->rx_errors += stats1->rx_errors; in ravb_get_stats()
2107 nstats->rx_crc_errors += stats1->rx_crc_errors; in ravb_get_stats()
2108 nstats->rx_frame_errors += stats1->rx_frame_errors; in ravb_get_stats()
2109 nstats->rx_length_errors += stats1->rx_length_errors; in ravb_get_stats()
2110 nstats->rx_missed_errors += stats1->rx_missed_errors; in ravb_get_stats()
2111 nstats->rx_over_errors += stats1->rx_over_errors; in ravb_get_stats()
2123 spin_lock_irqsave(&priv->lock, flags); in ravb_set_rx_mode()
2125 ndev->flags & IFF_PROMISC ? ECMR_PRM : 0); in ravb_set_rx_mode()
2126 spin_unlock_irqrestore(&priv->lock, flags); in ravb_set_rx_mode()
2132 struct device_node *np = ndev->dev.parent->of_node; in ravb_close()
2134 const struct ravb_hw_info *info = priv->info; in ravb_close()
2145 if (info->gptp) in ravb_close()
2148 /* Set the config mode to stop the AVB-DMAC's processes */ in ravb_close()
2154 if (info->gptp || info->ccc_gac) { in ravb_close()
2155 list_for_each_entry_safe(ts_skb, ts_skb2, &priv->ts_skb_list, list) { in ravb_close()
2156 list_del(&ts_skb->list); in ravb_close()
2157 kfree_skb(ts_skb->skb); in ravb_close()
2163 if (ndev->phydev) { in ravb_close()
2164 phy_stop(ndev->phydev); in ravb_close()
2165 phy_disconnect(ndev->phydev); in ravb_close()
2170 cancel_work_sync(&priv->work); in ravb_close()
2172 if (info->multi_irqs) { in ravb_close()
2173 free_irq(priv->tx_irqs[RAVB_NC], ndev); in ravb_close()
2174 free_irq(priv->rx_irqs[RAVB_NC], ndev); in ravb_close()
2175 free_irq(priv->tx_irqs[RAVB_BE], ndev); in ravb_close()
2176 free_irq(priv->rx_irqs[RAVB_BE], ndev); in ravb_close()
2177 free_irq(priv->emac_irq, ndev); in ravb_close()
2178 if (info->err_mgmt_irqs) { in ravb_close()
2179 free_irq(priv->erra_irq, ndev); in ravb_close()
2180 free_irq(priv->mgmta_irq, ndev); in ravb_close()
2183 free_irq(ndev->irq, ndev); in ravb_close()
2185 if (info->nc_queues) in ravb_close()
2186 napi_disable(&priv->napi[RAVB_NC]); in ravb_close()
2187 napi_disable(&priv->napi[RAVB_BE]); in ravb_close()
2191 if (info->nc_queues) in ravb_close()
2203 config.tx_type = priv->tstamp_tx_ctrl ? HWTSTAMP_TX_ON : in ravb_hwtstamp_get()
2205 switch (priv->tstamp_rx_ctrl & RAVB_RXTSTAMP_TYPE) { in ravb_hwtstamp_get()
2216 return copy_to_user(req->ifr_data, &config, sizeof(config)) ? in ravb_hwtstamp_get()
2217 -EFAULT : 0; in ravb_hwtstamp_get()
2228 if (copy_from_user(&config, req->ifr_data, sizeof(config))) in ravb_hwtstamp_set()
2229 return -EFAULT; in ravb_hwtstamp_set()
2239 return -ERANGE; in ravb_hwtstamp_set()
2254 priv->tstamp_tx_ctrl = tstamp_tx_ctrl; in ravb_hwtstamp_set()
2255 priv->tstamp_rx_ctrl = tstamp_rx_ctrl; in ravb_hwtstamp_set()
2257 return copy_to_user(req->ifr_data, &config, sizeof(config)) ? in ravb_hwtstamp_set()
2258 -EFAULT : 0; in ravb_hwtstamp_set()
2264 struct phy_device *phydev = ndev->phydev; in ravb_do_ioctl()
2267 return -EINVAL; in ravb_do_ioctl()
2270 return -ENODEV; in ravb_do_ioctl()
2286 ndev->mtu = new_mtu; in ravb_change_mtu()
2289 synchronize_irq(priv->emac_irq); in ravb_change_mtu()
2303 spin_lock_irqsave(&priv->lock, flags); in ravb_set_rx_csum()
2314 spin_unlock_irqrestore(&priv->lock, flags); in ravb_set_rx_csum()
2327 netdev_features_t changed = ndev->features ^ features; in ravb_set_features_rcar()
2332 ndev->features = features; in ravb_set_features_rcar()
2341 const struct ravb_hw_info *info = priv->info; in ravb_set_features()
2343 return info->set_feature(ndev, features); in ravb_set_features()
2364 struct platform_device *pdev = priv->pdev; in ravb_mdio_init()
2365 struct device *dev = &pdev->dev; in ravb_mdio_init()
2371 priv->mdiobb.ops = &bb_ops; in ravb_mdio_init()
2374 priv->mii_bus = alloc_mdio_bitbang(&priv->mdiobb); in ravb_mdio_init()
2375 if (!priv->mii_bus) in ravb_mdio_init()
2376 return -ENOMEM; in ravb_mdio_init()
2379 priv->mii_bus->name = "ravb_mii"; in ravb_mdio_init()
2380 priv->mii_bus->parent = dev; in ravb_mdio_init()
2381 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", in ravb_mdio_init()
2382 pdev->name, pdev->id); in ravb_mdio_init()
2385 error = of_mdiobus_register(priv->mii_bus, dev->of_node); in ravb_mdio_init()
2389 pn = of_parse_phandle(dev->of_node, "phy-handle", 0); in ravb_mdio_init()
2392 phydev->mac_managed_pm = true; in ravb_mdio_init()
2393 put_device(&phydev->mdio.dev); in ravb_mdio_init()
2400 free_mdio_bitbang(priv->mii_bus); in ravb_mdio_init()
2408 mdiobus_unregister(priv->mii_bus); in ravb_mdio_release()
2411 free_mdio_bitbang(priv->mii_bus); in ravb_mdio_release()
2430 .max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1,
2456 .max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1,
2479 .max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1,
2512 { .compatible = "renesas,etheravb-r8a7790", .data = &ravb_gen2_hw_info },
2513 { .compatible = "renesas,etheravb-r8a7794", .data = &ravb_gen2_hw_info },
2514 { .compatible = "renesas,etheravb-rcar-gen2", .data = &ravb_gen2_hw_info },
2515 { .compatible = "renesas,etheravb-r8a7795", .data = &ravb_gen3_hw_info },
2516 { .compatible = "renesas,etheravb-rcar-gen3", .data = &ravb_gen3_hw_info },
2517 { .compatible = "renesas,etheravb-rcar-gen4", .data = &ravb_gen3_hw_info },
2518 { .compatible = "renesas,etheravb-rzv2m", .data = &ravb_rzv2m_hw_info },
2519 { .compatible = "renesas,rzg2l-gbeth", .data = &gbeth_hw_info },
2527 const struct ravb_hw_info *info = priv->info; in ravb_set_gti()
2528 struct device *dev = ndev->dev.parent; in ravb_set_gti()
2532 if (info->gptp_ref_clk) in ravb_set_gti()
2533 rate = clk_get_rate(priv->gptp_clk); in ravb_set_gti()
2535 rate = clk_get_rate(priv->clk); in ravb_set_gti()
2537 return -EINVAL; in ravb_set_gti()
2542 dev_err(dev, "gti.tiv increment 0x%llx is outside the range 0x%x - 0x%x\n", in ravb_set_gti()
2544 return -EINVAL; in ravb_set_gti()
2555 const struct ravb_hw_info *info = priv->info; in ravb_set_config_mode()
2557 if (info->gptp) { in ravb_set_config_mode()
2561 } else if (info->ccc_gac) { in ravb_set_config_mode()
2576 if (!of_property_read_u32(np, "rx-internal-delay-ps", &delay)) { in ravb_parse_delay_mode()
2578 priv->rxcidm = !!delay; in ravb_parse_delay_mode()
2581 if (!of_property_read_u32(np, "tx-internal-delay-ps", &delay)) { in ravb_parse_delay_mode()
2583 priv->txcidm = !!delay; in ravb_parse_delay_mode()
2590 /* Fall back to legacy rgmii-*id behavior */ in ravb_parse_delay_mode()
2591 if (priv->phy_interface == PHY_INTERFACE_MODE_RGMII_ID || in ravb_parse_delay_mode()
2592 priv->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) { in ravb_parse_delay_mode()
2593 priv->rxcidm = 1; in ravb_parse_delay_mode()
2594 priv->rgmii_override = 1; in ravb_parse_delay_mode()
2597 if (priv->phy_interface == PHY_INTERFACE_MODE_RGMII_ID || in ravb_parse_delay_mode()
2598 priv->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) { in ravb_parse_delay_mode()
2599 priv->txcidm = 1; in ravb_parse_delay_mode()
2600 priv->rgmii_override = 1; in ravb_parse_delay_mode()
2609 if (priv->rxcidm) in ravb_set_delay_mode()
2611 if (priv->txcidm) in ravb_set_delay_mode()
2618 struct device_node *np = pdev->dev.of_node; in ravb_probe()
2628 dev_err(&pdev->dev, in ravb_probe()
2630 return -EINVAL; in ravb_probe()
2633 rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); in ravb_probe()
2635 return dev_err_probe(&pdev->dev, PTR_ERR(rstc), in ravb_probe()
2641 return -ENOMEM; in ravb_probe()
2643 info = of_device_get_match_data(&pdev->dev); in ravb_probe()
2645 ndev->features = info->net_features; in ravb_probe()
2646 ndev->hw_features = info->net_hw_features; in ravb_probe()
2649 pm_runtime_enable(&pdev->dev); in ravb_probe()
2650 pm_runtime_get_sync(&pdev->dev); in ravb_probe()
2652 if (info->multi_irqs) { in ravb_probe()
2653 if (info->err_mgmt_irqs) in ravb_probe()
2664 ndev->irq = irq; in ravb_probe()
2666 SET_NETDEV_DEV(ndev, &pdev->dev); in ravb_probe()
2669 priv->info = info; in ravb_probe()
2670 priv->rstc = rstc; in ravb_probe()
2671 priv->ndev = ndev; in ravb_probe()
2672 priv->pdev = pdev; in ravb_probe()
2673 priv->num_tx_ring[RAVB_BE] = BE_TX_RING_SIZE; in ravb_probe()
2674 priv->num_rx_ring[RAVB_BE] = BE_RX_RING_SIZE; in ravb_probe()
2675 if (info->nc_queues) { in ravb_probe()
2676 priv->num_tx_ring[RAVB_NC] = NC_TX_RING_SIZE; in ravb_probe()
2677 priv->num_rx_ring[RAVB_NC] = NC_RX_RING_SIZE; in ravb_probe()
2680 priv->addr = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in ravb_probe()
2681 if (IS_ERR(priv->addr)) { in ravb_probe()
2682 error = PTR_ERR(priv->addr); in ravb_probe()
2686 /* The Ether-specific entries in the device structure. */ in ravb_probe()
2687 ndev->base_addr = res->start; in ravb_probe()
2689 spin_lock_init(&priv->lock); in ravb_probe()
2690 INIT_WORK(&priv->work, ravb_tx_timeout_work); in ravb_probe()
2692 error = of_get_phy_mode(np, &priv->phy_interface); in ravb_probe()
2693 if (error && error != -ENODEV) in ravb_probe()
2696 priv->no_avb_link = of_property_read_bool(np, "renesas,no-ether-link"); in ravb_probe()
2697 priv->avb_link_active_low = in ravb_probe()
2698 of_property_read_bool(np, "renesas,ether-link-active-low"); in ravb_probe()
2700 if (info->multi_irqs) { in ravb_probe()
2701 if (info->err_mgmt_irqs) in ravb_probe()
2709 priv->emac_irq = irq; in ravb_probe()
2716 priv->rx_irqs[i] = irq; in ravb_probe()
2724 priv->tx_irqs[i] = irq; in ravb_probe()
2727 if (info->err_mgmt_irqs) { in ravb_probe()
2733 priv->erra_irq = irq; in ravb_probe()
2740 priv->mgmta_irq = irq; in ravb_probe()
2744 priv->clk = devm_clk_get(&pdev->dev, NULL); in ravb_probe()
2745 if (IS_ERR(priv->clk)) { in ravb_probe()
2746 error = PTR_ERR(priv->clk); in ravb_probe()
2750 priv->refclk = devm_clk_get_optional(&pdev->dev, "refclk"); in ravb_probe()
2751 if (IS_ERR(priv->refclk)) { in ravb_probe()
2752 error = PTR_ERR(priv->refclk); in ravb_probe()
2755 clk_prepare_enable(priv->refclk); in ravb_probe()
2757 if (info->gptp_ref_clk) { in ravb_probe()
2758 priv->gptp_clk = devm_clk_get(&pdev->dev, "gptp"); in ravb_probe()
2759 if (IS_ERR(priv->gptp_clk)) { in ravb_probe()
2760 error = PTR_ERR(priv->gptp_clk); in ravb_probe()
2763 clk_prepare_enable(priv->gptp_clk); in ravb_probe()
2766 ndev->max_mtu = info->rx_max_buf_size - (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN); in ravb_probe()
2767 ndev->min_mtu = ETH_MIN_MTU; in ravb_probe()
2769 /* FIXME: R-Car Gen2 has 4byte alignment restriction for tx buffer in ravb_probe()
2774 priv->num_tx_desc = info->aligned_tx ? 2 : 1; in ravb_probe()
2777 ndev->netdev_ops = &ravb_netdev_ops; in ravb_probe()
2778 ndev->ethtool_ops = &ravb_ethtool_ops; in ravb_probe()
2783 if (info->gptp || info->ccc_gac) { in ravb_probe()
2793 if (info->internal_delay) { in ravb_probe()
2799 priv->desc_bat_size = sizeof(struct ravb_desc) * DBAT_ENTRY_NUM; in ravb_probe()
2800 priv->desc_bat = dma_alloc_coherent(ndev->dev.parent, priv->desc_bat_size, in ravb_probe()
2801 &priv->desc_bat_dma, GFP_KERNEL); in ravb_probe()
2802 if (!priv->desc_bat) { in ravb_probe()
2803 dev_err(&pdev->dev, in ravb_probe()
2805 priv->desc_bat_size); in ravb_probe()
2806 error = -ENOMEM; in ravb_probe()
2810 priv->desc_bat[q].die_dt = DT_EOS; in ravb_probe()
2811 ravb_write(ndev, priv->desc_bat_dma, DBAT); in ravb_probe()
2814 INIT_LIST_HEAD(&priv->ts_skb_list); in ravb_probe()
2817 if (info->ccc_gac) in ravb_probe()
2821 priv->msg_enable = RAVB_DEF_MSG_ENABLE; in ravb_probe()
2825 if (!is_valid_ether_addr(ndev->dev_addr)) { in ravb_probe()
2826 dev_warn(&pdev->dev, in ravb_probe()
2834 dev_err(&pdev->dev, "failed to initialize MDIO\n"); in ravb_probe()
2838 netif_napi_add(ndev, &priv->napi[RAVB_BE], ravb_poll); in ravb_probe()
2839 if (info->nc_queues) in ravb_probe()
2840 netif_napi_add(ndev, &priv->napi[RAVB_NC], ravb_poll); in ravb_probe()
2847 device_set_wakeup_capable(&pdev->dev, 1); in ravb_probe()
2851 (u32)ndev->base_addr, ndev->dev_addr, ndev->irq); in ravb_probe()
2858 if (info->nc_queues) in ravb_probe()
2859 netif_napi_del(&priv->napi[RAVB_NC]); in ravb_probe()
2861 netif_napi_del(&priv->napi[RAVB_BE]); in ravb_probe()
2864 dma_free_coherent(ndev->dev.parent, priv->desc_bat_size, priv->desc_bat, in ravb_probe()
2865 priv->desc_bat_dma); in ravb_probe()
2868 if (info->ccc_gac) in ravb_probe()
2871 clk_disable_unprepare(priv->gptp_clk); in ravb_probe()
2873 clk_disable_unprepare(priv->refclk); in ravb_probe()
2877 pm_runtime_put(&pdev->dev); in ravb_probe()
2878 pm_runtime_disable(&pdev->dev); in ravb_probe()
2887 const struct ravb_hw_info *info = priv->info; in ravb_remove()
2890 if (info->ccc_gac) in ravb_remove()
2893 clk_disable_unprepare(priv->gptp_clk); in ravb_remove()
2894 clk_disable_unprepare(priv->refclk); in ravb_remove()
2899 if (info->nc_queues) in ravb_remove()
2900 netif_napi_del(&priv->napi[RAVB_NC]); in ravb_remove()
2901 netif_napi_del(&priv->napi[RAVB_BE]); in ravb_remove()
2903 dma_free_coherent(ndev->dev.parent, priv->desc_bat_size, priv->desc_bat, in ravb_remove()
2904 priv->desc_bat_dma); in ravb_remove()
2905 pm_runtime_put_sync(&pdev->dev); in ravb_remove()
2906 pm_runtime_disable(&pdev->dev); in ravb_remove()
2907 reset_control_assert(priv->rstc); in ravb_remove()
2917 const struct ravb_hw_info *info = priv->info; in ravb_wol_setup()
2925 synchronize_irq(priv->emac_irq); in ravb_wol_setup()
2926 if (info->nc_queues) in ravb_wol_setup()
2927 napi_disable(&priv->napi[RAVB_NC]); in ravb_wol_setup()
2928 napi_disable(&priv->napi[RAVB_BE]); in ravb_wol_setup()
2934 return enable_irq_wake(priv->emac_irq); in ravb_wol_setup()
2940 const struct ravb_hw_info *info = priv->info; in ravb_wol_restore()
2942 if (info->nc_queues) in ravb_wol_restore()
2943 napi_enable(&priv->napi[RAVB_NC]); in ravb_wol_restore()
2944 napi_enable(&priv->napi[RAVB_BE]); in ravb_wol_restore()
2951 return disable_irq_wake(priv->emac_irq); in ravb_wol_restore()
2965 if (priv->wol_enabled) in ravb_suspend()
2970 if (priv->info->ccc_gac) in ravb_suspend()
2980 const struct ravb_hw_info *info = priv->info; in ravb_resume()
2984 if (priv->wol_enabled) in ravb_resume()
2995 if (info->gptp || info->ccc_gac) { in ravb_resume()
3005 if (info->internal_delay) in ravb_resume()
3009 ravb_write(ndev, priv->desc_bat_dma, DBAT); in ravb_resume()
3011 if (priv->info->ccc_gac) in ravb_resume()
3012 ravb_ptp_init(ndev, priv->pdev); in ravb_resume()
3015 if (priv->wol_enabled) { in ravb_resume()
3032 /* Runtime PM callback shared between ->runtime_suspend() in ravb_runtime_nop()
3033 * and ->runtime_resume(). Simply returns success. in ravb_runtime_nop()
3035 * This driver re-initializes all registers after in ravb_runtime_nop()