Lines Matching refs:sky2_write16

246 		sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON);  in sky2_power_on()
257 sky2_write16(hw, B0_CTST, Y2_LED_STAT_ON); in sky2_power_on()
279 sky2_write16(hw, B0_CTST, Y2_LED_STAT_OFF); in sky2_power_aux()
814 sky2_write16(hw, B0_CTST, CS_RST_CLR); in sky2_wol_init()
815 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR); in sky2_wol_init()
847 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT); in sky2_wol_init()
860 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl); in sky2_wol_init()
863 sky2_write16(hw, B0_CTST, Y2_HW_WOL_OFF); in sky2_wol_init()
993 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0); in sky2_mac_init()
996 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR); in sky2_mac_init()
1005 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg); in sky2_mac_init()
1009 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); in sky2_mac_init()
1019 sky2_write16(hw, SK_REG(port, RX_GMF_UP_THR), reg); in sky2_mac_init()
1020 sky2_write16(hw, SK_REG(port, RX_GMF_LP_THR), 768 / 8); in sky2_mac_init()
1030 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg); in sky2_mac_init()
1093 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last); in sky2_prefetch_init()
1128 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx); in sky2_put_idx()
1561 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh); in sky2_rx_start()
1582 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL), in sky2_rx_start()
1699 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV); in sky2_hw_up()
2813 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR); in sky2_hw_error()
2820 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR); in sky2_hw_error()
3248 sky2_write16(hw, HCU_CCSR, status); in sky2_reset()
3252 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE); in sky2_reset()
3288 sky2_write16(hw, SK_REG(i, GMAC_CTRL), in sky2_reset()
3336 sky2_write16(hw, GPHY_CTRL, reg | GPC_INTPOL); in sky2_reset()
3340 sky2_write16(hw, Y2_CFG_SPC + PCI_LDO_CTRL, reg | PHY_M_UNDOC1); in sky2_reset()
3400 sky2_write16(hw, STAT_LAST_IDX, hw->st_size - 1); in sky2_reset()
3402 sky2_write16(hw, STAT_TX_IDX_TH, 10); in sky2_reset()
4117 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames); in sky2_set_coalesce()