907 				i40e_force_wb(vsi, tx_ring->q_vector);  in i40e_detect_recover_hung()
1064 				  struct i40e_q_vector *q_vector)  in i40e_enable_wb_on_itr()  argument
1066 	u16 flags = q_vector->tx.ring[0].flags;  in i40e_enable_wb_on_itr()
1072 	if (q_vector->arm_wb_state)  in i40e_enable_wb_on_itr()
1080 		     I40E_PFINT_DYN_CTLN(q_vector->reg_idx),  in i40e_enable_wb_on_itr()
1088 	q_vector->arm_wb_state = true;  in i40e_enable_wb_on_itr()
1097 void i40e_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector)  in i40e_force_wb()  argument
1107 		     I40E_PFINT_DYN_CTLN(q_vector->reg_idx), val);  in i40e_force_wb()
1119 static inline bool i40e_container_is_rx(struct i40e_q_vector *q_vector,  in i40e_container_is_rx()  argument
1122 	return &q_vector->rx == rc;  in i40e_container_is_rx()
1125 static inline unsigned int i40e_itr_divisor(struct i40e_q_vector *q_vector)  in i40e_itr_divisor()  argument
1129 	switch (q_vector->vsi->back->hw.phy.link_info.link_speed) {  in i40e_itr_divisor()
1163 static void i40e_update_itr(struct i40e_q_vector *q_vector,  in i40e_update_itr()  argument
1178 	itr = i40e_container_is_rx(q_vector, rc) ?  in i40e_update_itr()
1196 	if (q_vector->itr_countdown) {  in i40e_update_itr()
1204 	if (i40e_container_is_rx(q_vector, rc)) {  in i40e_update_itr()
1211 		    (q_vector->tx.target_itr & I40E_ITR_ADAPTIVE_LATENCY)) {  in i40e_update_itr()
1222 		    (q_vector->rx.target_itr & I40E_ITR_MASK) ==  in i40e_update_itr()
1250 		itr = min(q_vector->tx.current_itr, q_vector->rx.current_itr);  in i40e_update_itr()
1337 	itr += DIV_ROUND_UP(avg_wire_size, i40e_itr_divisor(q_vector)) *  in i40e_update_itr()
1583 				       rx_ring->queue_index, rx_ring->q_vector->napi.napi_id);  in i40e_setup_rx_descriptors()
2168 	skb = __napi_alloc_skb(&rx_ring->q_vector->napi,  in i40e_construct_skb()
2392 	rx_ring->q_vector->rx.total_packets += total_rx_packets;  in i40e_update_rx_stats()
2393 	rx_ring->q_vector->rx.total_bytes += total_rx_bytes;  in i40e_update_rx_stats()
2627 			napi_gro_receive(&rx_ring->q_vector->napi, skb);  in i40e_clean_rx_irq()
2697 					  struct i40e_q_vector *q_vector)  in i40e_update_enable_itr()  argument
2709 	i40e_update_itr(q_vector, &q_vector->tx);  in i40e_update_enable_itr()
2710 	i40e_update_itr(q_vector, &q_vector->rx);  in i40e_update_enable_itr()
2720 	if (q_vector->rx.target_itr < q_vector->rx.current_itr) {  in i40e_update_enable_itr()
2723 					   q_vector->rx.target_itr);  in i40e_update_enable_itr()
2724 		q_vector->rx.current_itr = q_vector->rx.target_itr;  in i40e_update_enable_itr()
2725 		q_vector->itr_countdown = ITR_COUNTDOWN_START;  in i40e_update_enable_itr()
2726 	} else if ((q_vector->tx.target_itr < q_vector->tx.current_itr) ||  in i40e_update_enable_itr()
2727 		   ((q_vector->rx.target_itr - q_vector->rx.current_itr) <  in i40e_update_enable_itr()
2728 		    (q_vector->tx.target_itr - q_vector->tx.current_itr))) {  in i40e_update_enable_itr()
2733 					   q_vector->tx.target_itr);  in i40e_update_enable_itr()
2734 		q_vector->tx.current_itr = q_vector->tx.target_itr;  in i40e_update_enable_itr()
2735 		q_vector->itr_countdown = ITR_COUNTDOWN_START;  in i40e_update_enable_itr()
2736 	} else if (q_vector->rx.current_itr != q_vector->rx.target_itr) {  in i40e_update_enable_itr()
2739 					   q_vector->rx.target_itr);  in i40e_update_enable_itr()
2740 		q_vector->rx.current_itr = q_vector->rx.target_itr;  in i40e_update_enable_itr()
2741 		q_vector->itr_countdown = ITR_COUNTDOWN_START;  in i40e_update_enable_itr()
2745 		if (q_vector->itr_countdown)  in i40e_update_enable_itr()
2746 			q_vector->itr_countdown--;  in i40e_update_enable_itr()
2750 		wr32(hw, INTREG(q_vector->reg_idx), intval);  in i40e_update_enable_itr()
2764 	struct i40e_q_vector *q_vector =  in i40e_napi_poll()  local
2766 	struct i40e_vsi *vsi = q_vector->vsi;  in i40e_napi_poll()
2785 	i40e_for_each_ring(ring, q_vector->tx) {  in i40e_napi_poll()
2803 	if (unlikely(q_vector->num_ringpairs > 1))  in i40e_napi_poll()
2808 		budget_per_ring = max_t(int, budget / q_vector->num_ringpairs, 1);  in i40e_napi_poll()
2813 	i40e_for_each_ring(ring, q_vector->rx) {  in i40e_napi_poll()
2825 		trace_i40e_napi_poll(napi, q_vector, budget, budget_per_ring, rx_cleaned,  in i40e_napi_poll()
2839 		if (!cpumask_test_cpu(cpu_id, &q_vector->affinity_mask)) {  in i40e_napi_poll()
2844 			i40e_force_wb(vsi, q_vector);  in i40e_napi_poll()
2851 			q_vector->tx.ring[0].tx_stats.tx_force_wb++;  in i40e_napi_poll()
2852 			i40e_enable_wb_on_itr(vsi, q_vector);  in i40e_napi_poll()
2857 	if (q_vector->tx.ring[0].flags & I40E_TXR_FLAGS_WB_ON_ITR)  in i40e_napi_poll()
2858 		q_vector->arm_wb_state = false;  in i40e_napi_poll()
2864 		i40e_update_enable_itr(vsi, q_vector);  in i40e_napi_poll()