Lines Matching refs:ew32
617 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_update_rdt_wa()
634 ew32(TCTL, tctl & ~E1000_TCTL_EN); in e1000e_update_tdt_wa()
1108 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1114 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1776 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr_msi()
1856 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr()
1900 ew32(ICS, (icr & adapter->eiac_mask)); in e1000_msix_other()
1910 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK); in e1000_msix_other()
1927 ew32(ICS, tx_ring->ims_val); in e1000_intr_msix_tx()
1930 ew32(IMS, adapter->tx_ring->ims_val); in e1000_intr_msix_tx()
1982 ew32(RFCTL, rfctl); in e1000_configure_msix()
2018 ew32(IVAR, ivar); in e1000_configure_msix()
2023 ew32(CTRL_EXT, ctrl_ext); in e1000_configure_msix()
2218 ew32(IMC, ~0); in e1000_irq_disable()
2220 ew32(EIAC_82574, 0); in e1000_irq_disable()
2242 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); in e1000_irq_enable()
2243 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | in e1000_irq_enable()
2246 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER); in e1000_irq_enable()
2248 ew32(IMS, IMS_ENABLE_MASK); in e1000_irq_enable()
2271 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); in e1000e_get_hw_control()
2274 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); in e1000e_get_hw_control()
2297 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); in e1000e_release_hw_control()
2300 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); in e1000e_release_hw_control()
2623 ew32(ITR, new_itr); in e1000e_write_itr()
2687 ew32(IMS, adapter->rx_ring->ims_val); in e1000e_poll()
2764 ew32(RCTL, rctl); in e1000e_vlan_filter_disable()
2788 ew32(RCTL, rctl); in e1000e_vlan_filter_enable()
2804 ew32(CTRL, ctrl); in e1000e_vlan_strip_disable()
2819 ew32(CTRL, ctrl); in e1000e_vlan_strip_enable()
2893 ew32(MDEF(i), (E1000_MDEF_PORT_623 | in e1000_init_manageability_pt()
2905 ew32(MANC2H, manc2h); in e1000_init_manageability_pt()
2906 ew32(MANC, manc); in e1000_init_manageability_pt()
2925 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32))); in e1000_configure_tx()
2926 ew32(TDBAH(0), (tdba >> 32)); in e1000_configure_tx()
2927 ew32(TDLEN(0), tdlen); in e1000_configure_tx()
2928 ew32(TDH(0), 0); in e1000_configure_tx()
2929 ew32(TDT(0), 0); in e1000_configure_tx()
2940 ew32(TIDV, adapter->tx_int_delay); in e1000_configure_tx()
2942 ew32(TADV, adapter->tx_abs_int_delay); in e1000_configure_tx()
2959 ew32(TXDCTL(0), txdctl); in e1000_configure_tx()
2962 ew32(TXDCTL(1), er32(TXDCTL(0))); in e1000_configure_tx()
2977 ew32(TARC(0), tarc); in e1000_configure_tx()
2984 ew32(TARC(0), tarc); in e1000_configure_tx()
2987 ew32(TARC(1), tarc); in e1000_configure_tx()
3000 ew32(TCTL, tctl); in e1000_configure_tx()
3010 ew32(IOSFPC, reg_val); in e1000_configure_tx()
3019 ew32(TARC(0), reg_val); in e1000_configure_tx()
3115 ew32(RFCTL, rfctl); in e1000_setup_rctl()
3157 ew32(PSRCTL, psrctl); in e1000_setup_rctl()
3177 ew32(RCTL, rctl); in e1000_setup_rctl()
3214 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_configure_rx()
3227 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); in e1000_configure_rx()
3228 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); in e1000_configure_rx()
3232 ew32(RDTR, adapter->rx_int_delay); in e1000_configure_rx()
3235 ew32(RADV, adapter->rx_abs_int_delay); in e1000_configure_rx()
3242 ew32(IAM, 0xffffffff); in e1000_configure_rx()
3243 ew32(CTRL_EXT, ctrl_ext); in e1000_configure_rx()
3250 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32))); in e1000_configure_rx()
3251 ew32(RDBAH(0), (rdba >> 32)); in e1000_configure_rx()
3252 ew32(RDLEN(0), rdlen); in e1000_configure_rx()
3253 ew32(RDH(0), 0); in e1000_configure_rx()
3254 ew32(RDT(0), 0); in e1000_configure_rx()
3270 ew32(RXCSUM, rxcsum); in e1000_configure_rx()
3283 ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8)); in e1000_configure_rx()
3295 ew32(RCTL, rctl); in e1000_configure_rx()
3385 ew32(RAH(rar_entries), 0); in e1000e_write_uc_addr_list()
3386 ew32(RAL(rar_entries), 0); in e1000e_write_uc_addr_list()
3445 ew32(RCTL, rctl); in e1000e_set_rx_mode()
3462 ew32(RSSRK(i), rss_key[i]); in e1000e_setup_rss_hash()
3466 ew32(RETA(i), 0); in e1000e_setup_rss_hash()
3474 ew32(RXCSUM, rxcsum); in e1000e_setup_rss_hash()
3482 ew32(MRQC, mrqc); in e1000e_setup_rss_hash()
3507 ew32(FEXTNVM7, fextnvm7 | BIT(0)); in e1000e_get_base_timinca()
3701 ew32(TSYNCTXCTL, regval); in e1000e_config_hwtstamp()
3712 ew32(TSYNCRXCTL, regval); in e1000e_config_hwtstamp()
3726 ew32(RXMTRL, rxmtrl); in e1000e_config_hwtstamp()
3733 ew32(RXUDP, rxudp); in e1000e_config_hwtstamp()
3813 ew32(TCTL, tctl | E1000_TCTL_EN); in e1000_flush_tx_ring()
3826 ew32(TDT(0), tx_ring->next_to_use); in e1000_flush_tx_ring()
3842 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_flush_rx_ring()
3855 ew32(RXDCTL(0), rxdctl); in e1000_flush_rx_ring()
3857 ew32(RCTL, rctl | E1000_RCTL_EN); in e1000_flush_rx_ring()
3860 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_flush_rx_ring()
3884 ew32(FEXTNVM11, fext_nvm11); in e1000_flush_desc_rings()
3926 ew32(TIMINCA, timinca); in e1000e_systim_reset()
3965 ew32(PBA, pba); in e1000e_reset()
4007 ew32(PBA, pba); in e1000e_reset()
4030 ew32(PBA, pba); in e1000e_reset()
4076 ew32(PBA, pba); in e1000e_reset()
4121 ew32(WUC, 0); in e1000e_reset()
4129 ew32(VET, ETH_P_8021Q); in e1000e_reset()
4191 ew32(FEXTNVM7, reg); in e1000e_reset()
4196 ew32(FEXTNVM9, reg); in e1000e_reset()
4212 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER); in e1000e_trigger_lsc()
4214 ew32(ICS, E1000_ICS_LSC); in e1000e_trigger_lsc()
4241 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000e_flush_descriptors()
4242 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); in e1000e_flush_descriptors()
4250 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000e_flush_descriptors()
4251 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); in e1000e_flush_descriptors()
4280 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_down()
4288 ew32(TCTL, tctl); in e1000e_down()
4545 ew32(ICS, E1000_ICS_RXSEQ); in e1000_test_msi_interrupt()
5146 ew32(RCTL, rctl | E1000_RCTL_EN); in e1000e_enable_receives()
5289 ew32(TARC(0), tarc0); in e1000_watchdog_task()
5297 ew32(TCTL, tctl); in e1000_watchdog_task()
5385 ew32(ICS, adapter->rx_ring->ims_val); in e1000_watchdog_task()
5387 ew32(ICS, E1000_ICS_RXDMT0); in e1000_watchdog_task()
6268 ew32(WUFC, wufc); in e1000_init_phy_wakeup()
6269 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME | in e1000_init_phy_wakeup()
6323 ew32(H2ME, mac_data); in e1000e_s0ix_entry_flow()
6350 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6367 ew32(EXTCNF_CTRL, mac_data); in e1000e_s0ix_entry_flow()
6372 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_entry_flow()
6377 ew32(DPGFR, mac_data); in e1000e_s0ix_entry_flow()
6382 ew32(FEXTNVM12, mac_data); in e1000e_s0ix_entry_flow()
6387 ew32(FEXTNVM9, mac_data); in e1000e_s0ix_entry_flow()
6392 ew32(FEXTNVM6, mac_data); in e1000e_s0ix_entry_flow()
6397 ew32(FEXTNVM8, mac_data); in e1000e_s0ix_entry_flow()
6402 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6409 ew32(FEXTNVM5, mac_data); in e1000e_s0ix_entry_flow()
6416 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_entry_flow()
6421 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6429 ew32(TDFH, 0); in e1000e_s0ix_entry_flow()
6432 ew32(TDFT, 0); in e1000e_s0ix_entry_flow()
6435 ew32(TDFHS, 0); in e1000e_s0ix_entry_flow()
6438 ew32(TDFTS, 0); in e1000e_s0ix_entry_flow()
6441 ew32(TDFPC, 0); in e1000e_s0ix_entry_flow()
6444 ew32(RDFH, 0); in e1000e_s0ix_entry_flow()
6447 ew32(RDFT, 0); in e1000e_s0ix_entry_flow()
6450 ew32(RDFHS, 0); in e1000e_s0ix_entry_flow()
6453 ew32(RDFTS, 0); in e1000e_s0ix_entry_flow()
6456 ew32(RDFPC, 0); in e1000e_s0ix_entry_flow()
6472 ew32(FEXTNVM, mac_data); in e1000e_s0ix_exit_flow()
6478 ew32(H2ME, mac_data); in e1000e_s0ix_exit_flow()
6507 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_exit_flow()
6512 ew32(FEXTNVM8, mac_data); in e1000e_s0ix_exit_flow()
6517 ew32(FEXTNVM6, mac_data); in e1000e_s0ix_exit_flow()
6522 ew32(FEXTNVM9, mac_data); in e1000e_s0ix_exit_flow()
6529 ew32(FEXTNVM12, mac_data); in e1000e_s0ix_exit_flow()
6536 ew32(DPGFR, mac_data); in e1000e_s0ix_exit_flow()
6541 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6548 ew32(FEXTNVM5, mac_data); in e1000e_s0ix_exit_flow()
6574 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6580 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6586 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_exit_flow()
6650 ew32(RCTL, rctl); in __e1000_shutdown()
6657 ew32(CTRL, ctrl); in __e1000_shutdown()
6665 ew32(CTRL_EXT, ctrl_ext); in __e1000_shutdown()
6681 ew32(WUFC, wufc); in __e1000_shutdown()
6682 ew32(WUC, E1000_WUC_PME_EN); in __e1000_shutdown()
6685 ew32(WUC, 0); in __e1000_shutdown()
6686 ew32(WUFC, 0); in __e1000_shutdown()
6939 ew32(WUS, ~0); in __e1000_resume()
7194 ew32(WUS, ~0); in e1000_io_slot_reset()