Lines Matching refs:IDT4_CMD_WRITE
70 #define IDT4_CMD_WRITE 4 macro
240 t3_write_reg(adap, A_MC5_DB_POPEN_DATA_WR_CMD, IDT4_CMD_WRITE); in init_idt43102()
241 t3_write_reg(adap, A_MC5_DB_POPEN_MASK_WR_CMD, IDT4_CMD_WRITE); in init_idt43102()
248 t3_write_reg(adap, A_MC5_DB_DATA_WRITE_CMD, IDT4_CMD_WRITE); in init_idt43102()
259 if (mc5_write(adap, IDT4_GMR_BASE0 + i, IDT4_CMD_WRITE)) in init_idt43102()
263 if (mc5_write(adap, IDT4_GMR_BASE2 + i, IDT4_CMD_WRITE)) in init_idt43102()
267 if (mc5_write(adap, IDT4_GMR_BASE1, IDT4_CMD_WRITE) || in init_idt43102()
268 mc5_write(adap, IDT4_GMR_BASE1 + 1, IDT4_CMD_WRITE) || in init_idt43102()
269 mc5_write(adap, IDT4_GMR_BASE1 + 4, IDT4_CMD_WRITE)) in init_idt43102()
273 if (mc5_write(adap, IDT4_GMR_BASE1 + 5, IDT4_CMD_WRITE)) in init_idt43102()
278 if (mc5_write(adap, IDT4_SCR_ADR0, IDT4_CMD_WRITE)) in init_idt43102()
282 IDT4_DATARY_BASE_ADR0, IDT4_CMD_WRITE, 1); in init_idt43102()