Lines Matching refs:GRC_MODE
3549 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3550 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
3560 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3561 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
6431 tg3_rd32_loop(tp, regs, GRC_MODE, 0x4c); in tg3_dump_legacy_regs()
9241 tw32(GRC_MODE, tp->grc_mode); in tg3_chip_reset()
9922 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9926 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9932 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9937 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9941 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9948 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9959 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9963 tw32(GRC_MODE, val | GRC_MODE_PCIE_DL_SEL); in tg3_reset_hw()
9971 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10065 tw32(GRC_MODE, tp->grc_mode | val); in tg3_reset_hw()
16750 val = tr32(GRC_MODE); in tg3_get_invariants()
16761 tw32(GRC_MODE, val | tp->grc_mode); in tg3_get_invariants()