124 	rctl = ATL2_READ_REG(hw, REG_MAC_CTRL);  in atl2_set_multi()
254 	value = ATL2_READ_REG(&adapter->hw, REG_ISR);  in atl2_configure()
362 	ctrl = ATL2_READ_REG(&adapter->hw, REG_MAC_CTRL);  in atl2_vlan_mode()
589 	status = ATL2_READ_REG(hw, REG_ISR);  in atl2_intr()
722 	val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);  in atl2_open()
1020 		drop_rxd = ATL2_READ_REG(&adapter->hw, REG_STS_RXD_OV);  in atl2_watchdog()
1021 		drop_rxs = ATL2_READ_REG(&adapter->hw, REG_STS_RXS_OV);  in atl2_watchdog()
1077 	val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);  in atl2_up()
1159 			value = ATL2_READ_REG(hw, REG_MAC_CTRL);  in atl2_check_link()
1216 		value = ATL2_READ_REG(hw, REG_MAC_CTRL);  in atl2_check_link()
1557 		ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);  in atl2_suspend()
1560 		ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);  in atl2_suspend()
1575 		ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);  in atl2_suspend()
1578 		ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);  in atl2_suspend()
1594 	ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);  in atl2_suspend()
1597 	ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);  in atl2_suspend()
1636 	ATL2_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */  in atl2_resume()
1820 	regs_buff[0]  = ATL2_READ_REG(hw, REG_VPD_CAP);  in atl2_get_regs()
1821 	regs_buff[1]  = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);  in atl2_get_regs()
1822 	regs_buff[2]  = ATL2_READ_REG(hw, REG_SPI_FLASH_CONFIG);  in atl2_get_regs()
1823 	regs_buff[3]  = ATL2_READ_REG(hw, REG_TWSI_CTRL);  in atl2_get_regs()
1824 	regs_buff[4]  = ATL2_READ_REG(hw, REG_PCIE_DEV_MISC_CTRL);  in atl2_get_regs()
1825 	regs_buff[5]  = ATL2_READ_REG(hw, REG_MASTER_CTRL);  in atl2_get_regs()
1826 	regs_buff[6]  = ATL2_READ_REG(hw, REG_MANUAL_TIMER_INIT);  in atl2_get_regs()
1827 	regs_buff[7]  = ATL2_READ_REG(hw, REG_IRQ_MODU_TIMER_INIT);  in atl2_get_regs()
1828 	regs_buff[8]  = ATL2_READ_REG(hw, REG_PHY_ENABLE);  in atl2_get_regs()
1829 	regs_buff[9]  = ATL2_READ_REG(hw, REG_CMBDISDMA_TIMER);  in atl2_get_regs()
1830 	regs_buff[10] = ATL2_READ_REG(hw, REG_IDLE_STATUS);  in atl2_get_regs()
1831 	regs_buff[11] = ATL2_READ_REG(hw, REG_MDIO_CTRL);  in atl2_get_regs()
1832 	regs_buff[12] = ATL2_READ_REG(hw, REG_SERDES_LOCK);  in atl2_get_regs()
1833 	regs_buff[13] = ATL2_READ_REG(hw, REG_MAC_CTRL);  in atl2_get_regs()
1834 	regs_buff[14] = ATL2_READ_REG(hw, REG_MAC_IPG_IFG);  in atl2_get_regs()
1835 	regs_buff[15] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR);  in atl2_get_regs()
1836 	regs_buff[16] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR+4);  in atl2_get_regs()
1837 	regs_buff[17] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE);  in atl2_get_regs()
1838 	regs_buff[18] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE+4);  in atl2_get_regs()
1839 	regs_buff[19] = ATL2_READ_REG(hw, REG_MAC_HALF_DUPLX_CTRL);  in atl2_get_regs()
1840 	regs_buff[20] = ATL2_READ_REG(hw, REG_MTU);  in atl2_get_regs()
1841 	regs_buff[21] = ATL2_READ_REG(hw, REG_WOL_CTRL);  in atl2_get_regs()
1842 	regs_buff[22] = ATL2_READ_REG(hw, REG_SRAM_TXRAM_END);  in atl2_get_regs()
1843 	regs_buff[23] = ATL2_READ_REG(hw, REG_DESC_BASE_ADDR_HI);  in atl2_get_regs()
1844 	regs_buff[24] = ATL2_READ_REG(hw, REG_TXD_BASE_ADDR_LO);  in atl2_get_regs()
1845 	regs_buff[25] = ATL2_READ_REG(hw, REG_TXD_MEM_SIZE);  in atl2_get_regs()
1846 	regs_buff[26] = ATL2_READ_REG(hw, REG_TXS_BASE_ADDR_LO);  in atl2_get_regs()
1847 	regs_buff[27] = ATL2_READ_REG(hw, REG_TXS_MEM_SIZE);  in atl2_get_regs()
1848 	regs_buff[28] = ATL2_READ_REG(hw, REG_RXD_BASE_ADDR_LO);  in atl2_get_regs()
1849 	regs_buff[29] = ATL2_READ_REG(hw, REG_RXD_BUF_NUM);  in atl2_get_regs()
1850 	regs_buff[30] = ATL2_READ_REG(hw, REG_DMAR);  in atl2_get_regs()
1851 	regs_buff[31] = ATL2_READ_REG(hw, REG_TX_CUT_THRESH);  in atl2_get_regs()
1852 	regs_buff[32] = ATL2_READ_REG(hw, REG_DMAW);  in atl2_get_regs()
1853 	regs_buff[33] = ATL2_READ_REG(hw, REG_PAUSE_ON_TH);  in atl2_get_regs()
1854 	regs_buff[34] = ATL2_READ_REG(hw, REG_PAUSE_OFF_TH);  in atl2_get_regs()
1855 	regs_buff[35] = ATL2_READ_REG(hw, REG_MB_TXD_WR_IDX);  in atl2_get_regs()
1856 	regs_buff[36] = ATL2_READ_REG(hw, REG_MB_RXD_RD_IDX);  in atl2_get_regs()
1857 	regs_buff[38] = ATL2_READ_REG(hw, REG_ISR);  in atl2_get_regs()
1858 	regs_buff[39] = ATL2_READ_REG(hw, REG_IMR);  in atl2_get_regs()
2100 		icr = ATL2_READ_REG(hw, REG_IDLE_STATUS);  in atl2_reset_hw()
2156 		value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);  in atl2_spi_read()
2164 	*buf = ATL2_READ_REG(hw, REG_SPI_DATA);  in atl2_spi_read()
2258 	Addr[0] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR);  in get_permanent_address()
2259 	Addr[1] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR + 4);  in get_permanent_address()
2475 		val = ATL2_READ_REG(hw, REG_MDIO_CTRL);  in atl2_read_phy_reg()
2510 		val = ATL2_READ_REG(hw, REG_MDIO_CTRL);  in atl2_write_phy_reg()
2608 			val = ATL2_READ_REG(hw, REG_MDIO_CTRL);  in atl2_phy_commit()
2691 	value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);  in atl2_check_eeprom_exist()
2720 		Control = ATL2_READ_REG(hw, REG_VPD_CAP);  in atl2_read_eeprom()
2726 		*pValue = ATL2_READ_REG(hw, REG_VPD_DATA);  in atl2_read_eeprom()