Lines Matching refs:ena_dev
71 static int ena_com_mem_addr_set(struct ena_com_dev *ena_dev, in ena_com_mem_addr_set() argument
75 if ((addr & GENMASK_ULL(ena_dev->dma_addr_bits - 1, 0)) != addr) { in ena_com_mem_addr_set()
76 netdev_err(ena_dev->net_device, in ena_com_mem_addr_set()
89 struct ena_com_dev *ena_dev = admin_queue->ena_dev; in ena_com_admin_init_sq() local
97 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_admin_init_sq()
112 struct ena_com_dev *ena_dev = admin_queue->ena_dev; in ena_com_admin_init_cq() local
120 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_admin_init_cq()
130 static int ena_com_admin_init_aenq(struct ena_com_dev *ena_dev, in ena_com_admin_init_aenq() argument
133 struct ena_com_aenq *aenq = &ena_dev->aenq; in ena_com_admin_init_aenq()
137 ena_dev->aenq.q_depth = ENA_ASYNC_QUEUE_DEPTH; in ena_com_admin_init_aenq()
139 aenq->entries = dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_admin_init_aenq()
143 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_admin_init_aenq()
153 writel(addr_low, ena_dev->reg_bar + ENA_REGS_AENQ_BASE_LO_OFF); in ena_com_admin_init_aenq()
154 writel(addr_high, ena_dev->reg_bar + ENA_REGS_AENQ_BASE_HI_OFF); in ena_com_admin_init_aenq()
157 aenq_caps |= ena_dev->aenq.q_depth & ENA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK; in ena_com_admin_init_aenq()
161 writel(aenq_caps, ena_dev->reg_bar + ENA_REGS_AENQ_CAPS_OFF); in ena_com_admin_init_aenq()
164 netdev_err(ena_dev->net_device, in ena_com_admin_init_aenq()
185 netdev_err(admin_queue->ena_dev->net_device, in get_comp_ctxt()
192 netdev_err(admin_queue->ena_dev->net_device, in get_comp_ctxt()
198 netdev_err(admin_queue->ena_dev->net_device, in get_comp_ctxt()
229 netdev_dbg(admin_queue->ena_dev->net_device, in __ena_com_submit_admin_cmd()
272 struct ena_com_dev *ena_dev = admin_queue->ena_dev; in ena_com_init_comp_ctxt() local
280 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_init_comp_ctxt()
318 static int ena_com_init_io_sq(struct ena_com_dev *ena_dev, in ena_com_init_io_sq() argument
327 io_sq->dma_addr_bits = (u8)ena_dev->dma_addr_bits; in ena_com_init_io_sq()
336 dev_node = dev_to_node(ena_dev->dmadev); in ena_com_init_io_sq()
337 set_dev_node(ena_dev->dmadev, ctx->numa_node); in ena_com_init_io_sq()
339 dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_init_io_sq()
342 set_dev_node(ena_dev->dmadev, dev_node); in ena_com_init_io_sq()
345 dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_init_io_sq()
351 netdev_err(ena_dev->net_device, in ena_com_init_io_sq()
360 ena_dev->llq_info.desc_list_entry_size; in ena_com_init_io_sq()
368 dev_node = dev_to_node(ena_dev->dmadev); in ena_com_init_io_sq()
369 set_dev_node(ena_dev->dmadev, ctx->numa_node); in ena_com_init_io_sq()
371 devm_kzalloc(ena_dev->dmadev, size, GFP_KERNEL); in ena_com_init_io_sq()
372 set_dev_node(ena_dev->dmadev, dev_node); in ena_com_init_io_sq()
375 devm_kzalloc(ena_dev->dmadev, size, GFP_KERNEL); in ena_com_init_io_sq()
378 netdev_err(ena_dev->net_device, in ena_com_init_io_sq()
383 memcpy(&io_sq->llq_info, &ena_dev->llq_info, in ena_com_init_io_sq()
408 static int ena_com_init_io_cq(struct ena_com_dev *ena_dev, in ena_com_init_io_cq() argument
425 prev_node = dev_to_node(ena_dev->dmadev); in ena_com_init_io_cq()
426 set_dev_node(ena_dev->dmadev, ctx->numa_node); in ena_com_init_io_cq()
428 dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_init_io_cq()
430 set_dev_node(ena_dev->dmadev, prev_node); in ena_com_init_io_cq()
433 dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_init_io_cq()
439 netdev_err(ena_dev->net_device, "Memory allocation failed\n"); in ena_com_init_io_cq()
460 netdev_err(admin_queue->ena_dev->net_device, in ena_com_handle_single_admin_completion()
517 netdev_err(admin_queue->ena_dev->net_device, in ena_com_comp_status_to_errno()
566 netdev_err(admin_queue->ena_dev->net_device, in ena_com_wait_and_process_admin_cq_polling()
579 admin_queue->ena_dev->ena_min_poll_delay_us); in ena_com_wait_and_process_admin_cq_polling()
583 netdev_err(admin_queue->ena_dev->net_device, in ena_com_wait_and_process_admin_cq_polling()
607 static int ena_com_set_llq(struct ena_com_dev *ena_dev) in ena_com_set_llq() argument
612 struct ena_com_llq_info *llq_info = &ena_dev->llq_info; in ena_com_set_llq()
616 admin_queue = &ena_dev->admin_queue; in ena_com_set_llq()
637 netdev_err(ena_dev->net_device, in ena_com_set_llq()
643 static int ena_com_config_llq_info(struct ena_com_dev *ena_dev, in ena_com_config_llq_info() argument
647 struct ena_com_llq_info *llq_info = &ena_dev->llq_info; in ena_com_config_llq_info()
660 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
676 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
682 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
706 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
712 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
721 netdev_err(ena_dev->net_device, "Illegal entry size %d\n", in ena_com_config_llq_info()
745 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
751 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
768 rc = ena_com_set_llq(ena_dev); in ena_com_config_llq_info()
770 netdev_err(ena_dev->net_device, in ena_com_config_llq_info()
798 netdev_err(admin_queue->ena_dev->net_device, in ena_com_wait_and_process_admin_cq_interrupts()
806 netdev_err(admin_queue->ena_dev->net_device, in ena_com_wait_and_process_admin_cq_interrupts()
831 static u32 ena_com_reg_bar_read32(struct ena_com_dev *ena_dev, u16 offset) in ena_com_reg_bar_read32() argument
833 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_reg_bar_read32()
847 return readl(ena_dev->reg_bar + offset); in ena_com_reg_bar_read32()
858 writel(mmio_read_reg, ena_dev->reg_bar + ENA_REGS_MMIO_REG_READ_OFF); in ena_com_reg_bar_read32()
868 netdev_err(ena_dev->net_device, in ena_com_reg_bar_read32()
877 netdev_err(ena_dev->net_device, in ena_com_reg_bar_read32()
907 static int ena_com_destroy_io_sq(struct ena_com_dev *ena_dev, in ena_com_destroy_io_sq() argument
910 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_destroy_io_sq()
937 netdev_err(ena_dev->net_device, in ena_com_destroy_io_sq()
943 static void ena_com_io_queue_free(struct ena_com_dev *ena_dev, in ena_com_io_queue_free() argument
952 dma_free_coherent(ena_dev->dmadev, size, in ena_com_io_queue_free()
962 dma_free_coherent(ena_dev->dmadev, size, in ena_com_io_queue_free()
970 devm_kfree(ena_dev->dmadev, io_sq->bounce_buf_ctrl.base_buffer); in ena_com_io_queue_free()
975 static int wait_for_reset_state(struct ena_com_dev *ena_dev, u32 timeout, in wait_for_reset_state() argument
985 val = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF); in wait_for_reset_state()
988 netdev_err(ena_dev->net_device, in wait_for_reset_state()
1000 ena_delay_exponential_backoff_us(exp++, ena_dev->ena_min_poll_delay_us); in wait_for_reset_state()
1004 static bool ena_com_check_supported_feature_id(struct ena_com_dev *ena_dev, in ena_com_check_supported_feature_id() argument
1011 !(ena_dev->supported_features & feature_mask)) in ena_com_check_supported_feature_id()
1017 static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev, in ena_com_get_feature_ex() argument
1028 if (!ena_com_check_supported_feature_id(ena_dev, feature_id)) { in ena_com_get_feature_ex()
1029 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_get_feature_ex()
1035 admin_queue = &ena_dev->admin_queue; in ena_com_get_feature_ex()
1045 ret = ena_com_mem_addr_set(ena_dev, in ena_com_get_feature_ex()
1049 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_get_feature_ex()
1066 netdev_err(ena_dev->net_device, in ena_com_get_feature_ex()
1073 static int ena_com_get_feature(struct ena_com_dev *ena_dev, in ena_com_get_feature() argument
1078 return ena_com_get_feature_ex(ena_dev, in ena_com_get_feature()
1086 int ena_com_get_current_hash_function(struct ena_com_dev *ena_dev) in ena_com_get_current_hash_function() argument
1088 return ena_dev->rss.hash_func; in ena_com_get_current_hash_function()
1091 static void ena_com_hash_key_fill_default_key(struct ena_com_dev *ena_dev) in ena_com_hash_key_fill_default_key() argument
1094 (ena_dev->rss).hash_key; in ena_com_hash_key_fill_default_key()
1103 static int ena_com_hash_key_allocate(struct ena_com_dev *ena_dev) in ena_com_hash_key_allocate() argument
1105 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_key_allocate()
1107 if (!ena_com_check_supported_feature_id(ena_dev, in ena_com_hash_key_allocate()
1112 dma_alloc_coherent(ena_dev->dmadev, sizeof(*rss->hash_key), in ena_com_hash_key_allocate()
1121 static void ena_com_hash_key_destroy(struct ena_com_dev *ena_dev) in ena_com_hash_key_destroy() argument
1123 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_key_destroy()
1126 dma_free_coherent(ena_dev->dmadev, sizeof(*rss->hash_key), in ena_com_hash_key_destroy()
1131 static int ena_com_hash_ctrl_init(struct ena_com_dev *ena_dev) in ena_com_hash_ctrl_init() argument
1133 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_ctrl_init()
1136 dma_alloc_coherent(ena_dev->dmadev, sizeof(*rss->hash_ctrl), in ena_com_hash_ctrl_init()
1145 static void ena_com_hash_ctrl_destroy(struct ena_com_dev *ena_dev) in ena_com_hash_ctrl_destroy() argument
1147 struct ena_rss *rss = &ena_dev->rss; in ena_com_hash_ctrl_destroy()
1150 dma_free_coherent(ena_dev->dmadev, sizeof(*rss->hash_ctrl), in ena_com_hash_ctrl_destroy()
1155 static int ena_com_indirect_table_allocate(struct ena_com_dev *ena_dev, in ena_com_indirect_table_allocate() argument
1158 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_allocate()
1163 ret = ena_com_get_feature(ena_dev, &get_resp, in ena_com_indirect_table_allocate()
1170 netdev_err(ena_dev->net_device, in ena_com_indirect_table_allocate()
1181 dma_alloc_coherent(ena_dev->dmadev, tbl_size, in ena_com_indirect_table_allocate()
1188 devm_kzalloc(ena_dev->dmadev, tbl_size, GFP_KERNEL); in ena_com_indirect_table_allocate()
1200 dma_free_coherent(ena_dev->dmadev, tbl_size, rss->rss_ind_tbl, in ena_com_indirect_table_allocate()
1208 static void ena_com_indirect_table_destroy(struct ena_com_dev *ena_dev) in ena_com_indirect_table_destroy() argument
1210 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_destroy()
1215 dma_free_coherent(ena_dev->dmadev, tbl_size, rss->rss_ind_tbl, in ena_com_indirect_table_destroy()
1220 devm_kfree(ena_dev->dmadev, rss->host_rss_ind_tbl); in ena_com_indirect_table_destroy()
1224 static int ena_com_create_io_sq(struct ena_com_dev *ena_dev, in ena_com_create_io_sq() argument
1227 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_create_io_sq()
1260 ret = ena_com_mem_addr_set(ena_dev, in ena_com_create_io_sq()
1264 netdev_err(ena_dev->net_device, in ena_com_create_io_sq()
1276 netdev_err(ena_dev->net_device, in ena_com_create_io_sq()
1283 io_sq->db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_sq()
1287 io_sq->header_addr = (u8 __iomem *)((uintptr_t)ena_dev->mem_bar in ena_com_create_io_sq()
1291 (u8 __iomem *)((uintptr_t)ena_dev->mem_bar + in ena_com_create_io_sq()
1295 netdev_dbg(ena_dev->net_device, "Created sq[%u], depth[%u]\n", in ena_com_create_io_sq()
1301 static int ena_com_ind_tbl_convert_to_device(struct ena_com_dev *ena_dev) in ena_com_ind_tbl_convert_to_device() argument
1303 struct ena_rss *rss = &ena_dev->rss; in ena_com_ind_tbl_convert_to_device()
1313 io_sq = &ena_dev->io_sq_queues[qid]; in ena_com_ind_tbl_convert_to_device()
1324 static void ena_com_update_intr_delay_resolution(struct ena_com_dev *ena_dev, in ena_com_update_intr_delay_resolution() argument
1327 u16 prev_intr_delay_resolution = ena_dev->intr_delay_resolution; in ena_com_update_intr_delay_resolution()
1330 netdev_err(ena_dev->net_device, in ena_com_update_intr_delay_resolution()
1336 ena_dev->intr_moder_rx_interval = in ena_com_update_intr_delay_resolution()
1337 ena_dev->intr_moder_rx_interval * in ena_com_update_intr_delay_resolution()
1342 ena_dev->intr_moder_tx_interval = in ena_com_update_intr_delay_resolution()
1343 ena_dev->intr_moder_tx_interval * in ena_com_update_intr_delay_resolution()
1347 ena_dev->intr_delay_resolution = intr_delay_resolution; in ena_com_update_intr_delay_resolution()
1368 netdev_dbg(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1371 netdev_err(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1380 netdev_err(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1383 netdev_dbg(admin_queue->ena_dev->net_device, in ena_com_execute_admin_command()
1389 int ena_com_create_io_cq(struct ena_com_dev *ena_dev, in ena_com_create_io_cq() argument
1392 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_create_io_cq()
1409 ret = ena_com_mem_addr_set(ena_dev, in ena_com_create_io_cq()
1413 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_create_io_cq()
1423 netdev_err(ena_dev->net_device, in ena_com_create_io_cq()
1430 io_cq->unmask_reg = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()
1435 (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()
1440 (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()
1443 netdev_dbg(ena_dev->net_device, "Created cq[%u], depth[%u]\n", in ena_com_create_io_cq()
1449 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid, in ena_com_get_io_handlers() argument
1454 netdev_err(ena_dev->net_device, in ena_com_get_io_handlers()
1460 *io_sq = &ena_dev->io_sq_queues[qid]; in ena_com_get_io_handlers()
1461 *io_cq = &ena_dev->io_cq_queues[qid]; in ena_com_get_io_handlers()
1466 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev) in ena_com_abort_admin_commands() argument
1468 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_abort_admin_commands()
1486 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev) in ena_com_wait_for_abort_completion() argument
1488 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_wait_for_abort_completion()
1496 ena_dev->ena_min_poll_delay_us); in ena_com_wait_for_abort_completion()
1502 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev, in ena_com_destroy_io_cq() argument
1505 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_destroy_io_cq()
1522 netdev_err(ena_dev->net_device, in ena_com_destroy_io_cq()
1528 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev) in ena_com_get_admin_running_state() argument
1530 return ena_dev->admin_queue.running_state; in ena_com_get_admin_running_state()
1533 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state) in ena_com_set_admin_running_state() argument
1535 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_set_admin_running_state()
1539 ena_dev->admin_queue.running_state = state; in ena_com_set_admin_running_state()
1543 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev) in ena_com_admin_aenq_enable() argument
1545 u16 depth = ena_dev->aenq.q_depth; in ena_com_admin_aenq_enable()
1547 WARN(ena_dev->aenq.head != depth, "Invalid AENQ state\n"); in ena_com_admin_aenq_enable()
1552 writel(depth, ena_dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF); in ena_com_admin_aenq_enable()
1555 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag) in ena_com_set_aenq_config() argument
1563 ret = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_AENQ_CONFIG, 0); in ena_com_set_aenq_config()
1565 dev_info(ena_dev->dmadev, "Can't get aenq configuration\n"); in ena_com_set_aenq_config()
1570 netdev_warn(ena_dev->net_device, in ena_com_set_aenq_config()
1577 admin_queue = &ena_dev->admin_queue; in ena_com_set_aenq_config()
1591 netdev_err(ena_dev->net_device, in ena_com_set_aenq_config()
1597 int ena_com_get_dma_width(struct ena_com_dev *ena_dev) in ena_com_get_dma_width() argument
1599 u32 caps = ena_com_reg_bar_read32(ena_dev, ENA_REGS_CAPS_OFF); in ena_com_get_dma_width()
1603 netdev_err(ena_dev->net_device, "Reg read timeout occurred\n"); in ena_com_get_dma_width()
1610 netdev_dbg(ena_dev->net_device, "ENA dma width: %d\n", width); in ena_com_get_dma_width()
1613 netdev_err(ena_dev->net_device, "DMA width illegal value: %d\n", in ena_com_get_dma_width()
1618 ena_dev->dma_addr_bits = width; in ena_com_get_dma_width()
1623 int ena_com_validate_version(struct ena_com_dev *ena_dev) in ena_com_validate_version() argument
1632 ver = ena_com_reg_bar_read32(ena_dev, ENA_REGS_VERSION_OFF); in ena_com_validate_version()
1633 ctrl_ver = ena_com_reg_bar_read32(ena_dev, in ena_com_validate_version()
1638 netdev_err(ena_dev->net_device, "Reg read timeout occurred\n"); in ena_com_validate_version()
1642 dev_info(ena_dev->dmadev, "ENA device version: %d.%d\n", in ena_com_validate_version()
1647 dev_info(ena_dev->dmadev, in ena_com_validate_version()
1664 netdev_err(ena_dev->net_device, in ena_com_validate_version()
1673 ena_com_free_ena_admin_queue_comp_ctx(struct ena_com_dev *ena_dev, in ena_com_free_ena_admin_queue_comp_ctx() argument
1680 devm_kfree(ena_dev->dmadev, admin_queue->comp_ctx); in ena_com_free_ena_admin_queue_comp_ctx()
1685 void ena_com_admin_destroy(struct ena_com_dev *ena_dev) in ena_com_admin_destroy() argument
1687 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_admin_destroy()
1690 struct ena_com_aenq *aenq = &ena_dev->aenq; in ena_com_admin_destroy()
1693 ena_com_free_ena_admin_queue_comp_ctx(ena_dev, admin_queue); in ena_com_admin_destroy()
1697 dma_free_coherent(ena_dev->dmadev, size, sq->entries, in ena_com_admin_destroy()
1703 dma_free_coherent(ena_dev->dmadev, size, cq->entries, in ena_com_admin_destroy()
1708 if (ena_dev->aenq.entries) in ena_com_admin_destroy()
1709 dma_free_coherent(ena_dev->dmadev, size, aenq->entries, in ena_com_admin_destroy()
1714 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling) in ena_com_set_admin_polling_mode() argument
1721 writel(mask_value, ena_dev->reg_bar + ENA_REGS_INTR_MASK_OFF); in ena_com_set_admin_polling_mode()
1722 ena_dev->admin_queue.polling = polling; in ena_com_set_admin_polling_mode()
1725 void ena_com_set_admin_auto_polling_mode(struct ena_com_dev *ena_dev, in ena_com_set_admin_auto_polling_mode() argument
1728 ena_dev->admin_queue.auto_polling = polling; in ena_com_set_admin_auto_polling_mode()
1731 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev) in ena_com_mmio_reg_read_request_init() argument
1733 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_mmio_reg_read_request_init()
1737 dma_alloc_coherent(ena_dev->dmadev, in ena_com_mmio_reg_read_request_init()
1743 ena_com_mmio_reg_read_request_write_dev_addr(ena_dev); in ena_com_mmio_reg_read_request_init()
1756 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev, bool readless_supported) in ena_com_set_mmio_read_mode() argument
1758 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_set_mmio_read_mode()
1763 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev) in ena_com_mmio_reg_read_request_destroy() argument
1765 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_mmio_reg_read_request_destroy()
1767 writel(0x0, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_LO_OFF); in ena_com_mmio_reg_read_request_destroy()
1768 writel(0x0, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_HI_OFF); in ena_com_mmio_reg_read_request_destroy()
1770 dma_free_coherent(ena_dev->dmadev, sizeof(*mmio_read->read_resp), in ena_com_mmio_reg_read_request_destroy()
1776 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev) in ena_com_mmio_reg_read_request_write_dev_addr() argument
1778 struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; in ena_com_mmio_reg_read_request_write_dev_addr()
1784 writel(addr_low, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_LO_OFF); in ena_com_mmio_reg_read_request_write_dev_addr()
1785 writel(addr_high, ena_dev->reg_bar + ENA_REGS_MMIO_RESP_HI_OFF); in ena_com_mmio_reg_read_request_write_dev_addr()
1788 int ena_com_admin_init(struct ena_com_dev *ena_dev, in ena_com_admin_init() argument
1791 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_admin_init()
1795 dev_sts = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF); in ena_com_admin_init()
1798 netdev_err(ena_dev->net_device, "Reg read timeout occurred\n"); in ena_com_admin_init()
1803 netdev_err(ena_dev->net_device, in ena_com_admin_init()
1810 admin_queue->q_dmadev = ena_dev->dmadev; in ena_com_admin_init()
1830 admin_queue->sq.db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_admin_init()
1836 writel(addr_low, ena_dev->reg_bar + ENA_REGS_AQ_BASE_LO_OFF); in ena_com_admin_init()
1837 writel(addr_high, ena_dev->reg_bar + ENA_REGS_AQ_BASE_HI_OFF); in ena_com_admin_init()
1842 writel(addr_low, ena_dev->reg_bar + ENA_REGS_ACQ_BASE_LO_OFF); in ena_com_admin_init()
1843 writel(addr_high, ena_dev->reg_bar + ENA_REGS_ACQ_BASE_HI_OFF); in ena_com_admin_init()
1857 writel(aq_caps, ena_dev->reg_bar + ENA_REGS_AQ_CAPS_OFF); in ena_com_admin_init()
1858 writel(acq_caps, ena_dev->reg_bar + ENA_REGS_ACQ_CAPS_OFF); in ena_com_admin_init()
1859 ret = ena_com_admin_init_aenq(ena_dev, aenq_handlers); in ena_com_admin_init()
1863 admin_queue->ena_dev = ena_dev; in ena_com_admin_init()
1868 ena_com_admin_destroy(ena_dev); in ena_com_admin_init()
1873 int ena_com_create_io_queue(struct ena_com_dev *ena_dev, in ena_com_create_io_queue() argument
1881 netdev_err(ena_dev->net_device, in ena_com_create_io_queue()
1887 io_sq = &ena_dev->io_sq_queues[ctx->qid]; in ena_com_create_io_queue()
1888 io_cq = &ena_dev->io_cq_queues[ctx->qid]; in ena_com_create_io_queue()
1909 min_t(u32, ena_dev->tx_max_header_size, SZ_256); in ena_com_create_io_queue()
1911 ret = ena_com_init_io_sq(ena_dev, ctx, io_sq); in ena_com_create_io_queue()
1914 ret = ena_com_init_io_cq(ena_dev, ctx, io_cq); in ena_com_create_io_queue()
1918 ret = ena_com_create_io_cq(ena_dev, io_cq); in ena_com_create_io_queue()
1922 ret = ena_com_create_io_sq(ena_dev, io_sq, io_cq->idx); in ena_com_create_io_queue()
1929 ena_com_destroy_io_cq(ena_dev, io_cq); in ena_com_create_io_queue()
1931 ena_com_io_queue_free(ena_dev, io_sq, io_cq); in ena_com_create_io_queue()
1935 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid) in ena_com_destroy_io_queue() argument
1941 netdev_err(ena_dev->net_device, in ena_com_destroy_io_queue()
1947 io_sq = &ena_dev->io_sq_queues[qid]; in ena_com_destroy_io_queue()
1948 io_cq = &ena_dev->io_cq_queues[qid]; in ena_com_destroy_io_queue()
1950 ena_com_destroy_io_sq(ena_dev, io_sq); in ena_com_destroy_io_queue()
1951 ena_com_destroy_io_cq(ena_dev, io_cq); in ena_com_destroy_io_queue()
1953 ena_com_io_queue_free(ena_dev, io_sq, io_cq); in ena_com_destroy_io_queue()
1956 int ena_com_get_link_params(struct ena_com_dev *ena_dev, in ena_com_get_link_params() argument
1959 return ena_com_get_feature(ena_dev, resp, ENA_ADMIN_LINK_CONFIG, 0); in ena_com_get_link_params()
1962 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, in ena_com_get_dev_attr_feat() argument
1968 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
1976 ena_dev->supported_features = get_resp.u.dev_attr.supported_features; in ena_com_get_dev_attr_feat()
1977 ena_dev->capabilities = get_resp.u.dev_attr.capabilities; in ena_com_get_dev_attr_feat()
1979 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) { in ena_com_get_dev_attr_feat()
1980 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
1992 ena_dev->tx_max_header_size = in ena_com_get_dev_attr_feat()
1995 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
1999 ena_dev->tx_max_header_size = in ena_com_get_dev_attr_feat()
2006 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
2014 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_get_dev_attr_feat()
2025 rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_HW_HINTS, 0); in ena_com_get_dev_attr_feat()
2036 rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_LLQ, 0); in ena_com_get_dev_attr_feat()
2048 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev) in ena_com_admin_q_comp_intr_handler() argument
2050 ena_com_handle_admin_completion(&ena_dev->admin_queue); in ena_com_admin_q_comp_intr_handler()
2056 static ena_aenq_handler ena_com_get_specific_aenq_cb(struct ena_com_dev *ena_dev, in ena_com_get_specific_aenq_cb() argument
2059 struct ena_aenq_handlers *aenq_handlers = ena_dev->aenq.aenq_handlers; in ena_com_get_specific_aenq_cb()
2071 void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data) in ena_com_aenq_intr_handler() argument
2075 struct ena_com_aenq *aenq = &ena_dev->aenq; in ena_com_aenq_intr_handler()
2097 netdev_dbg(ena_dev->net_device, in ena_com_aenq_intr_handler()
2102 handler_cb = ena_com_get_specific_aenq_cb(ena_dev, in ena_com_aenq_intr_handler()
2128 ena_dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF); in ena_com_aenq_intr_handler()
2131 int ena_com_dev_reset(struct ena_com_dev *ena_dev, in ena_com_dev_reset() argument
2137 stat = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF); in ena_com_dev_reset()
2138 cap = ena_com_reg_bar_read32(ena_dev, ENA_REGS_CAPS_OFF); in ena_com_dev_reset()
2142 netdev_err(ena_dev->net_device, "Reg read32 timeout occurred\n"); in ena_com_dev_reset()
2147 netdev_err(ena_dev->net_device, in ena_com_dev_reset()
2155 netdev_err(ena_dev->net_device, "Invalid timeout value\n"); in ena_com_dev_reset()
2163 writel(reset_val, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF); in ena_com_dev_reset()
2166 ena_com_mmio_reg_read_request_write_dev_addr(ena_dev); in ena_com_dev_reset()
2168 rc = wait_for_reset_state(ena_dev, timeout, in ena_com_dev_reset()
2171 netdev_err(ena_dev->net_device, in ena_com_dev_reset()
2177 writel(0, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF); in ena_com_dev_reset()
2178 rc = wait_for_reset_state(ena_dev, timeout, 0); in ena_com_dev_reset()
2180 netdev_err(ena_dev->net_device, in ena_com_dev_reset()
2189 ena_dev->admin_queue.completion_timeout = timeout * 100000; in ena_com_dev_reset()
2191 ena_dev->admin_queue.completion_timeout = ADMIN_CMD_TIMEOUT_US; in ena_com_dev_reset()
2196 static int ena_get_dev_stats(struct ena_com_dev *ena_dev, in ena_get_dev_stats() argument
2205 admin_queue = &ena_dev->admin_queue; in ena_get_dev_stats()
2218 netdev_err(ena_dev->net_device, in ena_get_dev_stats()
2224 int ena_com_get_eni_stats(struct ena_com_dev *ena_dev, in ena_com_get_eni_stats() argument
2230 if (!ena_com_get_cap(ena_dev, ENA_ADMIN_ENI_STATS)) { in ena_com_get_eni_stats()
2231 netdev_err(ena_dev->net_device, in ena_com_get_eni_stats()
2238 ret = ena_get_dev_stats(ena_dev, &ctx, ENA_ADMIN_GET_STATS_TYPE_ENI); in ena_com_get_eni_stats()
2246 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev, in ena_com_get_dev_basic_stats() argument
2253 ret = ena_get_dev_stats(ena_dev, &ctx, ENA_ADMIN_GET_STATS_TYPE_BASIC); in ena_com_get_dev_basic_stats()
2261 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, u32 mtu) in ena_com_set_dev_mtu() argument
2268 if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_MTU)) { in ena_com_set_dev_mtu()
2269 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_set_dev_mtu()
2275 admin_queue = &ena_dev->admin_queue; in ena_com_set_dev_mtu()
2289 netdev_err(ena_dev->net_device, in ena_com_set_dev_mtu()
2295 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev, in ena_com_get_offload_settings() argument
2301 ret = ena_com_get_feature(ena_dev, &resp, in ena_com_get_offload_settings()
2304 netdev_err(ena_dev->net_device, in ena_com_get_offload_settings()
2314 int ena_com_set_hash_function(struct ena_com_dev *ena_dev) in ena_com_set_hash_function() argument
2316 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_set_hash_function()
2317 struct ena_rss *rss = &ena_dev->rss; in ena_com_set_hash_function()
2323 if (!ena_com_check_supported_feature_id(ena_dev, in ena_com_set_hash_function()
2325 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_set_hash_function()
2331 ret = ena_com_get_feature(ena_dev, &get_resp, in ena_com_set_hash_function()
2337 netdev_err(ena_dev->net_device, in ena_com_set_hash_function()
2352 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_hash_function()
2356 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_hash_function()
2368 netdev_err(ena_dev->net_device, in ena_com_set_hash_function()
2377 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev, in ena_com_fill_hash_function() argument
2384 struct ena_rss *rss = &ena_dev->rss; in ena_com_fill_hash_function()
2393 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_fill_hash_function()
2401 netdev_err(ena_dev->net_device, in ena_com_fill_hash_function()
2408 netdev_err(ena_dev->net_device, in ena_com_fill_hash_function()
2420 rc = ena_com_set_hash_function(ena_dev); in ena_com_fill_hash_function()
2429 int ena_com_get_hash_function(struct ena_com_dev *ena_dev, in ena_com_get_hash_function() argument
2432 struct ena_rss *rss = &ena_dev->rss; in ena_com_get_hash_function()
2439 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_get_hash_function()
2456 int ena_com_get_hash_key(struct ena_com_dev *ena_dev, u8 *key) in ena_com_get_hash_key() argument
2459 ena_dev->rss.hash_key; in ena_com_get_hash_key()
2468 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev, in ena_com_get_hash_ctrl() argument
2472 struct ena_rss *rss = &ena_dev->rss; in ena_com_get_hash_ctrl()
2476 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_get_hash_ctrl()
2489 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev) in ena_com_set_hash_ctrl() argument
2491 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_set_hash_ctrl()
2492 struct ena_rss *rss = &ena_dev->rss; in ena_com_set_hash_ctrl()
2498 if (!ena_com_check_supported_feature_id(ena_dev, in ena_com_set_hash_ctrl()
2500 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_set_hash_ctrl()
2515 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_hash_ctrl()
2519 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_hash_ctrl()
2530 netdev_err(ena_dev->net_device, in ena_com_set_hash_ctrl()
2536 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev) in ena_com_set_default_hash_ctrl() argument
2538 struct ena_rss *rss = &ena_dev->rss; in ena_com_set_default_hash_ctrl()
2545 rc = ena_com_get_hash_ctrl(ena_dev, 0, NULL); in ena_com_set_default_hash_ctrl()
2581 netdev_err(ena_dev->net_device, in ena_com_set_default_hash_ctrl()
2589 rc = ena_com_set_hash_ctrl(ena_dev); in ena_com_set_default_hash_ctrl()
2593 ena_com_get_hash_ctrl(ena_dev, 0, NULL); in ena_com_set_default_hash_ctrl()
2598 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev, in ena_com_fill_hash_ctrl() argument
2602 struct ena_rss *rss = &ena_dev->rss; in ena_com_fill_hash_ctrl()
2608 netdev_err(ena_dev->net_device, "Invalid proto num (%u)\n", in ena_com_fill_hash_ctrl()
2614 rc = ena_com_get_hash_ctrl(ena_dev, proto, NULL); in ena_com_fill_hash_ctrl()
2621 netdev_err(ena_dev->net_device, in ena_com_fill_hash_ctrl()
2628 rc = ena_com_set_hash_ctrl(ena_dev); in ena_com_fill_hash_ctrl()
2632 ena_com_get_hash_ctrl(ena_dev, 0, NULL); in ena_com_fill_hash_ctrl()
2637 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev, in ena_com_indirect_table_fill_entry() argument
2640 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_fill_entry()
2653 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev) in ena_com_indirect_table_set() argument
2655 struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; in ena_com_indirect_table_set()
2656 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_set()
2662 ena_dev, ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG)) { in ena_com_indirect_table_set()
2663 netdev_dbg(ena_dev->net_device, "Feature %d isn't supported\n", in ena_com_indirect_table_set()
2668 ret = ena_com_ind_tbl_convert_to_device(ena_dev); in ena_com_indirect_table_set()
2670 netdev_err(ena_dev->net_device, in ena_com_indirect_table_set()
2684 ret = ena_com_mem_addr_set(ena_dev, in ena_com_indirect_table_set()
2688 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_indirect_table_set()
2702 netdev_err(ena_dev->net_device, in ena_com_indirect_table_set()
2708 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl) in ena_com_indirect_table_get() argument
2710 struct ena_rss *rss = &ena_dev->rss; in ena_com_indirect_table_get()
2718 rc = ena_com_get_feature_ex(ena_dev, &get_resp, in ena_com_indirect_table_get()
2734 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 indr_tbl_log_size) in ena_com_rss_init() argument
2738 memset(&ena_dev->rss, 0x0, sizeof(ena_dev->rss)); in ena_com_rss_init()
2740 rc = ena_com_indirect_table_allocate(ena_dev, indr_tbl_log_size); in ena_com_rss_init()
2748 rc = ena_com_hash_key_allocate(ena_dev); in ena_com_rss_init()
2750 ena_com_hash_key_fill_default_key(ena_dev); in ena_com_rss_init()
2754 rc = ena_com_hash_ctrl_init(ena_dev); in ena_com_rss_init()
2761 ena_com_hash_key_destroy(ena_dev); in ena_com_rss_init()
2763 ena_com_indirect_table_destroy(ena_dev); in ena_com_rss_init()
2769 void ena_com_rss_destroy(struct ena_com_dev *ena_dev) in ena_com_rss_destroy() argument
2771 ena_com_indirect_table_destroy(ena_dev); in ena_com_rss_destroy()
2772 ena_com_hash_key_destroy(ena_dev); in ena_com_rss_destroy()
2773 ena_com_hash_ctrl_destroy(ena_dev); in ena_com_rss_destroy()
2775 memset(&ena_dev->rss, 0x0, sizeof(ena_dev->rss)); in ena_com_rss_destroy()
2778 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev) in ena_com_allocate_host_info() argument
2780 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_allocate_host_info()
2783 dma_alloc_coherent(ena_dev->dmadev, SZ_4K, in ena_com_allocate_host_info()
2795 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev, in ena_com_allocate_debug_area() argument
2798 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_allocate_debug_area()
2801 dma_alloc_coherent(ena_dev->dmadev, debug_area_size, in ena_com_allocate_debug_area()
2813 void ena_com_delete_host_info(struct ena_com_dev *ena_dev) in ena_com_delete_host_info() argument
2815 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_delete_host_info()
2818 dma_free_coherent(ena_dev->dmadev, SZ_4K, host_attr->host_info, in ena_com_delete_host_info()
2824 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev) in ena_com_delete_debug_area() argument
2826 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_delete_debug_area()
2829 dma_free_coherent(ena_dev->dmadev, host_attr->debug_area_size, in ena_com_delete_debug_area()
2836 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev) in ena_com_set_host_attributes() argument
2838 struct ena_host_attribute *host_attr = &ena_dev->host_attr; in ena_com_set_host_attributes()
2850 admin_queue = &ena_dev->admin_queue; in ena_com_set_host_attributes()
2855 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_host_attributes()
2859 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_host_attributes()
2863 ret = ena_com_mem_addr_set(ena_dev, in ena_com_set_host_attributes()
2867 netdev_err(ena_dev->net_device, "Memory address set failed\n"); in ena_com_set_host_attributes()
2880 netdev_err(ena_dev->net_device, in ena_com_set_host_attributes()
2887 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev) in ena_com_interrupt_moderation_supported() argument
2889 return ena_com_check_supported_feature_id(ena_dev, in ena_com_interrupt_moderation_supported()
2893 static int ena_com_update_nonadaptive_moderation_interval(struct ena_com_dev *ena_dev, in ena_com_update_nonadaptive_moderation_interval() argument
2899 netdev_err(ena_dev->net_device, in ena_com_update_nonadaptive_moderation_interval()
2909 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev, in ena_com_update_nonadaptive_moderation_interval_tx() argument
2912 return ena_com_update_nonadaptive_moderation_interval(ena_dev, in ena_com_update_nonadaptive_moderation_interval_tx()
2914 ena_dev->intr_delay_resolution, in ena_com_update_nonadaptive_moderation_interval_tx()
2915 &ena_dev->intr_moder_tx_interval); in ena_com_update_nonadaptive_moderation_interval_tx()
2918 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev, in ena_com_update_nonadaptive_moderation_interval_rx() argument
2921 return ena_com_update_nonadaptive_moderation_interval(ena_dev, in ena_com_update_nonadaptive_moderation_interval_rx()
2923 ena_dev->intr_delay_resolution, in ena_com_update_nonadaptive_moderation_interval_rx()
2924 &ena_dev->intr_moder_rx_interval); in ena_com_update_nonadaptive_moderation_interval_rx()
2927 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev) in ena_com_init_interrupt_moderation() argument
2933 rc = ena_com_get_feature(ena_dev, &get_resp, in ena_com_init_interrupt_moderation()
2938 netdev_dbg(ena_dev->net_device, in ena_com_init_interrupt_moderation()
2943 netdev_err(ena_dev->net_device, in ena_com_init_interrupt_moderation()
2949 ena_com_disable_adaptive_moderation(ena_dev); in ena_com_init_interrupt_moderation()
2955 ena_com_update_intr_delay_resolution(ena_dev, delay_resolution); in ena_com_init_interrupt_moderation()
2958 ena_com_disable_adaptive_moderation(ena_dev); in ena_com_init_interrupt_moderation()
2963 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev) in ena_com_get_nonadaptive_moderation_interval_tx() argument
2965 return ena_dev->intr_moder_tx_interval; in ena_com_get_nonadaptive_moderation_interval_tx()
2968 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev) in ena_com_get_nonadaptive_moderation_interval_rx() argument
2970 return ena_dev->intr_moder_rx_interval; in ena_com_get_nonadaptive_moderation_interval_rx()
2973 int ena_com_config_dev_mode(struct ena_com_dev *ena_dev, in ena_com_config_dev_mode() argument
2977 struct ena_com_llq_info *llq_info = &ena_dev->llq_info; in ena_com_config_dev_mode()
2981 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST; in ena_com_config_dev_mode()
2985 rc = ena_com_config_llq_info(ena_dev, llq_features, llq_default_cfg); in ena_com_config_dev_mode()
2989 ena_dev->tx_max_header_size = llq_info->desc_list_entry_size - in ena_com_config_dev_mode()
2992 if (unlikely(ena_dev->tx_max_header_size == 0)) { in ena_com_config_dev_mode()
2993 netdev_err(ena_dev->net_device, in ena_com_config_dev_mode()
2998 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_DEV; in ena_com_config_dev_mode()