Lines Matching +full:smi +full:- +full:mdio
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Marvell 88e6xxx Ethernet switch single-chip support
9 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
24 #include <linux/mdio.h>
44 #include "smi.h"
48 if (unlikely(!mutex_is_locked(&chip->reg_lock))) { in assert_reg_lock()
49 dev_err(chip->dev, "Switch registers lock not held!\n"); in assert_reg_lock()
64 dev_dbg(chip->dev, "<- addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n", in mv88e6xxx_read()
80 dev_dbg(chip->dev, "-> addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n", in mv88e6xxx_write()
119 dev_err(chip->dev, "Timeout while waiting for switch\n"); in mv88e6xxx_wait_mask()
120 return -ETIMEDOUT; in mv88e6xxx_wait_mask()
134 mdio_bus = list_first_entry(&chip->mdios, struct mv88e6xxx_mdio_bus, in mv88e6xxx_default_mdio_bus()
139 return mdio_bus->bus; in mv88e6xxx_default_mdio_bus()
145 unsigned int n = d->hwirq; in mv88e6xxx_g1_irq_mask()
147 chip->g1_irq.masked |= (1 << n); in mv88e6xxx_g1_irq_mask()
153 unsigned int n = d->hwirq; in mv88e6xxx_g1_irq_unmask()
155 chip->g1_irq.masked &= ~(1 << n); in mv88e6xxx_g1_irq_unmask()
175 for (n = 0; n < chip->g1_irq.nirqs; ++n) { in mv88e6xxx_g1_irq_thread_work()
177 sub_irq = irq_find_mapping(chip->g1_irq.domain, in mv88e6xxx_g1_irq_thread_work()
193 ctl1 &= GENMASK(chip->g1_irq.nirqs, 0); in mv88e6xxx_g1_irq_thread_work()
217 u16 mask = GENMASK(chip->g1_irq.nirqs, 0); in mv88e6xxx_g1_irq_bus_sync_unlock()
226 reg |= (~chip->g1_irq.masked & mask); in mv88e6xxx_g1_irq_bus_sync_unlock()
237 .name = "mv88e6xxx-g1",
248 struct mv88e6xxx_chip *chip = d->host_data; in mv88e6xxx_g1_irq_domain_map()
250 irq_set_chip_data(irq, d->host_data); in mv88e6xxx_g1_irq_domain_map()
251 irq_set_chip_and_handler(irq, &chip->g1_irq.chip, handle_level_irq); in mv88e6xxx_g1_irq_domain_map()
269 mask &= ~GENMASK(chip->g1_irq.nirqs, 0); in mv88e6xxx_g1_irq_free_common()
272 for (irq = 0; irq < chip->g1_irq.nirqs; irq++) { in mv88e6xxx_g1_irq_free_common()
273 virq = irq_find_mapping(chip->g1_irq.domain, irq); in mv88e6xxx_g1_irq_free_common()
277 irq_domain_remove(chip->g1_irq.domain); in mv88e6xxx_g1_irq_free_common()
286 free_irq(chip->irq, chip); in mv88e6xxx_g1_irq_free()
298 chip->g1_irq.nirqs = chip->info->g1_irqs; in mv88e6xxx_g1_irq_setup_common()
299 chip->g1_irq.domain = irq_domain_add_simple( in mv88e6xxx_g1_irq_setup_common()
300 NULL, chip->g1_irq.nirqs, 0, in mv88e6xxx_g1_irq_setup_common()
302 if (!chip->g1_irq.domain) in mv88e6xxx_g1_irq_setup_common()
303 return -ENOMEM; in mv88e6xxx_g1_irq_setup_common()
305 for (irq = 0; irq < chip->g1_irq.nirqs; irq++) in mv88e6xxx_g1_irq_setup_common()
306 irq_create_mapping(chip->g1_irq.domain, irq); in mv88e6xxx_g1_irq_setup_common()
308 chip->g1_irq.chip = mv88e6xxx_g1_irq_chip; in mv88e6xxx_g1_irq_setup_common()
309 chip->g1_irq.masked = ~0; in mv88e6xxx_g1_irq_setup_common()
315 mask &= ~GENMASK(chip->g1_irq.nirqs, 0); in mv88e6xxx_g1_irq_setup_common()
329 mask &= ~GENMASK(chip->g1_irq.nirqs, 0); in mv88e6xxx_g1_irq_setup_common()
334 virq = irq_find_mapping(chip->g1_irq.domain, irq); in mv88e6xxx_g1_irq_setup_common()
338 irq_domain_remove(chip->g1_irq.domain); in mv88e6xxx_g1_irq_setup_common()
357 irq_set_lockdep_class(chip->irq, &lock_key, &request_key); in mv88e6xxx_g1_irq_setup()
359 snprintf(chip->irq_name, sizeof(chip->irq_name), in mv88e6xxx_g1_irq_setup()
360 "mv88e6xxx-%s", dev_name(chip->dev)); in mv88e6xxx_g1_irq_setup()
363 err = request_threaded_irq(chip->irq, NULL, in mv88e6xxx_g1_irq_setup()
366 chip->irq_name, chip); in mv88e6xxx_g1_irq_setup()
381 kthread_queue_delayed_work(chip->kworker, &chip->irq_poll_work, in mv88e6xxx_irq_poll()
393 kthread_init_delayed_work(&chip->irq_poll_work, in mv88e6xxx_irq_poll_setup()
396 chip->kworker = kthread_create_worker(0, "%s", dev_name(chip->dev)); in mv88e6xxx_irq_poll_setup()
397 if (IS_ERR(chip->kworker)) in mv88e6xxx_irq_poll_setup()
398 return PTR_ERR(chip->kworker); in mv88e6xxx_irq_poll_setup()
400 kthread_queue_delayed_work(chip->kworker, &chip->irq_poll_work, in mv88e6xxx_irq_poll_setup()
408 kthread_cancel_delayed_work_sync(&chip->irq_poll_work); in mv88e6xxx_irq_poll_free()
409 kthread_destroy_worker(chip->kworker); in mv88e6xxx_irq_poll_free()
421 if (chip->info->ops->port_set_rgmii_delay) { in mv88e6xxx_port_config_interface()
422 err = chip->info->ops->port_set_rgmii_delay(chip, port, in mv88e6xxx_port_config_interface()
424 if (err && err != -EOPNOTSUPP) in mv88e6xxx_port_config_interface()
428 if (chip->info->ops->port_set_cmode) { in mv88e6xxx_port_config_interface()
429 err = chip->info->ops->port_set_cmode(chip, port, in mv88e6xxx_port_config_interface()
431 if (err && err != -EOPNOTSUPP) in mv88e6xxx_port_config_interface()
444 if (!chip->info->ops->port_set_link) in mv88e6xxx_port_setup_mac()
448 err = chip->info->ops->port_set_link(chip, port, LINK_FORCED_DOWN); in mv88e6xxx_port_setup_mac()
452 if (chip->info->ops->port_set_speed_duplex) { in mv88e6xxx_port_setup_mac()
453 err = chip->info->ops->port_set_speed_duplex(chip, port, in mv88e6xxx_port_setup_mac()
455 if (err && err != -EOPNOTSUPP) in mv88e6xxx_port_setup_mac()
459 if (chip->info->ops->port_set_pause) { in mv88e6xxx_port_setup_mac()
460 err = chip->info->ops->port_set_pause(chip, port, pause); in mv88e6xxx_port_setup_mac()
467 if (chip->info->ops->port_set_link(chip, port, link)) in mv88e6xxx_port_setup_mac()
468 dev_err(chip->dev, "p%d: failed to restore MAC's link\n", port); in mv88e6xxx_port_setup_mac()
475 return port >= chip->info->internal_phys_offset && in mv88e6xxx_phy_is_internal()
476 port < chip->info->num_internal_phys + in mv88e6xxx_phy_is_internal()
477 chip->info->internal_phys_offset; in mv88e6xxx_phy_is_internal()
488 if (chip->info->family == MV88E6XXX_FAMILY_6250) in mv88e6xxx_port_ppu_updates()
493 dev_err(chip->dev, in mv88e6xxx_port_ppu_updates()
515 u8 cmode = chip->ports[port].cmode; in mv88e6095_phylink_get_caps()
517 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100; in mv88e6095_phylink_get_caps()
520 __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces); in mv88e6095_phylink_get_caps()
525 config->supported_interfaces); in mv88e6095_phylink_get_caps()
527 config->mac_capabilities |= MAC_1000FD; in mv88e6095_phylink_get_caps()
534 u8 cmode = chip->ports[port].cmode; in mv88e6185_phylink_get_caps()
539 config->supported_interfaces); in mv88e6185_phylink_get_caps()
541 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e6185_phylink_get_caps()
572 unsigned long *supported = config->supported_interfaces; in mv88e6250_phylink_get_caps()
575 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); in mv88e6250_phylink_get_caps()
577 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100; in mv88e6250_phylink_get_caps()
589 /* If PHY_DETECT is zero, then we are not in auto-media mode */ in mv88e6352_get_port4_serdes_cmode()
613 unsigned long *supported = config->supported_interfaces; in mv88e6352_phylink_get_caps()
617 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); in mv88e6352_phylink_get_caps()
619 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e6352_phylink_get_caps()
626 dev_err(chip->dev, "p%d: failed to read scratch\n", in mv88e6352_phylink_get_caps()
633 dev_err(chip->dev, "p%d: failed to read serdes cmode\n", in mv88e6352_phylink_get_caps()
643 unsigned long *supported = config->supported_interfaces; in mv88e6341_phylink_get_caps()
646 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); in mv88e6341_phylink_get_caps()
649 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e6341_phylink_get_caps()
658 config->mac_capabilities |= MAC_2500FD; in mv88e6341_phylink_get_caps()
665 unsigned long *supported = config->supported_interfaces; in mv88e6390_phylink_get_caps()
668 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); in mv88e6390_phylink_get_caps()
671 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e6390_phylink_get_caps()
680 config->mac_capabilities |= MAC_2500FD; in mv88e6390_phylink_get_caps()
687 unsigned long *supported = config->supported_interfaces; in mv88e6390x_phylink_get_caps()
691 /* For the 6x90X, ports 2-7 can be in automedia mode. in mv88e6390x_phylink_get_caps()
694 * Port 2 can also support 1000BASE-X in automedia mode if port 9 is in mv88e6390x_phylink_get_caps()
695 * configured for 1000BASE-X, SGMII or 2500BASE-X. in mv88e6390x_phylink_get_caps()
696 * Port 3-4 can also support 1000BASE-X in automedia mode if port 9 is in mv88e6390x_phylink_get_caps()
697 * configured for RXAUI, 1000BASE-X, SGMII or 2500BASE-X. in mv88e6390x_phylink_get_caps()
699 * Port 5 can also support 1000BASE-X in automedia mode if port 10 is in mv88e6390x_phylink_get_caps()
700 * configured for 1000BASE-X, SGMII or 2500BASE-X. in mv88e6390x_phylink_get_caps()
701 * Port 6-7 can also support 1000BASE-X in automedia mode if port 10 is in mv88e6390x_phylink_get_caps()
702 * configured for RXAUI, 1000BASE-X, SGMII or 2500BASE-X. in mv88e6390x_phylink_get_caps()
704 * For now, be permissive (as the old code was) and allow 1000BASE-X in mv88e6390x_phylink_get_caps()
715 config->mac_capabilities |= MAC_10000FD; in mv88e6390x_phylink_get_caps()
722 unsigned long *supported = config->supported_interfaces; in mv88e6393x_phylink_get_caps()
724 chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6191X; in mv88e6393x_phylink_get_caps()
726 chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361; in mv88e6393x_phylink_get_caps()
728 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); in mv88e6393x_phylink_get_caps()
730 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e6393x_phylink_get_caps()
741 config->mac_capabilities |= MAC_2500FD; in mv88e6393x_phylink_get_caps()
748 config->mac_capabilities |= MAC_5000FD | in mv88e6393x_phylink_get_caps()
766 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_caps()
769 chip->info->ops->phylink_get_caps(chip, port, config); in mv88e6xxx_get_caps()
774 config->supported_interfaces); in mv88e6xxx_get_caps()
775 /* Internal ports with no phy-mode need GMII for PHYLIB */ in mv88e6xxx_get_caps()
777 config->supported_interfaces); in mv88e6xxx_get_caps()
785 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_mac_select_pcs()
786 struct phylink_pcs *pcs = ERR_PTR(-EOPNOTSUPP); in mv88e6xxx_mac_select_pcs()
788 if (chip->info->ops->pcs_ops) in mv88e6xxx_mac_select_pcs()
789 pcs = chip->info->ops->pcs_ops->pcs_select(chip, port, in mv88e6xxx_mac_select_pcs()
798 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_mac_prepare()
806 chip->ports[port].interface != interface && in mv88e6xxx_mac_prepare()
807 chip->info->ops->port_set_link) { in mv88e6xxx_mac_prepare()
809 err = chip->info->ops->port_set_link(chip, port, in mv88e6xxx_mac_prepare()
821 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_mac_config()
828 state->interface); in mv88e6xxx_mac_config()
829 if (err && err != -EOPNOTSUPP) in mv88e6xxx_mac_config()
836 if (err && err != -EOPNOTSUPP) in mv88e6xxx_mac_config()
837 dev_err(ds->dev, "p%d: failed to configure MAC/PCS\n", port); in mv88e6xxx_mac_config()
843 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_mac_finish()
848 * up in the in-band case where there is no separate SERDES. Also in mv88e6xxx_mac_finish()
850 * in PHY mode (we treat the PPU as an effective in-band mechanism.) in mv88e6xxx_mac_finish()
854 if (chip->info->ops->port_set_link && in mv88e6xxx_mac_finish()
856 chip->ports[port].interface != interface) || in mv88e6xxx_mac_finish()
858 err = chip->info->ops->port_set_link(chip, port, LINK_UNFORCED); in mv88e6xxx_mac_finish()
862 chip->ports[port].interface = interface; in mv88e6xxx_mac_finish()
871 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_mac_link_down()
875 ops = chip->info->ops; in mv88e6xxx_mac_link_down()
879 * updated by the switch or if we are using fixed-link mode. in mv88e6xxx_mac_link_down()
882 mode == MLO_AN_FIXED) && ops->port_sync_link) in mv88e6xxx_mac_link_down()
883 err = ops->port_sync_link(chip, port, mode, false); in mv88e6xxx_mac_link_down()
885 if (!err && ops->port_set_speed_duplex) in mv88e6xxx_mac_link_down()
886 err = ops->port_set_speed_duplex(chip, port, SPEED_UNFORCED, in mv88e6xxx_mac_link_down()
891 dev_err(chip->dev, in mv88e6xxx_mac_link_down()
901 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_mac_link_up()
905 ops = chip->info->ops; in mv88e6xxx_mac_link_up()
909 * automatically updated by the switch or if we are using fixed-link in mv88e6xxx_mac_link_up()
914 if (ops->port_set_speed_duplex) { in mv88e6xxx_mac_link_up()
915 err = ops->port_set_speed_duplex(chip, port, in mv88e6xxx_mac_link_up()
917 if (err && err != -EOPNOTSUPP) in mv88e6xxx_mac_link_up()
921 if (ops->port_sync_link) in mv88e6xxx_mac_link_up()
922 err = ops->port_sync_link(chip, port, mode, true); in mv88e6xxx_mac_link_up()
927 if (err && err != -EOPNOTSUPP) in mv88e6xxx_mac_link_up()
928 dev_err(ds->dev, in mv88e6xxx_mac_link_up()
934 if (!chip->info->ops->stats_snapshot) in mv88e6xxx_stats_snapshot()
935 return -EOPNOTSUPP; in mv88e6xxx_stats_snapshot()
937 return chip->info->ops->stats_snapshot(chip, port); in mv88e6xxx_stats_snapshot()
1013 switch (s->type) { in _mv88e6xxx_get_ethtool_stat()
1015 err = mv88e6xxx_port_read(chip, port, s->reg, ®); in _mv88e6xxx_get_ethtool_stat()
1020 if (s->size == 4) { in _mv88e6xxx_get_ethtool_stat()
1021 err = mv88e6xxx_port_read(chip, port, s->reg + 1, ®); in _mv88e6xxx_get_ethtool_stat()
1031 reg |= s->reg | histogram; in _mv88e6xxx_get_ethtool_stat()
1033 if (s->size == 8) in _mv88e6xxx_get_ethtool_stat()
1051 if (stat->type & types) { in mv88e6xxx_stats_get_strings()
1052 memcpy(data + j * ETH_GSTRING_LEN, stat->string, in mv88e6xxx_stats_get_strings()
1102 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_strings()
1110 if (chip->info->ops->stats_get_strings) in mv88e6xxx_get_strings()
1111 count = chip->info->ops->stats_get_strings(chip, data); in mv88e6xxx_get_strings()
1113 if (chip->info->ops->serdes_get_strings) { in mv88e6xxx_get_strings()
1115 count = chip->info->ops->serdes_get_strings(chip, port, data); in mv88e6xxx_get_strings()
1132 if (stat->type & types) in mv88e6xxx_stats_get_sset_count()
1157 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_sset_count()
1165 if (chip->info->ops->stats_get_sset_count) in mv88e6xxx_get_sset_count()
1166 count = chip->info->ops->stats_get_sset_count(chip); in mv88e6xxx_get_sset_count()
1170 if (chip->info->ops->serdes_get_sset_count) in mv88e6xxx_get_sset_count()
1171 serdes_count = chip->info->ops->serdes_get_sset_count(chip, in mv88e6xxx_get_sset_count()
1195 if (stat->type & types) { in mv88e6xxx_stats_get_stats()
1244 *data++ = chip->ports[port].atu_member_violation; in mv88e6xxx_atu_vtu_get_stats()
1245 *data++ = chip->ports[port].atu_miss_violation; in mv88e6xxx_atu_vtu_get_stats()
1246 *data++ = chip->ports[port].atu_full_violation; in mv88e6xxx_atu_vtu_get_stats()
1247 *data++ = chip->ports[port].vtu_member_violation; in mv88e6xxx_atu_vtu_get_stats()
1248 *data++ = chip->ports[port].vtu_miss_violation; in mv88e6xxx_atu_vtu_get_stats()
1256 if (chip->info->ops->stats_get_stats) in mv88e6xxx_get_stats()
1257 count = chip->info->ops->stats_get_stats(chip, port, data); in mv88e6xxx_get_stats()
1260 if (chip->info->ops->serdes_get_stats) { in mv88e6xxx_get_stats()
1262 count = chip->info->ops->serdes_get_stats(chip, port, data); in mv88e6xxx_get_stats()
1272 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_ethtool_stats()
1289 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_regs_len()
1293 if (chip->info->ops->serdes_get_regs_len) in mv88e6xxx_get_regs_len()
1294 len += chip->info->ops->serdes_get_regs_len(chip, port); in mv88e6xxx_get_regs_len()
1302 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_regs()
1308 regs->version = chip->info->prod_num; in mv88e6xxx_get_regs()
1321 if (chip->info->ops->serdes_get_regs) in mv88e6xxx_get_regs()
1322 chip->info->ops->serdes_get_regs(chip, port, &p[i]); in mv88e6xxx_get_regs()
1344 struct dsa_switch *ds = chip->ds; in mv88e6xxx_port_vlan()
1345 struct dsa_switch_tree *dst = ds->dst; in mv88e6xxx_port_vlan()
1351 if (dev <= dst->last_switch) { in mv88e6xxx_port_vlan()
1352 list_for_each_entry(dp, &dst->ports, list) { in mv88e6xxx_port_vlan()
1353 if (dp->ds->index == dev && dp->index == port) { in mv88e6xxx_port_vlan()
1364 list_for_each_entry(dp, &dst->ports, list) { in mv88e6xxx_port_vlan()
1370 if (bridge_num + dst->last_switch != dev) in mv88e6xxx_port_vlan()
1383 if (dp->type == DSA_PORT_TYPE_CPU || dp->type == DSA_PORT_TYPE_DSA) in mv88e6xxx_port_vlan()
1399 if (other_dp->type == DSA_PORT_TYPE_CPU || in mv88e6xxx_port_vlan()
1400 other_dp->type == DSA_PORT_TYPE_DSA || in mv88e6xxx_port_vlan()
1402 pvlan |= BIT(other_dp->index); in mv88e6xxx_port_vlan()
1409 u16 output_ports = mv88e6xxx_port_vlan(chip, chip->ds->index, port); in mv88e6xxx_port_vlan_map()
1420 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_stp_state_set()
1428 dev_err(ds->dev, "p%d: failed to update state\n", port); in mv88e6xxx_port_stp_state_set()
1435 if (chip->info->ops->ieee_pri_map) { in mv88e6xxx_pri_setup()
1436 err = chip->info->ops->ieee_pri_map(chip); in mv88e6xxx_pri_setup()
1441 if (chip->info->ops->ip_pri_map) { in mv88e6xxx_pri_setup()
1442 err = chip->info->ops->ip_pri_map(chip); in mv88e6xxx_pri_setup()
1452 struct dsa_switch *ds = chip->ds; in mv88e6xxx_devmap_setup()
1456 if (!chip->info->global2_addr) in mv88e6xxx_devmap_setup()
1462 if (port == ds->num_ports) in mv88e6xxx_devmap_setup()
1470 if (chip->info->ops->set_cascade_port) { in mv88e6xxx_devmap_setup()
1472 err = chip->info->ops->set_cascade_port(chip, port); in mv88e6xxx_devmap_setup()
1477 err = mv88e6xxx_g1_set_device_number(chip, chip->ds->index); in mv88e6xxx_devmap_setup()
1487 if (chip->info->global2_addr) in mv88e6xxx_trunk_setup()
1495 if (chip->info->ops->rmu_disable) in mv88e6xxx_rmu_setup()
1496 return chip->info->ops->rmu_disable(chip); in mv88e6xxx_rmu_setup()
1503 if (chip->info->ops->pot_clear) in mv88e6xxx_pot_setup()
1504 return chip->info->ops->pot_clear(chip); in mv88e6xxx_pot_setup()
1511 if (chip->info->ops->mgmt_rsvd2cpu) in mv88e6xxx_rsvd2cpu_setup()
1512 return chip->info->ops->mgmt_rsvd2cpu(chip); in mv88e6xxx_rsvd2cpu_setup()
1528 * ->port_setup_message_port. in mv88e6xxx_atu_setup()
1530 if (chip->info->ops->port_setup_message_port) { in mv88e6xxx_atu_setup()
1544 if (!chip->info->ops->irl_init_all) in mv88e6xxx_irl_setup()
1551 err = chip->info->ops->irl_init_all(chip, port); in mv88e6xxx_irl_setup()
1561 if (chip->info->ops->set_switch_mac) { in mv88e6xxx_mac_setup()
1566 return chip->info->ops->set_switch_mac(chip, addr); in mv88e6xxx_mac_setup()
1574 struct dsa_switch_tree *dst = chip->ds->dst; in mv88e6xxx_pvt_map()
1582 /* Skip the local source device, which uses in-chip port VLAN */ in mv88e6xxx_pvt_map()
1583 if (dev != chip->ds->index) { in mv88e6xxx_pvt_map()
1586 ds = dsa_switch_find(dst->index, dev); in mv88e6xxx_pvt_map()
1588 if (dp && dp->lag) { in mv88e6xxx_pvt_map()
1593 * the LAG ID (one-based) as the port number in mv88e6xxx_pvt_map()
1594 * (zero-based). in mv88e6xxx_pvt_map()
1597 port = dsa_port_lag_id_get(dp) - 1; in mv88e6xxx_pvt_map()
1633 if (dsa_to_port(chip->ds, port)->lag) in mv88e6xxx_port_fast_age_fid()
1634 /* Hardware is incapable of fast-aging a LAG through a in mv88e6xxx_port_fast_age_fid()
1636 * more fancy in place this is a no-op. in mv88e6xxx_port_fast_age_fid()
1638 return -EOPNOTSUPP; in mv88e6xxx_port_fast_age_fid()
1645 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_fast_age()
1653 dev_err(chip->ds->dev, "p%d: failed to flush ATU: %d\n", in mv88e6xxx_port_fast_age()
1670 if (!chip->info->ops->vtu_getnext) in mv88e6xxx_vtu_get()
1671 return -EOPNOTSUPP; in mv88e6xxx_vtu_get()
1673 entry->vid = vid ? vid - 1 : mv88e6xxx_max_vid(chip); in mv88e6xxx_vtu_get()
1674 entry->valid = false; in mv88e6xxx_vtu_get()
1676 err = chip->info->ops->vtu_getnext(chip, entry); in mv88e6xxx_vtu_get()
1678 if (entry->vid != vid) in mv88e6xxx_vtu_get()
1679 entry->valid = false; in mv88e6xxx_vtu_get()
1696 if (!chip->info->ops->vtu_getnext) in mv88e6xxx_vtu_walk()
1697 return -EOPNOTSUPP; in mv88e6xxx_vtu_walk()
1700 err = chip->info->ops->vtu_getnext(chip, &entry); in mv88e6xxx_vtu_walk()
1718 if (!chip->info->ops->vtu_loadpurge) in mv88e6xxx_vtu_loadpurge()
1719 return -EOPNOTSUPP; in mv88e6xxx_vtu_loadpurge()
1721 return chip->info->ops->vtu_loadpurge(chip, entry); in mv88e6xxx_vtu_loadpurge()
1730 set_bit(entry->fid, fid_bitmap); in mv88e6xxx_fid_map_vlan()
1755 return -ENOSPC; in mv88e6xxx_atu_new()
1764 if (!chip->info->ops->stu_loadpurge) in mv88e6xxx_stu_loadpurge()
1765 return -EOPNOTSUPP; in mv88e6xxx_stu_loadpurge()
1767 return chip->info->ops->stu_loadpurge(chip, entry); in mv88e6xxx_stu_loadpurge()
1795 list_for_each_entry(mst, &chip->msts, node) in mv88e6xxx_sid_get()
1796 __set_bit(mst->stu.sid, busy); in mv88e6xxx_sid_get()
1800 return (*sid >= mv88e6xxx_max_sid(chip)) ? -ENOSPC : 0; in mv88e6xxx_sid_get()
1811 list_for_each_entry_safe(mst, tmp, &chip->msts, node) { in mv88e6xxx_mst_put()
1812 if (mst->stu.sid != sid) in mv88e6xxx_mst_put()
1815 if (!refcount_dec_and_test(&mst->refcnt)) in mv88e6xxx_mst_put()
1818 mst->stu.valid = false; in mv88e6xxx_mst_put()
1819 err = mv88e6xxx_stu_loadpurge(chip, &mst->stu); in mv88e6xxx_mst_put()
1821 refcount_set(&mst->refcnt, 1); in mv88e6xxx_mst_put()
1825 list_del(&mst->node); in mv88e6xxx_mst_put()
1830 return -ENOENT; in mv88e6xxx_mst_put()
1840 err = -EOPNOTSUPP; in mv88e6xxx_mst_get()
1849 list_for_each_entry(mst, &chip->msts, node) { in mv88e6xxx_mst_get()
1850 if (mst->br == br && mst->msti == msti) { in mv88e6xxx_mst_get()
1851 refcount_inc(&mst->refcnt); in mv88e6xxx_mst_get()
1852 *sid = mst->stu.sid; in mv88e6xxx_mst_get()
1863 err = -ENOMEM; in mv88e6xxx_mst_get()
1867 INIT_LIST_HEAD(&mst->node); in mv88e6xxx_mst_get()
1868 refcount_set(&mst->refcnt, 1); in mv88e6xxx_mst_get()
1869 mst->br = br; in mv88e6xxx_mst_get()
1870 mst->msti = msti; in mv88e6xxx_mst_get()
1871 mst->stu.valid = true; in mv88e6xxx_mst_get()
1872 mst->stu.sid = *sid; in mv88e6xxx_mst_get()
1875 * a STU state of disabled means to go by the port-global in mv88e6xxx_mst_get()
1880 mst->stu.state[i] = dsa_is_user_port(chip->ds, i) ? in mv88e6xxx_mst_get()
1884 err = mv88e6xxx_stu_loadpurge(chip, &mst->stu); in mv88e6xxx_mst_get()
1888 list_add_tail(&mst->node, &chip->msts); in mv88e6xxx_mst_get()
1901 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_mst_state_set()
1907 return -EOPNOTSUPP; in mv88e6xxx_port_mst_state_set()
1909 switch (st->state) { in mv88e6xxx_port_mst_state_set()
1922 return -EINVAL; in mv88e6xxx_port_mst_state_set()
1925 list_for_each_entry(mst, &chip->msts, node) { in mv88e6xxx_port_mst_state_set()
1926 if (mst->br == dsa_port_bridge_dev_get(dp) && in mv88e6xxx_port_mst_state_set()
1927 mst->msti == st->msti) { in mv88e6xxx_port_mst_state_set()
1928 if (mst->stu.state[port] == state) in mv88e6xxx_port_mst_state_set()
1931 mst->stu.state[port] = state; in mv88e6xxx_port_mst_state_set()
1933 err = mv88e6xxx_stu_loadpurge(chip, &mst->stu); in mv88e6xxx_port_mst_state_set()
1939 return -ENOENT; in mv88e6xxx_port_mst_state_set()
1946 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_check_hw_vlan()
1964 if (vlan.member[other_dp->index] == in mv88e6xxx_port_check_hw_vlan()
1975 dev_err(ds->dev, "p%d: hw VLAN %d already used by port %d in %s\n", in mv88e6xxx_port_check_hw_vlan()
1976 port, vlan.vid, other_dp->index, netdev_name(other_br)); in mv88e6xxx_port_check_hw_vlan()
1977 return -EOPNOTSUPP; in mv88e6xxx_port_check_hw_vlan()
1985 struct dsa_port *dp = dsa_to_port(chip->ds, port); in mv88e6xxx_port_commit_pvid()
1987 struct mv88e6xxx_port *p = &chip->ports[port]; in mv88e6xxx_port_commit_pvid()
1994 pvid = p->bridge_pvid.vid; in mv88e6xxx_port_commit_pvid()
1995 drop_untagged = !p->bridge_pvid.valid; in mv88e6xxx_port_commit_pvid()
2012 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_vlan_filtering()
2018 return -EOPNOTSUPP; in mv88e6xxx_port_vlan_filtering()
2040 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_vlan_prepare()
2044 return -EOPNOTSUPP; in mv88e6xxx_port_vlan_prepare()
2050 err = mv88e6xxx_port_check_hw_vlan(ds, port, vlan->vid); in mv88e6xxx_port_vlan_prepare()
2070 * VLAN ID into the port's database used for VLAN-unaware bridging. in mv88e6xxx_port_db_load_purge()
2079 /* switchdev expects -EOPNOTSUPP to honor software VLANs */ in mv88e6xxx_port_db_load_purge()
2081 return -EOPNOTSUPP; in mv88e6xxx_port_db_load_purge()
2120 enum mv88e6xxx_policy_mapping mapping = policy->mapping; in mv88e6xxx_policy_apply()
2121 enum mv88e6xxx_policy_action action = policy->action; in mv88e6xxx_policy_apply()
2122 const u8 *addr = policy->addr; in mv88e6xxx_policy_apply()
2123 u16 vid = policy->vid; in mv88e6xxx_policy_apply()
2128 if (!chip->info->ops->port_set_policy) in mv88e6xxx_policy_apply()
2129 return -EOPNOTSUPP; in mv88e6xxx_policy_apply()
2143 return -EOPNOTSUPP; in mv88e6xxx_policy_apply()
2151 return -EOPNOTSUPP; in mv88e6xxx_policy_apply()
2156 idr_for_each_entry(&chip->policies, policy, id) in mv88e6xxx_policy_apply()
2157 if (policy->port == port && in mv88e6xxx_policy_apply()
2158 policy->mapping == mapping && in mv88e6xxx_policy_apply()
2159 policy->action != action) in mv88e6xxx_policy_apply()
2162 return chip->info->ops->port_set_policy(chip, port, mapping, action); in mv88e6xxx_policy_apply()
2168 struct ethhdr *mac_entry = &fs->h_u.ether_spec; in mv88e6xxx_policy_insert()
2169 struct ethhdr *mac_mask = &fs->m_u.ether_spec; in mv88e6xxx_policy_insert()
2178 if (fs->location != RX_CLS_LOC_ANY) in mv88e6xxx_policy_insert()
2179 return -EINVAL; in mv88e6xxx_policy_insert()
2181 if (fs->ring_cookie == RX_CLS_FLOW_DISC) in mv88e6xxx_policy_insert()
2184 return -EOPNOTSUPP; in mv88e6xxx_policy_insert()
2186 switch (fs->flow_type & ~FLOW_EXT) { in mv88e6xxx_policy_insert()
2188 if (!is_zero_ether_addr(mac_mask->h_dest) && in mv88e6xxx_policy_insert()
2189 is_zero_ether_addr(mac_mask->h_source)) { in mv88e6xxx_policy_insert()
2191 addr = mac_entry->h_dest; in mv88e6xxx_policy_insert()
2192 } else if (is_zero_ether_addr(mac_mask->h_dest) && in mv88e6xxx_policy_insert()
2193 !is_zero_ether_addr(mac_mask->h_source)) { in mv88e6xxx_policy_insert()
2195 addr = mac_entry->h_source; in mv88e6xxx_policy_insert()
2198 return -EOPNOTSUPP; in mv88e6xxx_policy_insert()
2202 return -EOPNOTSUPP; in mv88e6xxx_policy_insert()
2205 if ((fs->flow_type & FLOW_EXT) && fs->m_ext.vlan_tci) { in mv88e6xxx_policy_insert()
2206 if (fs->m_ext.vlan_tci != htons(0xffff)) in mv88e6xxx_policy_insert()
2207 return -EOPNOTSUPP; in mv88e6xxx_policy_insert()
2208 vid = be16_to_cpu(fs->h_ext.vlan_tci) & VLAN_VID_MASK; in mv88e6xxx_policy_insert()
2211 idr_for_each_entry(&chip->policies, policy, id) { in mv88e6xxx_policy_insert()
2212 if (policy->port == port && policy->mapping == mapping && in mv88e6xxx_policy_insert()
2213 policy->action == action && policy->vid == vid && in mv88e6xxx_policy_insert()
2214 ether_addr_equal(policy->addr, addr)) in mv88e6xxx_policy_insert()
2215 return -EEXIST; in mv88e6xxx_policy_insert()
2218 policy = devm_kzalloc(chip->dev, sizeof(*policy), GFP_KERNEL); in mv88e6xxx_policy_insert()
2220 return -ENOMEM; in mv88e6xxx_policy_insert()
2222 fs->location = 0; in mv88e6xxx_policy_insert()
2223 err = idr_alloc_u32(&chip->policies, policy, &fs->location, 0xffffffff, in mv88e6xxx_policy_insert()
2226 devm_kfree(chip->dev, policy); in mv88e6xxx_policy_insert()
2230 memcpy(&policy->fs, fs, sizeof(*fs)); in mv88e6xxx_policy_insert()
2231 ether_addr_copy(policy->addr, addr); in mv88e6xxx_policy_insert()
2232 policy->mapping = mapping; in mv88e6xxx_policy_insert()
2233 policy->action = action; in mv88e6xxx_policy_insert()
2234 policy->port = port; in mv88e6xxx_policy_insert()
2235 policy->vid = vid; in mv88e6xxx_policy_insert()
2239 idr_remove(&chip->policies, fs->location); in mv88e6xxx_policy_insert()
2240 devm_kfree(chip->dev, policy); in mv88e6xxx_policy_insert()
2250 struct ethtool_rx_flow_spec *fs = &rxnfc->fs; in mv88e6xxx_get_rxnfc()
2251 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_rxnfc()
2258 switch (rxnfc->cmd) { in mv88e6xxx_get_rxnfc()
2260 rxnfc->data = 0; in mv88e6xxx_get_rxnfc()
2261 rxnfc->data |= RX_CLS_LOC_SPECIAL; in mv88e6xxx_get_rxnfc()
2262 rxnfc->rule_cnt = 0; in mv88e6xxx_get_rxnfc()
2263 idr_for_each_entry(&chip->policies, policy, id) in mv88e6xxx_get_rxnfc()
2264 if (policy->port == port) in mv88e6xxx_get_rxnfc()
2265 rxnfc->rule_cnt++; in mv88e6xxx_get_rxnfc()
2269 err = -ENOENT; in mv88e6xxx_get_rxnfc()
2270 policy = idr_find(&chip->policies, fs->location); in mv88e6xxx_get_rxnfc()
2272 memcpy(fs, &policy->fs, sizeof(*fs)); in mv88e6xxx_get_rxnfc()
2277 rxnfc->data = 0; in mv88e6xxx_get_rxnfc()
2278 rxnfc->rule_cnt = 0; in mv88e6xxx_get_rxnfc()
2279 idr_for_each_entry(&chip->policies, policy, id) in mv88e6xxx_get_rxnfc()
2280 if (policy->port == port) in mv88e6xxx_get_rxnfc()
2281 rule_locs[rxnfc->rule_cnt++] = id; in mv88e6xxx_get_rxnfc()
2285 err = -EOPNOTSUPP; in mv88e6xxx_get_rxnfc()
2297 struct ethtool_rx_flow_spec *fs = &rxnfc->fs; in mv88e6xxx_set_rxnfc()
2298 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_set_rxnfc()
2304 switch (rxnfc->cmd) { in mv88e6xxx_set_rxnfc()
2309 err = -ENOENT; in mv88e6xxx_set_rxnfc()
2310 policy = idr_remove(&chip->policies, fs->location); in mv88e6xxx_set_rxnfc()
2312 policy->action = MV88E6XXX_POLICY_ACTION_NORMAL; in mv88e6xxx_set_rxnfc()
2314 devm_kfree(chip->dev, policy); in mv88e6xxx_set_rxnfc()
2318 err = -EOPNOTSUPP; in mv88e6xxx_set_rxnfc()
2344 struct dsa_port *dp = dsa_to_port(chip->ds, port); in mv88e6xxx_broadcast_setup()
2347 if (dsa_is_unused_port(chip->ds, port)) in mv88e6xxx_broadcast_setup()
2379 if (ctx->flood) in mv88e6xxx_port_broadcast_sync_vlan()
2386 return mv88e6xxx_port_db_load_purge(chip, ctx->port, broadcast, in mv88e6xxx_port_broadcast_sync_vlan()
2387 vlan->vid, state); in mv88e6xxx_port_broadcast_sync_vlan()
2456 dev_info(chip->dev, "p%d: already a member of VLAN %d\n", in mv88e6xxx_port_vlan_join()
2467 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_vlan_add()
2468 bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; in mv88e6xxx_port_vlan_add()
2469 bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; in mv88e6xxx_port_vlan_add()
2470 struct mv88e6xxx_port *p = &chip->ports[port]; in mv88e6xxx_port_vlan_add()
2475 if (!vlan->vid) in mv88e6xxx_port_vlan_add()
2496 err = mv88e6xxx_port_vlan_join(chip, port, vlan->vid, member, warn); in mv88e6xxx_port_vlan_add()
2498 dev_err(ds->dev, "p%d: failed to add VLAN %d%c\n", port, in mv88e6xxx_port_vlan_add()
2499 vlan->vid, untagged ? 'u' : 't'); in mv88e6xxx_port_vlan_add()
2504 p->bridge_pvid.vid = vlan->vid; in mv88e6xxx_port_vlan_add()
2505 p->bridge_pvid.valid = true; in mv88e6xxx_port_vlan_add()
2510 } else if (vlan->vid && p->bridge_pvid.vid == vlan->vid) { in mv88e6xxx_port_vlan_add()
2511 /* The old pvid was reinstalled as a non-pvid VLAN */ in mv88e6xxx_port_vlan_add()
2512 p->bridge_pvid.valid = false; in mv88e6xxx_port_vlan_add()
2543 return -EOPNOTSUPP; in mv88e6xxx_port_vlan_leave()
2573 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_vlan_del()
2574 struct mv88e6xxx_port *p = &chip->ports[port]; in mv88e6xxx_port_vlan_del()
2579 return -EOPNOTSUPP; in mv88e6xxx_port_vlan_del()
2594 err = mv88e6xxx_port_vlan_leave(chip, port, vlan->vid); in mv88e6xxx_port_vlan_del()
2598 if (vlan->vid == pvid) { in mv88e6xxx_port_vlan_del()
2599 p->bridge_pvid.valid = false; in mv88e6xxx_port_vlan_del()
2614 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_vlan_fast_age()
2636 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_vlan_msti_set()
2642 return -EOPNOTSUPP; in mv88e6xxx_vlan_msti_set()
2646 err = mv88e6xxx_vtu_get(chip, msti->vid, &vlan); in mv88e6xxx_vlan_msti_set()
2651 err = -EINVAL; in mv88e6xxx_vlan_msti_set()
2657 err = mv88e6xxx_mst_get(chip, bridge.dev, msti->msti, &new_sid); in mv88e6xxx_vlan_msti_set()
2682 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_fdb_add()
2697 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_fdb_del()
2754 return mv88e6xxx_port_db_dump_fid(chip, entry->fid, entry->vid, in mv88e6xxx_port_db_dump_vlan()
2755 ctx->port, ctx->cb, ctx->data); in mv88e6xxx_port_db_dump_vlan()
2784 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_fdb_dump()
2797 struct dsa_switch *ds = chip->ds; in mv88e6xxx_bridge_map()
2798 struct dsa_switch_tree *dst = ds->dst; in mv88e6xxx_bridge_map()
2802 list_for_each_entry(dp, &dst->ports, list) { in mv88e6xxx_bridge_map()
2804 if (dp->ds == ds) { in mv88e6xxx_bridge_map()
2808 err = mv88e6xxx_port_vlan_map(chip, dp->index); in mv88e6xxx_bridge_map()
2813 * remap its cross-chip Port VLAN Table entry. in mv88e6xxx_bridge_map()
2815 err = mv88e6xxx_pvt_map(chip, dp->ds->index, in mv88e6xxx_bridge_map()
2816 dp->index); in mv88e6xxx_bridge_map()
2826 /* Treat the software bridge as a virtual single-port switch behind the
2827 * CPU and map in the PVT. First dst->last_switch elements are taken by
2833 u8 dev = bridge_num + ds->dst->last_switch; in mv88e6xxx_map_virtual_bridge_to_pvt()
2834 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_map_virtual_bridge_to_pvt()
2844 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_bridge_join()
2878 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_bridge_leave()
2885 dev_err(ds->dev, "failed to remap cross-chip Port VLAN\n"); in mv88e6xxx_port_bridge_leave()
2889 dev_err(ds->dev, "failed to remap in-chip Port VLAN\n"); in mv88e6xxx_port_bridge_leave()
2893 dev_err(ds->dev, in mv88e6xxx_port_bridge_leave()
2894 "port %d failed to restore map-DA: %pe\n", in mv88e6xxx_port_bridge_leave()
2899 dev_err(ds->dev, in mv88e6xxx_port_bridge_leave()
2911 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_crosschip_bridge_join()
2914 if (tree_index != ds->dst->index) in mv88e6xxx_crosschip_bridge_join()
2929 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_crosschip_bridge_leave()
2931 if (tree_index != ds->dst->index) in mv88e6xxx_crosschip_bridge_leave()
2937 dev_err(ds->dev, "failed to remap cross-chip Port VLAN\n"); in mv88e6xxx_crosschip_bridge_leave()
2943 if (chip->info->ops->reset) in mv88e6xxx_software_reset()
2944 return chip->info->ops->reset(chip); in mv88e6xxx_software_reset()
2951 struct gpio_desc *gpiod = chip->reset; in mv88e6xxx_hardware_reset()
2957 * mid-byte, causing the first EEPROM read after the reset in mv88e6xxx_hardware_reset()
2961 if (chip->info->ops->get_eeprom) in mv88e6xxx_hardware_reset()
2969 if (chip->info->ops->get_eeprom) in mv88e6xxx_hardware_reset()
3012 if (!chip->info->ops->port_set_frame_mode) in mv88e6xxx_set_port_mode()
3013 return -EOPNOTSUPP; in mv88e6xxx_set_port_mode()
3019 err = chip->info->ops->port_set_frame_mode(chip, port, frame); in mv88e6xxx_set_port_mode()
3023 if (chip->info->ops->port_set_ether_type) in mv88e6xxx_set_port_mode()
3024 return chip->info->ops->port_set_ether_type(chip, port, etype); in mv88e6xxx_set_port_mode()
3053 if (dsa_is_dsa_port(chip->ds, port)) in mv88e6xxx_setup_port_mode()
3056 if (dsa_is_user_port(chip->ds, port)) in mv88e6xxx_setup_port_mode()
3060 if (chip->tag_protocol == DSA_TAG_PROTO_DSA) in mv88e6xxx_setup_port_mode()
3063 if (chip->tag_protocol == DSA_TAG_PROTO_EDSA) in mv88e6xxx_setup_port_mode()
3066 return -EINVAL; in mv88e6xxx_setup_port_mode()
3071 bool message = dsa_is_dsa_port(chip->ds, port); in mv88e6xxx_setup_message_port()
3080 if (chip->info->ops->port_set_ucast_flood) { in mv88e6xxx_setup_egress_floods()
3081 err = chip->info->ops->port_set_ucast_flood(chip, port, true); in mv88e6xxx_setup_egress_floods()
3085 if (chip->info->ops->port_set_mcast_flood) { in mv88e6xxx_setup_egress_floods()
3086 err = chip->info->ops->port_set_mcast_flood(chip, port, true); in mv88e6xxx_setup_egress_floods()
3100 if (!chip->info->ops->set_egress_port) in mv88e6xxx_set_egress_port()
3101 return -EOPNOTSUPP; in mv88e6xxx_set_egress_port()
3103 err = chip->info->ops->set_egress_port(chip, direction, port); in mv88e6xxx_set_egress_port()
3108 chip->ingress_dest_port = port; in mv88e6xxx_set_egress_port()
3110 chip->egress_dest_port = port; in mv88e6xxx_set_egress_port()
3117 struct dsa_switch *ds = chip->ds; in mv88e6xxx_setup_upstream_port()
3122 if (chip->info->ops->port_set_upstream_port) { in mv88e6xxx_setup_upstream_port()
3123 err = chip->info->ops->port_set_upstream_port(chip, port, in mv88e6xxx_setup_upstream_port()
3130 if (chip->info->ops->set_cpu_port) { in mv88e6xxx_setup_upstream_port()
3131 err = chip->info->ops->set_cpu_port(chip, in mv88e6xxx_setup_upstream_port()
3140 if (err && err != -EOPNOTSUPP) in mv88e6xxx_setup_upstream_port()
3146 if (err && err != -EOPNOTSUPP) in mv88e6xxx_setup_upstream_port()
3156 struct dsa_switch *ds = chip->ds; in mv88e6xxx_setup_port()
3162 chip->ports[port].chip = chip; in mv88e6xxx_setup_port()
3163 chip->ports[port].port = port; in mv88e6xxx_setup_port()
3171 /* Port Control: disable Drop-on-Unlock, disable Drop-on-Lock, in mv88e6xxx_setup_port()
3228 chip->info->ops->port_set_policy) { in mv88e6xxx_setup_port()
3229 err = chip->info->ops->port_set_policy(chip, port, in mv88e6xxx_setup_port()
3238 * loaded in the VTU - therefore, enable 802.1Q in order to take in mv88e6xxx_setup_port()
3264 * as the private PVID on ports under a VLAN-unaware bridge. in mv88e6xxx_setup_port()
3275 if (chip->info->ops->port_set_jumbo_size) { in mv88e6xxx_setup_port()
3276 err = chip->info->ops->port_set_jumbo_size(chip, port, 10218); in mv88e6xxx_setup_port()
3307 if (chip->info->ops->port_pause_limit) { in mv88e6xxx_setup_port()
3308 err = chip->info->ops->port_pause_limit(chip, port, 0, 0); in mv88e6xxx_setup_port()
3313 if (chip->info->ops->port_disable_learn_limit) { in mv88e6xxx_setup_port()
3314 err = chip->info->ops->port_disable_learn_limit(chip, port); in mv88e6xxx_setup_port()
3319 if (chip->info->ops->port_disable_pri_override) { in mv88e6xxx_setup_port()
3320 err = chip->info->ops->port_disable_pri_override(chip, port); in mv88e6xxx_setup_port()
3325 if (chip->info->ops->port_tag_remap) { in mv88e6xxx_setup_port()
3326 err = chip->info->ops->port_tag_remap(chip, port); in mv88e6xxx_setup_port()
3331 if (chip->info->ops->port_egress_rate_limiting) { in mv88e6xxx_setup_port()
3332 err = chip->info->ops->port_egress_rate_limiting(chip, port); in mv88e6xxx_setup_port()
3337 if (chip->info->ops->port_setup_message_port) { in mv88e6xxx_setup_port()
3338 err = chip->info->ops->port_setup_message_port(chip, port); in mv88e6xxx_setup_port()
3343 if (chip->info->ops->serdes_set_tx_amplitude) { in mv88e6xxx_setup_port()
3346 phy_handle = of_parse_phandle(dp->dn, "phy-handle", 0); in mv88e6xxx_setup_port()
3349 "tx-p2p-microvolt", in mv88e6xxx_setup_port()
3351 err = chip->info->ops->serdes_set_tx_amplitude(chip, in mv88e6xxx_setup_port()
3380 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_max_mtu()
3382 if (chip->info->ops->port_set_jumbo_size) in mv88e6xxx_get_max_mtu()
3383 return 10240 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN; in mv88e6xxx_get_max_mtu()
3384 else if (chip->info->ops->set_max_frame_size) in mv88e6xxx_get_max_mtu()
3385 return 1632 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN; in mv88e6xxx_get_max_mtu()
3391 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_change_mtu()
3397 if (!chip->info->ops->port_set_jumbo_size && in mv88e6xxx_change_mtu()
3398 !chip->info->ops->set_max_frame_size) { in mv88e6xxx_change_mtu()
3400 return -EINVAL; in mv88e6xxx_change_mtu()
3409 if (chip->info->ops->port_set_jumbo_size) in mv88e6xxx_change_mtu()
3410 ret = chip->info->ops->port_set_jumbo_size(chip, port, new_mtu); in mv88e6xxx_change_mtu()
3411 else if (chip->info->ops->set_max_frame_size) in mv88e6xxx_change_mtu()
3412 ret = chip->info->ops->set_max_frame_size(chip, new_mtu); in mv88e6xxx_change_mtu()
3421 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_set_ageing_time()
3436 if (chip->info->ops->stats_set_histogram) { in mv88e6xxx_stats_setup()
3437 err = chip->info->ops->stats_set_histogram(chip); in mv88e6xxx_stats_setup()
3455 dev_err(chip->dev, in mv88e6390_setup_errata_applied()
3503 struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv; in mv88e6xxx_mdio_read()
3504 struct mv88e6xxx_chip *chip = mdio_bus->chip; in mv88e6xxx_mdio_read()
3509 if (!chip->info->ops->phy_read) in mv88e6xxx_mdio_read()
3510 return -EOPNOTSUPP; in mv88e6xxx_mdio_read()
3513 err = chip->info->ops->phy_read(chip, bus, phy, reg, &val); in mv88e6xxx_mdio_read()
3518 chip->info->family < ARRAY_SIZE(family_prod_id_table)) { in mv88e6xxx_mdio_read()
3519 prod_id = family_prod_id_table[chip->info->family]; in mv88e6xxx_mdio_read()
3530 struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv; in mv88e6xxx_mdio_read_c45()
3531 struct mv88e6xxx_chip *chip = mdio_bus->chip; in mv88e6xxx_mdio_read_c45()
3535 if (!chip->info->ops->phy_read_c45) in mv88e6xxx_mdio_read_c45()
3536 return -EOPNOTSUPP; in mv88e6xxx_mdio_read_c45()
3539 err = chip->info->ops->phy_read_c45(chip, bus, phy, devad, reg, &val); in mv88e6xxx_mdio_read_c45()
3547 struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv; in mv88e6xxx_mdio_write()
3548 struct mv88e6xxx_chip *chip = mdio_bus->chip; in mv88e6xxx_mdio_write()
3551 if (!chip->info->ops->phy_write) in mv88e6xxx_mdio_write()
3552 return -EOPNOTSUPP; in mv88e6xxx_mdio_write()
3555 err = chip->info->ops->phy_write(chip, bus, phy, reg, val); in mv88e6xxx_mdio_write()
3564 struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv; in mv88e6xxx_mdio_write_c45()
3565 struct mv88e6xxx_chip *chip = mdio_bus->chip; in mv88e6xxx_mdio_write_c45()
3568 if (!chip->info->ops->phy_write_c45) in mv88e6xxx_mdio_write_c45()
3569 return -EOPNOTSUPP; in mv88e6xxx_mdio_write_c45()
3572 err = chip->info->ops->phy_write_c45(chip, bus, phy, devad, reg, val); in mv88e6xxx_mdio_write_c45()
3598 return -ENOMEM; in mv88e6xxx_mdio_register()
3600 mdio_bus = bus->priv; in mv88e6xxx_mdio_register()
3601 mdio_bus->bus = bus; in mv88e6xxx_mdio_register()
3602 mdio_bus->chip = chip; in mv88e6xxx_mdio_register()
3603 INIT_LIST_HEAD(&mdio_bus->list); in mv88e6xxx_mdio_register()
3604 mdio_bus->external = external; in mv88e6xxx_mdio_register()
3607 bus->name = np->full_name; in mv88e6xxx_mdio_register()
3608 snprintf(bus->id, MII_BUS_ID_SIZE, "%pOF", np); in mv88e6xxx_mdio_register()
3610 bus->name = "mv88e6xxx SMI"; in mv88e6xxx_mdio_register()
3611 snprintf(bus->id, MII_BUS_ID_SIZE, "mv88e6xxx-%d", index++); in mv88e6xxx_mdio_register()
3614 bus->read = mv88e6xxx_mdio_read; in mv88e6xxx_mdio_register()
3615 bus->write = mv88e6xxx_mdio_write; in mv88e6xxx_mdio_register()
3616 bus->read_c45 = mv88e6xxx_mdio_read_c45; in mv88e6xxx_mdio_register()
3617 bus->write_c45 = mv88e6xxx_mdio_write_c45; in mv88e6xxx_mdio_register()
3618 bus->parent = chip->dev; in mv88e6xxx_mdio_register()
3619 bus->phy_mask = ~GENMASK(chip->info->phy_base_addr + in mv88e6xxx_mdio_register()
3620 mv88e6xxx_num_ports(chip) - 1, in mv88e6xxx_mdio_register()
3621 chip->info->phy_base_addr); in mv88e6xxx_mdio_register()
3631 dev_err(chip->dev, "Cannot register MDIO bus (%d)\n", err); in mv88e6xxx_mdio_register()
3637 list_add_tail(&mdio_bus->list, &chip->mdios); in mv88e6xxx_mdio_register()
3639 list_add(&mdio_bus->list, &chip->mdios); in mv88e6xxx_mdio_register()
3654 list_for_each_entry_safe(mdio_bus, p, &chip->mdios, list) { in mv88e6xxx_mdios_unregister()
3655 bus = mdio_bus->bus; in mv88e6xxx_mdios_unregister()
3657 if (!mdio_bus->external) in mv88e6xxx_mdios_unregister()
3667 struct device_node *np = chip->dev->of_node; in mv88e6xxx_mdios_register()
3671 /* Always register one mdio bus for the internal/default mdio in mv88e6xxx_mdios_register()
3675 child = of_get_child_by_name(np, "mdio"); in mv88e6xxx_mdios_register()
3682 * which say they are compatible with the external mdio in mv88e6xxx_mdios_register()
3687 child, "marvell,mv88e6xxx-mdio-external")) { in mv88e6xxx_mdios_register()
3702 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_teardown()
3712 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_setup()
3721 chip->ds = ds; in mv88e6xxx_setup()
3722 ds->slave_mii_bus = mv88e6xxx_default_mdio_bus(chip); in mv88e6xxx_setup()
3730 ds->max_num_bridges = MV88E6XXX_MAX_PVT_SWITCHES - in mv88e6xxx_setup()
3731 ds->dst->last_switch - 1; in mv88e6xxx_setup()
3735 if (chip->info->ops->setup_errata) { in mv88e6xxx_setup()
3736 err = chip->info->ops->setup_errata(chip); in mv88e6xxx_setup()
3743 if (chip->info->ops->port_get_cmode) { in mv88e6xxx_setup()
3744 err = chip->info->ops->port_get_cmode(chip, i, &cmode); in mv88e6xxx_setup()
3748 chip->ports[i].cmode = cmode; in mv88e6xxx_setup()
3770 dev_err(chip->dev, "port %d is invalid\n", i); in mv88e6xxx_setup()
3771 err = -EINVAL; in mv88e6xxx_setup()
3829 if (chip->info->ptp_support) { in mv88e6xxx_setup()
3880 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_setup()
3883 if (chip->info->ops->pcs_ops->pcs_init) { in mv88e6xxx_port_setup()
3884 err = chip->info->ops->pcs_ops->pcs_init(chip, port); in mv88e6xxx_port_setup()
3894 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_teardown()
3898 if (chip->info->ops->pcs_ops->pcs_teardown) in mv88e6xxx_port_teardown()
3899 chip->info->ops->pcs_ops->pcs_teardown(chip, port); in mv88e6xxx_port_teardown()
3904 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_eeprom_len()
3906 return chip->eeprom_len; in mv88e6xxx_get_eeprom_len()
3912 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_eeprom()
3915 if (!chip->info->ops->get_eeprom) in mv88e6xxx_get_eeprom()
3916 return -EOPNOTSUPP; in mv88e6xxx_get_eeprom()
3919 err = chip->info->ops->get_eeprom(chip, eeprom, data); in mv88e6xxx_get_eeprom()
3925 eeprom->magic = 0xc3ec4951; in mv88e6xxx_get_eeprom()
3933 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_set_eeprom()
3936 if (!chip->info->ops->set_eeprom) in mv88e6xxx_set_eeprom()
3937 return -EOPNOTSUPP; in mv88e6xxx_set_eeprom()
3939 if (eeprom->magic != 0xc3ec4951) in mv88e6xxx_set_eeprom()
3940 return -EINVAL; in mv88e6xxx_set_eeprom()
3943 err = chip->info->ops->set_eeprom(chip, eeprom, data); in mv88e6xxx_set_eeprom()
5840 /* Ports 2-4 are not routed to pins
6210 return -ENODEV; in mv88e6xxx_detect()
6213 chip->info = info; in mv88e6xxx_detect()
6215 dev_info(chip->dev, "switch 0x%x detected: %s, revision %u\n", in mv88e6xxx_detect()
6216 chip->info->prod_num, chip->info->name, rev); in mv88e6xxx_detect()
6226 /* dual_chip takes precedence over single/multi-chip modes */ in mv88e6xxx_single_chip_detect()
6227 if (chip->info->dual_chip) in mv88e6xxx_single_chip_detect()
6228 return -EINVAL; in mv88e6xxx_single_chip_detect()
6230 /* If the mdio addr is 16 indicating the first port address of a switch in mv88e6xxx_single_chip_detect()
6232 * configured in single chip addressing mode. Setup the smi access as in mv88e6xxx_single_chip_detect()
6237 if (mdiodev->addr != 16) in mv88e6xxx_single_chip_detect()
6238 return -EINVAL; in mv88e6xxx_single_chip_detect()
6240 err = mv88e6xxx_smi_init(chip, mdiodev->bus, 0); in mv88e6xxx_single_chip_detect()
6255 chip->dev = dev; in mv88e6xxx_alloc_chip()
6257 mutex_init(&chip->reg_lock); in mv88e6xxx_alloc_chip()
6258 INIT_LIST_HEAD(&chip->mdios); in mv88e6xxx_alloc_chip()
6259 idr_init(&chip->policies); in mv88e6xxx_alloc_chip()
6260 INIT_LIST_HEAD(&chip->msts); in mv88e6xxx_alloc_chip()
6269 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_tag_protocol()
6271 return chip->tag_protocol; in mv88e6xxx_get_tag_protocol()
6277 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_change_tag_protocol()
6284 switch (chip->info->edsa_support) { in mv88e6xxx_change_tag_protocol()
6286 return -EPROTONOSUPPORT; in mv88e6xxx_change_tag_protocol()
6288 dev_warn(chip->dev, "Relying on undocumented EDSA tagging behavior\n"); in mv88e6xxx_change_tag_protocol()
6297 return -EPROTONOSUPPORT; in mv88e6xxx_change_tag_protocol()
6300 old_protocol = chip->tag_protocol; in mv88e6xxx_change_tag_protocol()
6301 chip->tag_protocol = proto; in mv88e6xxx_change_tag_protocol()
6305 err = mv88e6xxx_setup_port_mode(chip, cpu_dp->index); in mv88e6xxx_change_tag_protocol()
6316 chip->tag_protocol = old_protocol; in mv88e6xxx_change_tag_protocol()
6320 mv88e6xxx_setup_port_mode(chip, cpu_dp->index); in mv88e6xxx_change_tag_protocol()
6330 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_mdb_add()
6334 err = mv88e6xxx_port_db_load_purge(chip, port, mdb->addr, mdb->vid, in mv88e6xxx_port_mdb_add()
6345 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_mdb_del()
6349 err = mv88e6xxx_port_db_load_purge(chip, port, mdb->addr, mdb->vid, 0); in mv88e6xxx_port_mdb_del()
6363 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_mirror_add()
6368 mutex_lock(&chip->reg_lock); in mv88e6xxx_port_mirror_add()
6369 if ((ingress ? chip->ingress_dest_port : chip->egress_dest_port) != in mv88e6xxx_port_mirror_add()
6370 mirror->to_local_port) { in mv88e6xxx_port_mirror_add()
6373 chip->ports[i].mirror_ingress : in mv88e6xxx_port_mirror_add()
6374 chip->ports[i].mirror_egress; in mv88e6xxx_port_mirror_add()
6378 err = -EBUSY; in mv88e6xxx_port_mirror_add()
6383 mirror->to_local_port); in mv88e6xxx_port_mirror_add()
6390 mutex_unlock(&chip->reg_lock); in mv88e6xxx_port_mirror_add()
6398 enum mv88e6xxx_egress_direction direction = mirror->ingress ? in mv88e6xxx_port_mirror_del()
6401 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_mirror_del()
6405 mutex_lock(&chip->reg_lock); in mv88e6xxx_port_mirror_del()
6407 dev_err(ds->dev, "p%d: failed to disable mirroring\n", port); in mv88e6xxx_port_mirror_del()
6410 other_mirrors |= mirror->ingress ? in mv88e6xxx_port_mirror_del()
6411 chip->ports[i].mirror_ingress : in mv88e6xxx_port_mirror_del()
6412 chip->ports[i].mirror_egress; in mv88e6xxx_port_mirror_del()
6418 dev_err(ds->dev, "failed to set egress port\n"); in mv88e6xxx_port_mirror_del()
6421 mutex_unlock(&chip->reg_lock); in mv88e6xxx_port_mirror_del()
6428 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_pre_bridge_flags()
6433 return -EINVAL; in mv88e6xxx_port_pre_bridge_flags()
6435 ops = chip->info->ops; in mv88e6xxx_port_pre_bridge_flags()
6437 if ((flags.mask & BR_FLOOD) && !ops->port_set_ucast_flood) in mv88e6xxx_port_pre_bridge_flags()
6438 return -EINVAL; in mv88e6xxx_port_pre_bridge_flags()
6440 if ((flags.mask & BR_MCAST_FLOOD) && !ops->port_set_mcast_flood) in mv88e6xxx_port_pre_bridge_flags()
6441 return -EINVAL; in mv88e6xxx_port_pre_bridge_flags()
6450 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_bridge_flags()
6467 err = chip->info->ops->port_set_ucast_flood(chip, port, in mv88e6xxx_port_bridge_flags()
6476 err = chip->info->ops->port_set_mcast_flood(chip, port, in mv88e6xxx_port_bridge_flags()
6514 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_lag_can_offload()
6526 dsa_lag_foreach_port(dp, ds->dst, &lag) in mv88e6xxx_lag_can_offload()
6539 if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH) { in mv88e6xxx_lag_can_offload()
6554 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_lag_sync_map()
6559 /* DSA LAG IDs are one-based, hardware is zero-based */ in mv88e6xxx_lag_sync_map()
6560 id = lag.id - 1; in mv88e6xxx_lag_sync_map()
6566 dsa_lag_foreach_port(dp, ds->dst, &lag) in mv88e6xxx_lag_sync_map()
6567 map |= BIT(dsa_towards_port(ds, dp->ds->index, dp->index)); in mv88e6xxx_lag_sync_map()
6599 active = mv88e6xxx_lag_mask_table[num_tx - 1][nth]; in mv88e6xxx_lag_set_port_mask()
6609 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_lag_sync_masks()
6618 ivec = BIT(mv88e6xxx_num_ports(chip)) - 1; in mv88e6xxx_lag_sync_masks()
6622 if (!dp->lag) in mv88e6xxx_lag_sync_masks()
6625 ivec &= ~BIT(dp->index); in mv88e6xxx_lag_sync_masks()
6634 dsa_lags_foreach_id(id, ds->dst) { in mv88e6xxx_lag_sync_masks()
6635 lag = dsa_lag_by_id(ds->dst, id); in mv88e6xxx_lag_sync_masks()
6640 dsa_lag_foreach_port(dp, ds->dst, lag) { in mv88e6xxx_lag_sync_masks()
6641 if (dp->lag_tx_enabled) in mv88e6xxx_lag_sync_masks()
6649 dsa_lag_foreach_port(dp, ds->dst, lag) { in mv88e6xxx_lag_sync_masks()
6650 if (!dp->lag_tx_enabled) in mv88e6xxx_lag_sync_masks()
6653 if (dp->ds == ds) in mv88e6xxx_lag_sync_masks()
6654 mv88e6xxx_lag_set_port_mask(mask, dp->index, in mv88e6xxx_lag_sync_masks()
6685 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_lag_change()
6699 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_lag_join()
6703 return -EOPNOTSUPP; in mv88e6xxx_port_lag_join()
6705 /* DSA LAG IDs are one-based */ in mv88e6xxx_port_lag_join()
6706 id = lag.id - 1; in mv88e6xxx_port_lag_join()
6731 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_lag_leave()
6744 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_crosschip_lag_change()
6758 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_crosschip_lag_join()
6762 return -EOPNOTSUPP; in mv88e6xxx_crosschip_lag_join()
6780 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_crosschip_lag_leave()
6858 struct device *dev = chip->dev; in mv88e6xxx_register_switch()
6863 return -ENOMEM; in mv88e6xxx_register_switch()
6865 ds->dev = dev; in mv88e6xxx_register_switch()
6866 ds->num_ports = mv88e6xxx_num_ports(chip); in mv88e6xxx_register_switch()
6867 ds->priv = chip; in mv88e6xxx_register_switch()
6868 ds->dev = dev; in mv88e6xxx_register_switch()
6869 ds->ops = &mv88e6xxx_switch_ops; in mv88e6xxx_register_switch()
6870 ds->ageing_time_min = chip->info->age_time_coeff; in mv88e6xxx_register_switch()
6871 ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX; in mv88e6xxx_register_switch()
6874 * 5-bit port mode, which we do not support. 640k^W16 ought to in mv88e6xxx_register_switch()
6877 ds->num_lag_ids = mv88e6xxx_has_lag(chip) ? 16 : 0; in mv88e6xxx_register_switch()
6886 dsa_unregister_switch(chip->ds); in mv88e6xxx_unregister_switch()
6891 const struct of_device_id *matches = dev->driver->of_match_table; in pdata_device_get_match_data()
6892 const struct dsa_mv88e6xxx_pdata *pdata = dev->platform_data; in pdata_device_get_match_data()
6894 for (; matches->name[0] || matches->type[0] || matches->compatible[0]; in pdata_device_get_match_data()
6896 if (!strcmp(pdata->compatible, matches->compatible)) in pdata_device_get_match_data()
6897 return matches->data; in pdata_device_get_match_data()
6907 return -EOPNOTSUPP; in mv88e6xxx_suspend()
6919 struct dsa_mv88e6xxx_pdata *pdata = mdiodev->dev.platform_data; in mv88e6xxx_probe()
6921 struct device *dev = &mdiodev->dev; in mv88e6xxx_probe()
6922 struct device_node *np = dev->of_node; in mv88e6xxx_probe()
6928 return -EINVAL; in mv88e6xxx_probe()
6936 if (!pdata->netdev) in mv88e6xxx_probe()
6937 return -EINVAL; in mv88e6xxx_probe()
6940 if (!(pdata->enabled_ports & (1 << port))) in mv88e6xxx_probe()
6942 if (strcmp(pdata->cd.port_names[port], "cpu")) in mv88e6xxx_probe()
6944 pdata->cd.netdev[port] = &pdata->netdev->dev; in mv88e6xxx_probe()
6950 return -EINVAL; in mv88e6xxx_probe()
6954 err = -ENOMEM; in mv88e6xxx_probe()
6958 chip->info = compat_info; in mv88e6xxx_probe()
6960 chip->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); in mv88e6xxx_probe()
6961 if (IS_ERR(chip->reset)) { in mv88e6xxx_probe()
6962 err = PTR_ERR(chip->reset); in mv88e6xxx_probe()
6965 if (chip->reset) in mv88e6xxx_probe()
6969 * otherwise continue with address specific smi init/detection. in mv88e6xxx_probe()
6973 err = mv88e6xxx_smi_init(chip, mdiodev->bus, mdiodev->addr); in mv88e6xxx_probe()
6982 if (chip->info->edsa_support == MV88E6XXX_EDSA_SUPPORTED) in mv88e6xxx_probe()
6983 chip->tag_protocol = DSA_TAG_PROTO_EDSA; in mv88e6xxx_probe()
6985 chip->tag_protocol = DSA_TAG_PROTO_DSA; in mv88e6xxx_probe()
6989 if (chip->info->ops->get_eeprom) { in mv88e6xxx_probe()
6991 of_property_read_u32(np, "eeprom-length", in mv88e6xxx_probe()
6992 &chip->eeprom_len); in mv88e6xxx_probe()
6994 chip->eeprom_len = pdata->eeprom_len; in mv88e6xxx_probe()
7004 chip->irq = of_irq_get(np, 0); in mv88e6xxx_probe()
7005 if (chip->irq == -EPROBE_DEFER) { in mv88e6xxx_probe()
7006 err = chip->irq; in mv88e6xxx_probe()
7012 chip->irq = pdata->irq; in mv88e6xxx_probe()
7014 /* Has to be performed before the MDIO bus is created, because in mv88e6xxx_probe()
7019 if (chip->irq > 0) in mv88e6xxx_probe()
7028 if (chip->info->g2_irqs > 0) { in mv88e6xxx_probe()
7053 if (chip->info->g2_irqs > 0) in mv88e6xxx_probe()
7056 if (chip->irq > 0) in mv88e6xxx_probe()
7062 dev_put(pdata->netdev); in mv88e6xxx_probe()
7069 struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev); in mv88e6xxx_remove()
7075 chip = ds->priv; in mv88e6xxx_remove()
7077 if (chip->info->ptp_support) { in mv88e6xxx_remove()
7088 if (chip->info->g2_irqs > 0) in mv88e6xxx_remove()
7091 if (chip->irq > 0) in mv88e6xxx_remove()
7099 struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev); in mv88e6xxx_shutdown()
7106 dev_set_drvdata(&mdiodev->dev, NULL); in mv88e6xxx_shutdown()