22  *	if we have HW ECC support.
38 #include <linux/mtd/nand-ecc-sw-hamming.h>
39 #include <linux/mtd/nand-ecc-sw-bch.h>
263 		res = chip->ecc.read_oob(chip, first_page + page_offset);  in nand_block_bad()
476 		status = chip->ecc.write_oob_raw(chip, page & chip->pagemask);  in nand_do_write_oob()
478 		status = chip->ecc.write_oob(chip, page & chip->pagemask);  in nand_do_write_oob()
2785  * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only
2789  * @ecc: ECC buffer
2790  * @ecclen: ECC length
2795  * Check if a data buffer and its associated ECC and OOB data contains only
2802  * 1/ ECC algorithms are working on pre-defined block sizes which are usually
2803  *    different from the NAND page size. When fixing bitflips, ECC engines will
2810  *    the payload data but also their associated ECC data, because a user might
2812  *    shouldn't consider the chunk as erased, and checking ECC bytes prevent
2815  *    data are protected by the ECC engine.
2817  *    extra OOB data to an ECC chunk.
2824 				void *ecc, int ecclen,  in nand_check_erased_ecc_chunk()  argument
2837 	ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold);  in nand_check_erased_ecc_chunk()
2852 		memset(ecc, 0xff, ecclen);  in nand_check_erased_ecc_chunk()
2877  * nand_read_page_raw - [INTERN] read raw page data without ecc
2883  * Not for syndrome calculating ECC controllers, which use a special oob layout.
2948  * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
2960 	int eccsize = chip->ecc.size;  in nand_read_page_raw_syndrome()
2961 	int eccbytes = chip->ecc.bytes;  in nand_read_page_raw_syndrome()
2969 	for (steps = chip->ecc.steps; steps > 0; steps--) {  in nand_read_page_raw_syndrome()
2976 		if (chip->ecc.prepad) {  in nand_read_page_raw_syndrome()
2977 			ret = nand_read_data_op(chip, oob, chip->ecc.prepad,  in nand_read_page_raw_syndrome()
2982 			oob += chip->ecc.prepad;  in nand_read_page_raw_syndrome()
2991 		if (chip->ecc.postpad) {  in nand_read_page_raw_syndrome()
2992 			ret = nand_read_data_op(chip, oob, chip->ecc.postpad,  in nand_read_page_raw_syndrome()
2997 			oob += chip->ecc.postpad;  in nand_read_page_raw_syndrome()
3012  * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
3022 	int i, eccsize = chip->ecc.size, ret;  in nand_read_page_swecc()
3023 	int eccbytes = chip->ecc.bytes;  in nand_read_page_swecc()
3024 	int eccsteps = chip->ecc.steps;  in nand_read_page_swecc()
3026 	uint8_t *ecc_calc = chip->ecc.calc_buf;  in nand_read_page_swecc()
3027 	uint8_t *ecc_code = chip->ecc.code_buf;  in nand_read_page_swecc()
3030 	chip->ecc.read_page_raw(chip, buf, 1, page);  in nand_read_page_swecc()
3033 		chip->ecc.calculate(chip, p, &ecc_calc[i]);  in nand_read_page_swecc()
3036 					 chip->ecc.total);  in nand_read_page_swecc()
3040 	eccsteps = chip->ecc.steps;  in nand_read_page_swecc()
3046 		stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]);  in nand_read_page_swecc()
3058  * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
3078 	/* Column address within the page aligned to ECC size (256bytes) */  in nand_read_subpage()
3079 	start_step = data_offs / chip->ecc.size;  in nand_read_subpage()
3080 	end_step = (data_offs + readlen - 1) / chip->ecc.size;  in nand_read_subpage()
3082 	index = start_step * chip->ecc.bytes;  in nand_read_subpage()
3084 	/* Data size aligned to ECC ecc.size */  in nand_read_subpage()
3085 	datafrag_len = num_steps * chip->ecc.size;  in nand_read_subpage()
3086 	eccfrag_len = num_steps * chip->ecc.bytes;  in nand_read_subpage()
3088 	data_col_addr = start_step * chip->ecc.size;  in nand_read_subpage()
3095 	/* Calculate ECC */  in nand_read_subpage()
3096 	for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)  in nand_read_subpage()
3097 		chip->ecc.calculate(chip, p, &chip->ecc.calc_buf[i]);  in nand_read_subpage()
3101 	 * ecc.pos. Let's make sure that there are no gaps in ECC positions.  in nand_read_subpage()
3118 		 * Send the command to read the particular ECC bytes take care  in nand_read_subpage()
3125 		if ((oobregion.offset + (num_steps * chip->ecc.bytes)) &  in nand_read_subpage()
3137 	ret = mtd_ooblayout_get_eccbytes(mtd, chip->ecc.code_buf,  in nand_read_subpage()
3143 	for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {  in nand_read_subpage()
3146 		stat = chip->ecc.correct(chip, p, &chip->ecc.code_buf[i],  in nand_read_subpage()
3147 					 &chip->ecc.calc_buf[i]);  in nand_read_subpage()
3149 		    (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {  in nand_read_subpage()
3151 			stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,  in nand_read_subpage()
3152 						&chip->ecc.code_buf[i],  in nand_read_subpage()
3153 						chip->ecc.bytes,  in nand_read_subpage()
3155 						chip->ecc.strength);  in nand_read_subpage()
3169  * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
3175  * Not for syndrome calculating ECC controllers which need a special oob layout.
3181 	int i, eccsize = chip->ecc.size, ret;  in nand_read_page_hwecc()
3182 	int eccbytes = chip->ecc.bytes;  in nand_read_page_hwecc()
3183 	int eccsteps = chip->ecc.steps;  in nand_read_page_hwecc()
3185 	uint8_t *ecc_calc = chip->ecc.calc_buf;  in nand_read_page_hwecc()
3186 	uint8_t *ecc_code = chip->ecc.code_buf;  in nand_read_page_hwecc()
3194 		chip->ecc.hwctl(chip, NAND_ECC_READ);  in nand_read_page_hwecc()
3200 		chip->ecc.calculate(chip, p, &ecc_calc[i]);  in nand_read_page_hwecc()
3209 					 chip->ecc.total);  in nand_read_page_hwecc()
3213 	eccsteps = chip->ecc.steps;  in nand_read_page_hwecc()
3219 		stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]);  in nand_read_page_hwecc()
3221 		    (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {  in nand_read_page_hwecc()
3226 						chip->ecc.strength);  in nand_read_page_hwecc()
3240  * nand_read_page_hwecc_oob_first - Hardware ECC page read with ECC
3247  * Hardware ECC for large page chips, which requires the ECC data to be
3254 	int i, eccsize = chip->ecc.size, ret;  in nand_read_page_hwecc_oob_first()
3255 	int eccbytes = chip->ecc.bytes;  in nand_read_page_hwecc_oob_first()
3256 	int eccsteps = chip->ecc.steps;  in nand_read_page_hwecc_oob_first()
3258 	uint8_t *ecc_code = chip->ecc.code_buf;  in nand_read_page_hwecc_oob_first()
3272 					 chip->ecc.total);  in nand_read_page_hwecc_oob_first()
3279 		chip->ecc.hwctl(chip, NAND_ECC_READ);  in nand_read_page_hwecc_oob_first()
3285 		stat = chip->ecc.correct(chip, p, &ecc_code[i], NULL);  in nand_read_page_hwecc_oob_first()
3287 		    (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {  in nand_read_page_hwecc_oob_first()
3292 							   chip->ecc.strength);  in nand_read_page_hwecc_oob_first()
3307  * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
3320 	int ret, i, eccsize = chip->ecc.size;  in nand_read_page_syndrome()
3321 	int eccbytes = chip->ecc.bytes;  in nand_read_page_syndrome()
3322 	int eccsteps = chip->ecc.steps;  in nand_read_page_syndrome()
3323 	int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad;  in nand_read_page_syndrome()
3335 		chip->ecc.hwctl(chip, NAND_ECC_READ);  in nand_read_page_syndrome()
3341 		if (chip->ecc.prepad) {  in nand_read_page_syndrome()
3342 			ret = nand_read_data_op(chip, oob, chip->ecc.prepad,  in nand_read_page_syndrome()
3347 			oob += chip->ecc.prepad;  in nand_read_page_syndrome()
3350 		chip->ecc.hwctl(chip, NAND_ECC_READSYN);  in nand_read_page_syndrome()
3356 		stat = chip->ecc.correct(chip, p, oob, NULL);  in nand_read_page_syndrome()
3360 		if (chip->ecc.postpad) {  in nand_read_page_syndrome()
3361 			ret = nand_read_data_op(chip, oob, chip->ecc.postpad,  in nand_read_page_syndrome()
3366 			oob += chip->ecc.postpad;  in nand_read_page_syndrome()
3370 		    (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {  in nand_read_page_syndrome()
3372 			stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,  in nand_read_page_syndrome()
3376 							   chip->ecc.strength);  in nand_read_page_syndrome()
3457  * when there are too many bitflips in a page (i.e., ECC error). After setting
3485  * nand_do_read_ops - [INTERN] Read data with ECC
3552 			 * the read methods return max bitflips per ecc step.  in nand_do_read_ops()
3555 				ret = chip->ecc.read_page_raw(chip, bufpoi,  in nand_do_read_ops()
3560 				ret = chip->ecc.read_subpage(chip, col, bytes,  in nand_do_read_ops()
3563 				ret = chip->ecc.read_page(chip, bufpoi,  in nand_do_read_ops()
3682  * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
3691 	int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;  in nand_read_oob_syndrome()
3692 	int eccsize = chip->ecc.size;  in nand_read_oob_syndrome()
3696 	ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0);  in nand_read_oob_syndrome()
3700 	for (i = 0; i < chip->ecc.steps; i++) {  in nand_read_oob_syndrome()
3750  * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
3758 	int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;  in nand_write_oob_syndrome()
3759 	int eccsize = chip->ecc.size, length = mtd->oobsize;  in nand_write_oob_syndrome()
3760 	int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps;  in nand_write_oob_syndrome()
3764 	 * data-ecc-data-ecc ... ecc-oob  in nand_write_oob_syndrome()
3766 	 * data-pad-ecc-pad-data-pad .... ecc-pad-oob  in nand_write_oob_syndrome()
3768 	if (!chip->ecc.prepad && !chip->ecc.postpad) {  in nand_write_oob_syndrome()
3862 			ret = chip->ecc.read_oob_raw(chip, page);  in nand_do_read_oob()
3864 			ret = chip->ecc.read_oob(chip, page);  in nand_do_read_oob()
3968  * Not for syndrome calculating ECC controllers, which use a special oob layout.
4034  * We need a special oob layout and handling even when ECC isn't checked.
4041 	int eccsize = chip->ecc.size;  in nand_write_page_raw_syndrome()
4042 	int eccbytes = chip->ecc.bytes;  in nand_write_page_raw_syndrome()
4050 	for (steps = chip->ecc.steps; steps > 0; steps--) {  in nand_write_page_raw_syndrome()
4057 		if (chip->ecc.prepad) {  in nand_write_page_raw_syndrome()
4058 			ret = nand_write_data_op(chip, oob, chip->ecc.prepad,  in nand_write_page_raw_syndrome()
4063 			oob += chip->ecc.prepad;  in nand_write_page_raw_syndrome()
4072 		if (chip->ecc.postpad) {  in nand_write_page_raw_syndrome()
4073 			ret = nand_write_data_op(chip, oob, chip->ecc.postpad,  in nand_write_page_raw_syndrome()
4078 			oob += chip->ecc.postpad;  in nand_write_page_raw_syndrome()
4092  * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
4102 	int i, eccsize = chip->ecc.size, ret;  in nand_write_page_swecc()
4103 	int eccbytes = chip->ecc.bytes;  in nand_write_page_swecc()
4104 	int eccsteps = chip->ecc.steps;  in nand_write_page_swecc()
4105 	uint8_t *ecc_calc = chip->ecc.calc_buf;  in nand_write_page_swecc()
4108 	/* Software ECC calculation */  in nand_write_page_swecc()
4110 		chip->ecc.calculate(chip, p, &ecc_calc[i]);  in nand_write_page_swecc()
4113 					 chip->ecc.total);  in nand_write_page_swecc()
4117 	return chip->ecc.write_page_raw(chip, buf, 1, page);  in nand_write_page_swecc()
4121  * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
4131 	int i, eccsize = chip->ecc.size, ret;  in nand_write_page_hwecc()
4132 	int eccbytes = chip->ecc.bytes;  in nand_write_page_hwecc()
4133 	int eccsteps = chip->ecc.steps;  in nand_write_page_hwecc()
4134 	uint8_t *ecc_calc = chip->ecc.calc_buf;  in nand_write_page_hwecc()
4142 		chip->ecc.hwctl(chip, NAND_ECC_WRITE);  in nand_write_page_hwecc()
4148 		chip->ecc.calculate(chip, p, &ecc_calc[i]);  in nand_write_page_hwecc()
4152 					 chip->ecc.total);  in nand_write_page_hwecc()
4165  * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write
4179 	uint8_t *ecc_calc = chip->ecc.calc_buf;  in nand_write_subpage_hwecc()
4180 	int ecc_size      = chip->ecc.size;  in nand_write_subpage_hwecc()
4181 	int ecc_bytes     = chip->ecc.bytes;  in nand_write_subpage_hwecc()
4182 	int ecc_steps     = chip->ecc.steps;  in nand_write_subpage_hwecc()
4194 		chip->ecc.hwctl(chip, NAND_ECC_WRITE);  in nand_write_subpage_hwecc()
4201 		/* mask ECC of un-touched subpages by padding 0xFF */  in nand_write_subpage_hwecc()
4205 			chip->ecc.calculate(chip, buf, ecc_calc);  in nand_write_subpage_hwecc()
4217 	/* copy calculated ECC for whole page to chip->buffer->oob */  in nand_write_subpage_hwecc()
4219 	ecc_calc = chip->ecc.calc_buf;  in nand_write_subpage_hwecc()
4221 					 chip->ecc.total);  in nand_write_subpage_hwecc()
4235  * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
4248 	int i, eccsize = chip->ecc.size;  in nand_write_page_syndrome()
4249 	int eccbytes = chip->ecc.bytes;  in nand_write_page_syndrome()
4250 	int eccsteps = chip->ecc.steps;  in nand_write_page_syndrome()
4260 		chip->ecc.hwctl(chip, NAND_ECC_WRITE);  in nand_write_page_syndrome()
4266 		if (chip->ecc.prepad) {  in nand_write_page_syndrome()
4267 			ret = nand_write_data_op(chip, oob, chip->ecc.prepad,  in nand_write_page_syndrome()
4272 			oob += chip->ecc.prepad;  in nand_write_page_syndrome()
4275 		chip->ecc.calculate(chip, p, oob);  in nand_write_page_syndrome()
4283 		if (chip->ecc.postpad) {  in nand_write_page_syndrome()
4284 			ret = nand_write_data_op(chip, oob, chip->ecc.postpad,  in nand_write_page_syndrome()
4289 			oob += chip->ecc.postpad;  in nand_write_page_syndrome()
4322 		chip->ecc.write_subpage)  in nand_write_page()
4328 		status = chip->ecc.write_page_raw(chip, buf, oob_required,  in nand_write_page()
4331 		status = chip->ecc.write_subpage(chip, offset, data_len, buf,  in nand_write_page()
4334 		status = chip->ecc.write_page(chip, buf, oob_required, page);  in nand_write_page()
4345  * nand_do_write_ops - [INTERN] NAND write with ECC
4350  * NAND write with ECC.
4478  * panic_nand_write - [MTD Interface] NAND write with ECC
4485  * NAND write with ECC. Used when performing writes in interrupt context, this
5351 	err = of_property_read_string(np, "nand-ecc-mode", &pm);  in of_get_rawnand_ecc_engine_type_legacy()
5384 	err = of_property_read_string(np, "nand-ecc-mode", &pm);  in of_get_rawnand_ecc_placement_legacy()
5398 	err = of_property_read_string(np, "nand-ecc-mode", &pm);  in of_get_rawnand_ecc_algo_legacy()
5412 	struct nand_ecc_props *user_conf = &chip->base.ecc.user_conf;  in of_get_nand_ecc_legacy_user_config()
5536 	 * ECC engine type, we will default to NAND_ECC_ENGINE_TYPE_ON_HOST.  in rawnand_dt_init()
5538 	nand->ecc.defaults.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;  in rawnand_dt_init()
5545 	if (nand->ecc.user_conf.engine_type != NAND_ECC_ENGINE_TYPE_INVALID)  in rawnand_dt_init()
5546 		chip->ecc.engine_type = nand->ecc.user_conf.engine_type;  in rawnand_dt_init()
5547 	if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_INVALID)  in rawnand_dt_init()
5548 		chip->ecc.engine_type = nand->ecc.defaults.engine_type;  in rawnand_dt_init()
5550 	chip->ecc.placement = nand->ecc.user_conf.placement;  in rawnand_dt_init()
5551 	chip->ecc.algo = nand->ecc.user_conf.algo;  in rawnand_dt_init()
5552 	chip->ecc.strength = nand->ecc.user_conf.strength;  in rawnand_dt_init()
5553 	chip->ecc.size = nand->ecc.user_conf.step_size;  in rawnand_dt_init()
5568  * to tweak some ECC-related parameters before nand_scan_tail(). This separation
5665 	base->ecc.user_conf.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;  in rawnand_sw_hamming_init()
5666 	base->ecc.user_conf.algo = NAND_ECC_ALGO_HAMMING;  in rawnand_sw_hamming_init()
5667 	base->ecc.user_conf.strength = chip->ecc.strength;  in rawnand_sw_hamming_init()
5668 	base->ecc.user_conf.step_size = chip->ecc.size;  in rawnand_sw_hamming_init()
5674 	engine_conf = base->ecc.ctx.priv;  in rawnand_sw_hamming_init()
5676 	if (chip->ecc.options & NAND_ECC_SOFT_HAMMING_SM_ORDER)  in rawnand_sw_hamming_init()
5679 	chip->ecc.size = base->ecc.ctx.conf.step_size;  in rawnand_sw_hamming_init()
5680 	chip->ecc.strength = base->ecc.ctx.conf.strength;  in rawnand_sw_hamming_init()
5681 	chip->ecc.total = base->ecc.ctx.total;  in rawnand_sw_hamming_init()
5682 	chip->ecc.steps = nanddev_get_ecc_nsteps(base);  in rawnand_sw_hamming_init()
5683 	chip->ecc.bytes = base->ecc.ctx.total / nanddev_get_ecc_nsteps(base);  in rawnand_sw_hamming_init()
5724 	base->ecc.user_conf.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;  in rawnand_sw_bch_init()
5725 	base->ecc.user_conf.algo = NAND_ECC_ALGO_BCH;  in rawnand_sw_bch_init()
5726 	base->ecc.user_conf.step_size = chip->ecc.size;  in rawnand_sw_bch_init()
5727 	base->ecc.user_conf.strength = chip->ecc.strength;  in rawnand_sw_bch_init()
5733 	chip->ecc.size = ecc_conf->step_size;  in rawnand_sw_bch_init()
5734 	chip->ecc.strength = ecc_conf->strength;  in rawnand_sw_bch_init()
5735 	chip->ecc.total = base->ecc.ctx.total;  in rawnand_sw_bch_init()
5736 	chip->ecc.steps = nanddev_get_ecc_nsteps(base);  in rawnand_sw_bch_init()
5737 	chip->ecc.bytes = base->ecc.ctx.total / nanddev_get_ecc_nsteps(base);  in rawnand_sw_bch_init()
5771 	struct nand_ecc_ctrl *ecc = &chip->ecc;  in nand_set_ecc_on_host_ops()  local
5773 	switch (ecc->placement) {  in nand_set_ecc_on_host_ops()
5777 		if (!ecc->read_page)  in nand_set_ecc_on_host_ops()
5778 			ecc->read_page = nand_read_page_hwecc;  in nand_set_ecc_on_host_ops()
5779 		if (!ecc->write_page)  in nand_set_ecc_on_host_ops()
5780 			ecc->write_page = nand_write_page_hwecc;  in nand_set_ecc_on_host_ops()
5781 		if (!ecc->read_page_raw)  in nand_set_ecc_on_host_ops()
5782 			ecc->read_page_raw = nand_read_page_raw;  in nand_set_ecc_on_host_ops()
5783 		if (!ecc->write_page_raw)  in nand_set_ecc_on_host_ops()
5784 			ecc->write_page_raw = nand_write_page_raw;  in nand_set_ecc_on_host_ops()
5785 		if (!ecc->read_oob)  in nand_set_ecc_on_host_ops()
5786 			ecc->read_oob = nand_read_oob_std;  in nand_set_ecc_on_host_ops()
5787 		if (!ecc->write_oob)  in nand_set_ecc_on_host_ops()
5788 			ecc->write_oob = nand_write_oob_std;  in nand_set_ecc_on_host_ops()
5789 		if (!ecc->read_subpage)  in nand_set_ecc_on_host_ops()
5790 			ecc->read_subpage = nand_read_subpage;  in nand_set_ecc_on_host_ops()
5791 		if (!ecc->write_subpage && ecc->hwctl && ecc->calculate)  in nand_set_ecc_on_host_ops()
5792 			ecc->write_subpage = nand_write_subpage_hwecc;  in nand_set_ecc_on_host_ops()
5796 		if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) &&  in nand_set_ecc_on_host_ops()
5797 		    (!ecc->read_page ||  in nand_set_ecc_on_host_ops()
5798 		     ecc->read_page == nand_read_page_hwecc ||  in nand_set_ecc_on_host_ops()
5799 		     !ecc->write_page ||  in nand_set_ecc_on_host_ops()
5800 		     ecc->write_page == nand_write_page_hwecc)) {  in nand_set_ecc_on_host_ops()
5801 			WARN(1, "No ECC functions supplied; hardware ECC not possible\n");  in nand_set_ecc_on_host_ops()
5805 		if (!ecc->read_page)  in nand_set_ecc_on_host_ops()
5806 			ecc->read_page = nand_read_page_syndrome;  in nand_set_ecc_on_host_ops()
5807 		if (!ecc->write_page)  in nand_set_ecc_on_host_ops()
5808 			ecc->write_page = nand_write_page_syndrome;  in nand_set_ecc_on_host_ops()
5809 		if (!ecc->read_page_raw)  in nand_set_ecc_on_host_ops()
5810 			ecc->read_page_raw = nand_read_page_raw_syndrome;  in nand_set_ecc_on_host_ops()
5811 		if (!ecc->write_page_raw)  in nand_set_ecc_on_host_ops()
5812 			ecc->write_page_raw = nand_write_page_raw_syndrome;  in nand_set_ecc_on_host_ops()
5813 		if (!ecc->read_oob)  in nand_set_ecc_on_host_ops()
5814 			ecc->read_oob = nand_read_oob_syndrome;  in nand_set_ecc_on_host_ops()
5815 		if (!ecc->write_oob)  in nand_set_ecc_on_host_ops()
5816 			ecc->write_oob = nand_write_oob_syndrome;  in nand_set_ecc_on_host_ops()
5821 			ecc->placement);  in nand_set_ecc_on_host_ops()
5832 	struct nand_ecc_ctrl *ecc = &chip->ecc;  in nand_set_ecc_soft_ops()  local
5835 	if (WARN_ON(ecc->engine_type != NAND_ECC_ENGINE_TYPE_SOFT))  in nand_set_ecc_soft_ops()
5838 	switch (ecc->algo) {  in nand_set_ecc_soft_ops()
5840 		ecc->calculate = rawnand_sw_hamming_calculate;  in nand_set_ecc_soft_ops()
5841 		ecc->correct = rawnand_sw_hamming_correct;  in nand_set_ecc_soft_ops()
5842 		ecc->read_page = nand_read_page_swecc;  in nand_set_ecc_soft_ops()
5843 		ecc->read_subpage = nand_read_subpage;  in nand_set_ecc_soft_ops()
5844 		ecc->write_page = nand_write_page_swecc;  in nand_set_ecc_soft_ops()
5845 		if (!ecc->read_page_raw)  in nand_set_ecc_soft_ops()
5846 			ecc->read_page_raw = nand_read_page_raw;  in nand_set_ecc_soft_ops()
5847 		if (!ecc->write_page_raw)  in nand_set_ecc_soft_ops()
5848 			ecc->write_page_raw = nand_write_page_raw;  in nand_set_ecc_soft_ops()
5849 		ecc->read_oob = nand_read_oob_std;  in nand_set_ecc_soft_ops()
5850 		ecc->write_oob = nand_write_oob_std;  in nand_set_ecc_soft_ops()
5851 		if (!ecc->size)  in nand_set_ecc_soft_ops()
5852 			ecc->size = 256;  in nand_set_ecc_soft_ops()
5853 		ecc->bytes = 3;  in nand_set_ecc_soft_ops()
5854 		ecc->strength = 1;  in nand_set_ecc_soft_ops()
5857 			ecc->options |= NAND_ECC_SOFT_HAMMING_SM_ORDER;  in nand_set_ecc_soft_ops()
5861 			WARN(1, "Hamming ECC initialization failed!\n");  in nand_set_ecc_soft_ops()
5871 		ecc->calculate = rawnand_sw_bch_calculate;  in nand_set_ecc_soft_ops()
5872 		ecc->correct = rawnand_sw_bch_correct;  in nand_set_ecc_soft_ops()
5873 		ecc->read_page = nand_read_page_swecc;  in nand_set_ecc_soft_ops()
5874 		ecc->read_subpage = nand_read_subpage;  in nand_set_ecc_soft_ops()
5875 		ecc->write_page = nand_write_page_swecc;  in nand_set_ecc_soft_ops()
5876 		if (!ecc->read_page_raw)  in nand_set_ecc_soft_ops()
5877 			ecc->read_page_raw = nand_read_page_raw;  in nand_set_ecc_soft_ops()
5878 		if (!ecc->write_page_raw)  in nand_set_ecc_soft_ops()
5879 			ecc->write_page_raw = nand_write_page_raw;  in nand_set_ecc_soft_ops()
5880 		ecc->read_oob = nand_read_oob_std;  in nand_set_ecc_soft_ops()
5881 		ecc->write_oob = nand_write_oob_std;  in nand_set_ecc_soft_ops()
5884 		 * We can only maximize ECC config when the default layout is  in nand_set_ecc_soft_ops()
5888 		if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH &&  in nand_set_ecc_soft_ops()
5890 			nanddev->ecc.user_conf.flags &= ~NAND_ECC_MAXIMIZE_STRENGTH;  in nand_set_ecc_soft_ops()
5894 			WARN(1, "BCH ECC initialization failed!\n");  in nand_set_ecc_soft_ops()
5900 		WARN(1, "Unsupported ECC algorithm!\n");  in nand_set_ecc_soft_ops()
5906  * nand_check_ecc_caps - check the sanity of preset ECC settings
5908  * @caps: ECC caps info structure
5909  * @oobavail: OOB size that the ECC engine can use
5911  * When ECC step size and strength are already set, check if they are supported
5912  * by the controller and the calculated ECC bytes fit within the chip's OOB.
5913  * On success, the calculated ECC bytes is set.
5921 	int preset_step = chip->ecc.size;  in nand_check_ecc_caps()
5922 	int preset_strength = chip->ecc.strength;  in nand_check_ecc_caps()
5942 				pr_err("ECC (step, strength) = (%d, %d) does not fit in OOB",  in nand_check_ecc_caps()
5947 			chip->ecc.bytes = ecc_bytes;  in nand_check_ecc_caps()
5953 	pr_err("ECC (step, strength) = (%d, %d) not supported on this controller",  in nand_check_ecc_caps()
5960  * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
5962  * @caps: ECC engine caps info structure
5963  * @oobavail: OOB size that the ECC engine can use
5965  * If a chip's ECC requirement is provided, try to meet it with the least
5966  * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
5967  * On success, the chosen ECC settings are set.
6022 			 * with the least number of ECC bytes.  in nand_match_ecc_req()
6036 	chip->ecc.size = best_step;  in nand_match_ecc_req()
6037 	chip->ecc.strength = best_strength;  in nand_match_ecc_req()
6038 	chip->ecc.bytes = best_ecc_bytes;  in nand_match_ecc_req()
6044  * nand_maximize_ecc - choose the max ECC strength available
6046  * @caps: ECC engine caps info structure
6047  * @oobavail: OOB size that the ECC engine can use
6049  * Choose the max ECC strength that is supported on the controller, and can fit
6050  * within the chip's OOB.  On success, the chosen ECC settings are set.
6068 		/* If chip->ecc.size is already set, respect it */  in nand_maximize_ecc()
6069 		if (chip->ecc.size && step_size != chip->ecc.size)  in nand_maximize_ecc()
6106 	chip->ecc.size = best_step;  in nand_maximize_ecc()
6107 	chip->ecc.strength = best_strength;  in nand_maximize_ecc()
6108 	chip->ecc.bytes = best_ecc_bytes;  in nand_maximize_ecc()
6114  * nand_ecc_choose_conf - Set the ECC strength and ECC step size
6116  * @caps: ECC engine caps info structure
6117  * @oobavail: OOB size that the ECC engine can use
6119  * Choose the ECC configuration according to following logic.
6121  * 1. If both ECC step size and ECC strength are already set (usually by DT)
6123  * 2. If the user provided the nand-ecc-maximize property, then select maximum
6124  *    ECC strength.
6125  * 3. Otherwise, try to match the ECC step size and ECC strength closest
6127  *    requirement then fallback to the maximum ECC step size and ECC strength.
6129  * On success, the chosen ECC settings are set.
6140 	if (chip->ecc.size && chip->ecc.strength)  in nand_ecc_choose_conf()
6143 	if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH)  in nand_ecc_choose_conf()
6208 	struct nand_ecc_ctrl *ecc = &chip->ecc;  in nand_scan_tail()  local
6240 	    !(ecc->engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&  in nand_scan_tail()
6241 	      ecc->algo == NAND_ECC_ALGO_BCH) &&  in nand_scan_tail()
6242 	    !(ecc->engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&  in nand_scan_tail()
6243 	      ecc->algo == NAND_ECC_ALGO_HAMMING)) {  in nand_scan_tail()
6259 			 * page with ECC layout when ->oobsize <= 128 for  in nand_scan_tail()
6262 			if (ecc->engine_type == NAND_ECC_ENGINE_TYPE_NONE) {  in nand_scan_tail()
6276 	 * Check ECC mode, default to software if 3byte/512byte hardware ECC is  in nand_scan_tail()
6277 	 * selected and we have 256 byte pagesize fallback to software ECC  in nand_scan_tail()
6280 	switch (ecc->engine_type) {  in nand_scan_tail()
6286 		if (mtd->writesize >= ecc->size) {  in nand_scan_tail()
6287 			if (!ecc->strength) {  in nand_scan_tail()
6288 				WARN(1, "Driver must set ecc.strength when using hardware ECC\n");  in nand_scan_tail()
6294 		pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",  in nand_scan_tail()
6295 			ecc->size, mtd->writesize);  in nand_scan_tail()
6296 		ecc->engine_type = NAND_ECC_ENGINE_TYPE_SOFT;  in nand_scan_tail()
6297 		ecc->algo = NAND_ECC_ALGO_HAMMING;  in nand_scan_tail()
6307 		if (!ecc->read_page || !ecc->write_page) {  in nand_scan_tail()
6308 			WARN(1, "No ECC functions supplied; on-die ECC not possible\n");  in nand_scan_tail()
6312 		if (!ecc->read_oob)  in nand_scan_tail()
6313 			ecc->read_oob = nand_read_oob_std;  in nand_scan_tail()
6314 		if (!ecc->write_oob)  in nand_scan_tail()
6315 			ecc->write_oob = nand_write_oob_std;  in nand_scan_tail()
6320 		ecc->read_page = nand_read_page_raw;  in nand_scan_tail()
6321 		ecc->write_page = nand_write_page_raw;  in nand_scan_tail()
6322 		ecc->read_oob = nand_read_oob_std;  in nand_scan_tail()
6323 		ecc->read_page_raw = nand_read_page_raw;  in nand_scan_tail()
6324 		ecc->write_page_raw = nand_write_page_raw;  in nand_scan_tail()
6325 		ecc->write_oob = nand_write_oob_std;  in nand_scan_tail()
6326 		ecc->size = mtd->writesize;  in nand_scan_tail()
6327 		ecc->bytes = 0;  in nand_scan_tail()
6328 		ecc->strength = 0;  in nand_scan_tail()
6332 		WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->engine_type);  in nand_scan_tail()
6337 	if (ecc->correct || ecc->calculate) {  in nand_scan_tail()
6338 		ecc->calc_buf = kmalloc(mtd->oobsize, GFP_KERNEL);  in nand_scan_tail()
6339 		ecc->code_buf = kmalloc(mtd->oobsize, GFP_KERNEL);  in nand_scan_tail()
6340 		if (!ecc->calc_buf || !ecc->code_buf) {  in nand_scan_tail()
6347 	if (!ecc->read_oob_raw)  in nand_scan_tail()
6348 		ecc->read_oob_raw = ecc->read_oob;  in nand_scan_tail()
6349 	if (!ecc->write_oob_raw)  in nand_scan_tail()
6350 		ecc->write_oob_raw = ecc->write_oob;  in nand_scan_tail()
6352 	/* propagate ecc info to mtd_info */  in nand_scan_tail()
6353 	mtd->ecc_strength = ecc->strength;  in nand_scan_tail()
6354 	mtd->ecc_step_size = ecc->size;  in nand_scan_tail()
6357 	 * Set the number of read / write steps for one page depending on ECC  in nand_scan_tail()
6360 	if (!ecc->steps)  in nand_scan_tail()
6361 		ecc->steps = mtd->writesize / ecc->size;  in nand_scan_tail()
6362 	if (ecc->steps * ecc->size != mtd->writesize) {  in nand_scan_tail()
6363 		WARN(1, "Invalid ECC parameters\n");  in nand_scan_tail()
6368 	if (!ecc->total) {  in nand_scan_tail()
6369 		ecc->total = ecc->steps * ecc->bytes;  in nand_scan_tail()
6370 		chip->base.ecc.ctx.total = ecc->total;  in nand_scan_tail()
6373 	if (ecc->total > mtd->oobsize) {  in nand_scan_tail()
6374 		WARN(1, "Total number of ECC bytes exceeded oobsize\n");  in nand_scan_tail()
6389 	/* ECC sanity check: warn if it's too weak */  in nand_scan_tail()
6391 …pr_warn("WARNING: %s: the ECC used on your system (%db/%dB) is too weak compared to the one requir…  in nand_scan_tail()
6392 			mtd->name, chip->ecc.strength, chip->ecc.size,  in nand_scan_tail()
6396 	/* Allow subpage writes up to ecc.steps. Not possible for MLC flash */  in nand_scan_tail()
6398 		switch (ecc->steps) {  in nand_scan_tail()
6415 	switch (ecc->engine_type) {  in nand_scan_tail()
6508 	kfree(ecc->code_buf);  in nand_scan_tail()
6509 	kfree(ecc->calc_buf);  in nand_scan_tail()
6575 	if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT) {  in nand_cleanup()
6576 		if (chip->ecc.algo == NAND_ECC_ALGO_HAMMING)  in nand_cleanup()
6578 		else if (chip->ecc.algo == NAND_ECC_ALGO_BCH)  in nand_cleanup()
6590 	kfree(chip->ecc.code_buf);  in nand_cleanup()
6591 	kfree(chip->ecc.calc_buf);  in nand_cleanup()