Lines Matching defs:brcmnand_controller

214 struct brcmnand_controller {  struct
215 	struct device		*dev;
216 	struct nand_controller	controller;
217 	void __iomem		*nand_base;
218 	void __iomem		*nand_fc; /* flash cache */
219 	void __iomem		*flash_dma_base;
220 	int			irq;
221 	unsigned int		dma_irq;
222 	int			nand_version;
225 	struct brcmnand_soc	*soc;
228 	struct clk		*clk;
230 	int			cmd_pending;
231 	bool			dma_pending;
232 	bool                    edu_pending;
233 	struct completion	done;
234 	struct completion	dma_done;
235 	struct completion       edu_done;
238 	struct list_head host_list;
241 	const u16               *edu_offsets;
242 	void __iomem            *edu_base;
243 	int			edu_irq;
244 	int                     edu_count;
245 	u64                     edu_dram_addr;
246 	u32                     edu_ext_addr;
247 	u32                     edu_cmd;
248 	u32                     edu_config;
249 	int			sas; /* spare area size, per flash cache */
250 	int			sector_size_1k;
251 	u8			*oob;
254 	const u16		*flash_dma_offsets;
255 	struct brcm_nand_dma_desc *dma_desc;
256 	dma_addr_t		dma_pa;
258 	int (*dma_trans)(struct brcmnand_host *host, u64 addr, u32 *buf,
262 	u8			flash_cache[FC_BYTES];
265 	const u16		*reg_offsets;
266 	unsigned int		reg_spacing; /* between CS1, CS2, ... regs */
267 	const u8		*cs_offsets; /* within each chip-select */
268 	const u8		*cs0_offsets; /* within CS0, if different */
269 	unsigned int		max_block_size;
270 	const unsigned int	*block_sizes;
271 	unsigned int		max_page_size;
272 	const unsigned int	*page_sizes;
273 	unsigned int		page_size_shift;
274 	unsigned int		max_oob;
275 	u32			ecc_level_shift;
276 	u32			features;
279 	u32			nand_cs_nand_select;
280 	u32			nand_cs_nand_xor;
281 	u32			corr_stat_threshold;
282 	u32			flash_dma_mode;
283 	u32                     flash_edu_mode;
284 	bool			pio_poll_mode;