Lines Matching refs:pci_read_config_dword

573 	pci_read_config_dword(pdev, PCI_GLI_9755_WT, &wt_value);  in gl9755_wt_on()
590 pci_read_config_dword(pdev, PCI_GLI_9755_WT, &wt_value); in gl9755_wt_off()
607 pci_read_config_dword(pdev, PCI_GLI_9755_PLL, &pll); in gl9755_disable_ssc_pll()
618 pci_read_config_dword(pdev, PCI_GLI_9755_PLL, &pll); in gl9755_set_pll()
638 pci_read_config_dword(pdev, PCI_GLI_9755_MISC, &misc); in gl9755_ssc_enable()
651 pci_read_config_dword(pdev, PCI_GLI_9755_PLL, &pll); in gl9755_set_ssc()
652 pci_read_config_dword(pdev, PCI_GLI_9755_PLLSSC, &ssc); in gl9755_set_ssc()
727 pci_read_config_dword(pdev, PCI_GLI_9755_PECONF, &value); in gl9755_hw_setting()
741 pci_read_config_dword(pdev, PCI_GLI_9755_SerDes, &value); in gl9755_hw_setting()
745 pci_read_config_dword(pdev, PCI_GLI_9755_CFG2, &value); in gl9755_hw_setting()
753 pci_read_config_dword(pdev, PCI_GLI_9755_PM_CTRL, &value); in gl9755_hw_setting()
767 pci_read_config_dword(pdev, PCIE_GLI_9767_VHS, &vhs_value); in gl9767_vhs_read()
784 pci_read_config_dword(pdev, PCIE_GLI_9767_VHS, &vhs_value); in gl9767_vhs_write()
803 pci_read_config_dword(pdev, PCIE_GLI_9767_COM_MAILBOX, &value); in gl9767_ssc_enable()
818 pci_read_config_dword(pdev, PCIE_GLI_9767_SD_PLL_CTL, &pll); in gl9767_set_ssc()
819 pci_read_config_dword(pdev, PCIE_GLI_9767_SD_PLL_CTL2, &ssc); in gl9767_set_ssc()
838 pci_read_config_dword(pdev, PCIE_GLI_9767_SD_PLL_CTL, &pll); in gl9767_set_pll()
868 pci_read_config_dword(pdev, PCIE_GLI_9767_SD_PLL_CTL, &pll); in gl9767_disable_ssc_pll()
888 pci_read_config_dword(pdev, PCIE_GLI_9767_CFG, &value); in sdhci_gl9767_set_clock()
906 pci_read_config_dword(pdev, PCIE_GLI_9767_CFG, &value); in sdhci_gl9767_set_clock()
929 pci_read_config_dword(pdev, PCIE_GLI_9767_PWR_MACRO_CTL, &value); in gl9767_hw_setting()
941 pci_read_config_dword(pdev, PCIE_GLI_9767_SCR, &value); in gl9767_hw_setting()
979 pci_read_config_dword(pdev, PCIE_GLI_9767_COMBO_MUX_CTL, &value); in gl9767_init_sd_express()
983 pci_read_config_dword(pdev, PCIE_GLI_9767_SD_DATA_MULTI_CTL, &value); in gl9767_init_sd_express()
989 pci_read_config_dword(pdev, PCIE_GLI_9767_NORMAL_ERR_INT_STATUS_REG2, &value); in gl9767_init_sd_express()
993 pci_read_config_dword(pdev, PCIE_GLI_9767_NORMAL_ERR_INT_STATUS_EN_REG2, &value); in gl9767_init_sd_express()
997 pci_read_config_dword(pdev, PCIE_GLI_9767_NORMAL_ERR_INT_SIGNAL_EN_REG2, &value); in gl9767_init_sd_express()
1001 pci_read_config_dword(pdev, PCIE_GLI_9767_CFG, &value); in gl9767_init_sd_express()
1013 pci_read_config_dword(pdev, PCIE_GLI_9767_SD_EXPRESS_CTL, &value); in gl9767_init_sd_express()
1019 pci_read_config_dword(pdev, PCIE_GLI_9767_NORMAL_ERR_INT_STATUS_REG2, &value); in gl9767_init_sd_express()
1027 pci_read_config_dword(pdev, PCIE_GLI_9767_SDHC_CAP, &value); in gl9767_init_sd_express()
1029 pci_read_config_dword(pdev, PCIE_GLI_9767_SD_EXPRESS_CTL, &value); in gl9767_init_sd_express()
1282 pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value); in gli_set_gl9763e()
1287 pci_read_config_dword(pdev, PCIE_GLI_9763E_SCR, &value); in gli_set_gl9763e()
1291 pci_read_config_dword(pdev, PCIE_GLI_9763E_MMC_CTRL, &value); in gli_set_gl9763e()
1295 pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG2, &value); in gli_set_gl9763e()
1301 pci_read_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, &value); in gli_set_gl9763e()
1306 pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value); in gli_set_gl9763e()
1318 pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value); in gl9763e_set_low_power_negotiation()
1323 pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG, &value); in gl9763e_set_low_power_negotiation()
1332 pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value); in gl9763e_set_low_power_negotiation()
1466 pci_read_config_dword(pdev, PCIE_GLI_9763E_MB, &value); in gli_probe_slot_gl9763e()