198 	mci_writel(host, CTRL, ctrl);  in dw_mci_ctrl_reset()
240 	mci_writel(host, CMDARG, arg);  in mci_send_cmd()
243 	mci_writel(host, CMD, SDMMC_CMD_START | cmd);  in mci_send_cmd()
294 		mci_writel(host, CLKENA, clk_en_a);  in dw_mci_prepare_command()
406 	mci_writel(host, CMDARG, cmd->arg);  in dw_mci_start_command()
410 	mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START);  in dw_mci_start_command()
454 	mci_writel(host, BMOD, bmod);  in dw_mci_idmac_reset()
465 	mci_writel(host, CTRL, temp);  in dw_mci_idmac_stop_dma()
471 	mci_writel(host, BMOD, temp);  in dw_mci_idmac_stop_dma()
558 		mci_writel(host, IDSTS64, IDMAC_INT_CLR);  in dw_mci_idmac_init()
559 		mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI |  in dw_mci_idmac_init()
563 		mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff);  in dw_mci_idmac_init()
564 		mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32);  in dw_mci_idmac_init()
568 		mci_writel(host, IDSTS, IDMAC_INT_CLR);  in dw_mci_idmac_init()
569 		mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI |  in dw_mci_idmac_init()
573 		mci_writel(host, DBADDR, host->sg_dma);  in dw_mci_idmac_init()
747 	mci_writel(host, CTRL, temp);  in dw_mci_idmac_start_dma()
755 	mci_writel(host, BMOD, temp);  in dw_mci_idmac_start_dma()
758 	mci_writel(host, PLDMND, 1);  in dw_mci_idmac_start_dma()
1027 	mci_writel(host, FIFOTH, fifoth_val);  in dw_mci_adjust_fifoth()
1075 	mci_writel(host, CDTHRCTL, SDMMC_SET_THLD(thld_size, enable));  in dw_mci_ctrl_thld()
1079 	mci_writel(host, CDTHRCTL, 0);  in dw_mci_ctrl_thld()
1120 	mci_writel(host, CTRL, temp);  in dw_mci_submit_data_dma()
1126 	mci_writel(host, INTMASK, temp);  in dw_mci_submit_data_dma()
1171 		mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR);  in dw_mci_submit_data()
1176 		mci_writel(host, INTMASK, temp);  in dw_mci_submit_data()
1181 		mci_writel(host, CTRL, temp);  in dw_mci_submit_data()
1192 			mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_submit_data()
1219 		mci_writel(host, CLKENA, 0);  in dw_mci_setup_bus()
1253 		mci_writel(host, CLKENA, 0);  in dw_mci_setup_bus()
1254 		mci_writel(host, CLKSRC, 0);  in dw_mci_setup_bus()
1260 		mci_writel(host, CLKDIV, div);  in dw_mci_setup_bus()
1269 		mci_writel(host, CLKENA, clk_en_a);  in dw_mci_setup_bus()
1283 	mci_writel(host, CTYPE, (slot->ctype << slot->id));  in dw_mci_setup_bus()
1312 	mci_writel(host, TMOUT, tmout);  in dw_mci_set_data_timeout()
1338 		mci_writel(host, BYTCNT, data->blksz*data->blocks);  in __dw_mci_start_request()
1339 		mci_writel(host, BLKSIZ, data->blksz);  in __dw_mci_start_request()
1471 	mci_writel(slot->host, UHS_REG, regs);  in dw_mci_set_ios()
1498 		mci_writel(slot->host, PWREN, regs);  in dw_mci_set_ios()
1537 		mci_writel(slot->host, PWREN, regs);  in dw_mci_set_ios()
1593 	mci_writel(host, UHS_REG, uhs);  in dw_mci_switch_voltage()
1638 	mci_writel(host, RST_N, reset);  in dw_mci_hw_reset()
1641 	mci_writel(host, RST_N, reset);  in dw_mci_hw_reset()
1668 		mci_writel(host, CLKENA, clk_en_a);  in dw_mci_prepare_sdio_irq()
1688 	mci_writel(host, INTMASK, int_mask);  in __dw_mci_enable_sdio_irq()
1763 		mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_reset()
2626 		mci_writel(host, RINTSTS, SDMMC_INT_RXDR);  in dw_mci_read_data_pio()
2682 		mci_writel(host, RINTSTS, SDMMC_INT_TXDR);  in dw_mci_write_data_pio()
2735 			mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH);  in dw_mci_interrupt()
2753 			mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS);  in dw_mci_interrupt()
2768 			mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS);  in dw_mci_interrupt()
2788 			mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER);  in dw_mci_interrupt()
2803 			mci_writel(host, RINTSTS, SDMMC_INT_RXDR);  in dw_mci_interrupt()
2809 			mci_writel(host, RINTSTS, SDMMC_INT_TXDR);  in dw_mci_interrupt()
2817 			mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE);  in dw_mci_interrupt()
2824 			mci_writel(host, RINTSTS, SDMMC_INT_CD);  in dw_mci_interrupt()
2829 			mci_writel(host, RINTSTS,  in dw_mci_interrupt()
2844 			mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI |  in dw_mci_interrupt()
2846 			mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI);  in dw_mci_interrupt()
2853 			mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI |  in dw_mci_interrupt()
2855 			mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI);  in dw_mci_interrupt()
3276 		mci_writel(host, INTMASK, temp);  in dw_mci_enable_cd()
3394 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_probe()
3395 	mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */  in dw_mci_probe()
3398 	mci_writel(host, TMOUT, 0xFFFFFFFF);  in dw_mci_probe()
3419 	mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_probe()
3422 	mci_writel(host, CLKENA, 0);  in dw_mci_probe()
3423 	mci_writel(host, CLKSRC, 0);  in dw_mci_probe()
3449 	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |  in dw_mci_probe()
3453 	mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);  in dw_mci_probe()
3493 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_remove()
3494 	mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */  in dw_mci_remove()
3497 	mci_writel(host, CLKENA, 0);  in dw_mci_remove()
3498 	mci_writel(host, CLKSRC, 0);  in dw_mci_remove()
3561 	mci_writel(host, FIFOTH, host->fifoth_val);  in dw_mci_runtime_resume()
3565 	mci_writel(host, TMOUT, 0xFFFFFFFF);  in dw_mci_runtime_resume()
3567 	mci_writel(host, RINTSTS, 0xFFFFFFFF);  in dw_mci_runtime_resume()
3568 	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |  in dw_mci_runtime_resume()
3571 	mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);  in dw_mci_runtime_resume()