Lines Matching +full:0 +full:x184
11 #define SDMMC_CLKSEL 0x09C
12 #define SDMMC_CLKSEL64 0x0A8
15 #define SDMMC_HS400_DQS_EN 0x180
16 #define SDMMC_HS400_ASYNC_FIFO_CTRL 0x184
17 #define SDMMC_HS400_DLINE_CTRL 0x188
20 #define SDMMC_CLKSEL_CCLK_SAMPLE(x) (((x) & 7) << 0)
23 #define SDMMC_CLKSEL_GET_DRV_WD3(x) (((x) >> 16) & 0x7)
24 #define SDMMC_CLKSEL_GET_DIV(x) (((x) >> 24) & 0x7)
30 #define SDMMC_CLKSEL_TIMING_MASK SDMMC_CLKSEL_TIMING(0x7, 0x7, 0x7)
34 #define DATA_STROBE_EN BIT(0)
38 #define DQS_CTRL_RD_DELAY(x, y) (((x) & ~0x3FF) | ((y) & 0x3FF))
39 #define DQS_CTRL_GET_RD_DELAY(x) ((x) & 0x3FF)
42 #define SDMMC_EMMCP_BASE 0x1000
43 #define SDMMC_MPSECURITY (SDMMC_EMMCP_BASE + 0x0010)
44 #define SDMMC_MPSBEGIN0 (SDMMC_EMMCP_BASE + 0x0200)
45 #define SDMMC_MPSEND0 (SDMMC_EMMCP_BASE + 0x0204)
46 #define SDMMC_MPSCTRL0 (SDMMC_EMMCP_BASE + 0x020C)
56 #define SDMMC_MPSCTRL_VALID BIT(0)
59 #define SDMMC_ENDING_SEC_NR_MAX 0xFFFFFFFF