Lines Matching refs:mc_readl
287 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_assert()
303 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_deassert()
319 value = mc_readl(mc, rst->control) & ~BIT(rst->bit); in tegra20_mc_block_dma()
330 return mc_readl(mc, rst->status) == 0; in tegra20_mc_dma_idling()
336 return (mc_readl(mc, rst->reset) & BIT(rst->bit)) == 0; in tegra20_mc_reset_status()
347 value = mc_readl(mc, rst->control) | BIT(rst->bit); in tegra20_mc_unblock_dma()
470 count0 = mc_readl(mc, MC_STAT_EMC_COUNT_0); in tegra20_mc_stat_gather()
471 count1 = mc_readl(mc, MC_STAT_EMC_COUNT_1); in tegra20_mc_stat_gather()
472 clocks = mc_readl(mc, MC_STAT_EMC_CLOCKS); in tegra20_mc_stat_gather()
724 status = mc_readl(mc, MC_INTSTATUS) & mc->soc->intmask; in tegra20_mc_handle_irq()
739 value = mc_readl(mc, reg); in tegra20_mc_handle_irq()
750 value = mc_readl(mc, reg); in tegra20_mc_handle_irq()
761 value = mc_readl(mc, reg); in tegra20_mc_handle_irq()
777 addr = mc_readl(mc, reg + sizeof(u32)); in tegra20_mc_handle_irq()