104 	if (mc->soc->ops && mc->soc->ops->probe_device)  in tegra_mc_probe_device()
105 		return mc->soc->ops->probe_device(mc, dev);  in tegra_mc_probe_device()
116 	if (id < 1 || id >= mc->soc->num_carveouts)  in tegra_mc_get_carveout_info()
197 	for (i = 0; i < mc->soc->num_resets; i++)  in tegra_mc_reset_find()
198 		if (mc->soc->resets[i].id == id)  in tegra_mc_reset_find()
199 			return &mc->soc->resets[i];  in tegra_mc_reset_find()
217 	rst_ops = mc->soc->reset_ops;  in tegra_mc_hotreset_assert()
276 	rst_ops = mc->soc->reset_ops;  in tegra_mc_hotreset_deassert()
314 	rst_ops = mc->soc->reset_ops;  in tegra_mc_hotreset_status()
335 	mc->reset.nr_resets = mc->soc->num_resets;  in tegra_mc_reset_setup()
362 	for (i = 0; i < mc->soc->num_emem_regs; ++i)  in tegra_mc_write_emem_configuration()
363 		mc_writel(mc, timing->emem_data[i], mc->soc->emem_regs[i]);  in tegra_mc_write_emem_configuration()
402 	for (i = 0; i < mc->soc->num_clients; i++) {  in tegra_mc_setup_latency_allowance()
403 		const struct tegra_mc_client *client = &mc->soc->clients[i];  in tegra_mc_setup_latency_allowance()
433 	timing->emem_data = devm_kcalloc(mc->dev, mc->soc->num_emem_regs,  in load_one_timing()
440 					 mc->soc->num_emem_regs);  in load_one_timing()
546 	if ((status & mc->soc->ch_intmask) == 0)  in mc_global_intstatus_to_channel()
549 	*mc_channel = __ffs((status & mc->soc->ch_intmask) >>  in mc_global_intstatus_to_channel()
550 			    mc->soc->global_intstatus_channel_shift);  in mc_global_intstatus_to_channel()
558 	return BIT(channel) << mc->soc->global_intstatus_channel_shift;  in mc_channel_to_global_intstatus()
567 	if (mc->soc->num_channels) {  in tegra30_mc_handle_irq()
580 		status = mc_ch_readl(mc, channel, MC_INTSTATUS) & mc->soc->intmask;  in tegra30_mc_handle_irq()
582 		status = mc_readl(mc, MC_INTSTATUS) & mc->soc->intmask;  in tegra30_mc_handle_irq()
634 			if (mc->soc->has_addr_hi_reg)  in tegra30_mc_handle_irq()
640 		if (mc->soc->num_channels)  in tegra30_mc_handle_irq()
646 		if (mc->soc->num_address_bits > 32) {  in tegra30_mc_handle_irq()
648 				if (mc->soc->num_channels)  in tegra30_mc_handle_irq()
670 		id = value & mc->soc->client_id_mask;  in tegra30_mc_handle_irq()
672 		for (i = 0; i < mc->soc->num_clients; i++) {  in tegra30_mc_handle_irq()
673 			if (mc->soc->clients[i].id == id) {  in tegra30_mc_handle_irq()
674 				client = mc->soc->clients[i].name;  in tegra30_mc_handle_irq()
712 		if (mc->soc->num_channels)  in tegra30_mc_handle_irq()
724 	if (mc->soc->num_channels) {  in tegra30_mc_handle_irq()
826 	    !mc->soc->icc_ops)  in tegra_mc_interconnect_setup()
831 	mc->provider.set = mc->soc->icc_ops->set;  in tegra_mc_interconnect_setup()
832 	mc->provider.aggregate = mc->soc->icc_ops->aggregate;  in tegra_mc_interconnect_setup()
833 	mc->provider.get_bw = mc->soc->icc_ops->get_bw;  in tegra_mc_interconnect_setup()
834 	mc->provider.xlate = mc->soc->icc_ops->xlate;  in tegra_mc_interconnect_setup()
835 	mc->provider.xlate_extended = mc->soc->icc_ops->xlate_extended;  in tegra_mc_interconnect_setup()
852 	for (i = 0; i < mc->soc->num_clients; i++) {  in tegra_mc_interconnect_setup()
854 		node = icc_node_create(mc->soc->clients[i].id);  in tegra_mc_interconnect_setup()
860 		node->name = mc->soc->clients[i].name;  in tegra_mc_interconnect_setup()
868 		node->data = (struct tegra_mc_client *)&(mc->soc->clients[i]);  in tegra_mc_interconnect_setup()
890 		mc->num_channels = mc->soc->num_channels;  in tegra_mc_num_channel_enabled()
912 	mc->soc = of_device_get_match_data(&pdev->dev);  in tegra_mc_probe()
915 	mask = DMA_BIT_MASK(mc->soc->num_address_bits);  in tegra_mc_probe()
932 	if (mc->soc->ops && mc->soc->ops->probe) {  in tegra_mc_probe()
933 		err = mc->soc->ops->probe(mc);  in tegra_mc_probe()
940 	if (mc->soc->ops && mc->soc->ops->handle_irq) {  in tegra_mc_probe()
945 		WARN(!mc->soc->client_id_mask, "missing client ID mask for this SoC\n");  in tegra_mc_probe()
947 		if (mc->soc->num_channels)  in tegra_mc_probe()
948 			mc_ch_writel(mc, MC_BROADCAST_CHANNEL, mc->soc->intmask,  in tegra_mc_probe()
951 			mc_writel(mc, mc->soc->intmask, MC_INTMASK);  in tegra_mc_probe()
953 		err = devm_request_irq(&pdev->dev, mc->irq, mc->soc->ops->handle_irq, 0,  in tegra_mc_probe()
962 	if (mc->soc->reset_ops) {  in tegra_mc_probe()
973 	if (IS_ENABLED(CONFIG_TEGRA_IOMMU_SMMU) && mc->soc->smmu) {  in tegra_mc_probe()
974 		mc->smmu = tegra_smmu_probe(&pdev->dev, mc->soc->smmu, mc);  in tegra_mc_probe()
982 	if (IS_ENABLED(CONFIG_TEGRA_IOMMU_GART) && !mc->soc->smmu) {  in tegra_mc_probe()
998 	if (mc->soc->ops && mc->soc->ops->suspend)  in tegra_mc_suspend()
999 		return mc->soc->ops->suspend(mc);  in tegra_mc_suspend()
1008 	if (mc->soc->ops && mc->soc->ops->resume)  in tegra_mc_resume()
1009 		return mc->soc->ops->resume(mc);  in tegra_mc_resume()