Lines Matching +full:over +full:- +full:sampling
1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <media/rc-core.h>
25 * Register to setting ok count whose unit based on hardware sampling period
61 /* Register to setting software sampling period */
63 /* Register to setting hardware sampling period */
99 * struct mtk_ir_data - This is the structure holding all differences among
106 * @hw_period: The value indicating the hardware sampling period
127 * struct mtk_ir - This is the main datasructure for holding the state
149 return ir->data->regs[MTK_CHKDATA_REG] + 4 * i; in mtk_chkdata_reg()
158 * unit of raw software sampling in mtk_chk_period()
160 val = DIV_ROUND_CLOSEST(clk_get_rate(ir->bus), in mtk_chk_period()
161 USEC_PER_SEC * ir->data->div / MTK_IR_SAMPLE); in mtk_chk_period()
163 dev_dbg(ir->dev, "@pwm clk = \t%lu\n", in mtk_chk_period()
164 clk_get_rate(ir->bus) / ir->data->div); in mtk_chk_period()
165 dev_dbg(ir->dev, "@chkperiod = %08x\n", val); in mtk_chk_period()
174 tmp = __raw_readl(ir->base + reg); in mtk_w32_mask()
176 __raw_writel(tmp, ir->base + reg); in mtk_w32_mask()
181 __raw_writel(val, ir->base + reg); in mtk_w32()
186 return __raw_readl(ir->base + reg); in mtk_r32()
193 val = mtk_r32(ir, ir->data->regs[MTK_IRINT_EN_REG]); in mtk_irq_disable()
194 mtk_w32(ir, val & ~mask, ir->data->regs[MTK_IRINT_EN_REG]); in mtk_irq_disable()
201 val = mtk_r32(ir, ir->data->regs[MTK_IRINT_EN_REG]); in mtk_irq_enable()
202 mtk_w32(ir, val | mask, ir->data->regs[MTK_IRINT_EN_REG]); in mtk_irq_enable()
229 dev_dbg(ir->dev, "@reg%d=0x%08x\n", i, val); in mtk_ir_irq()
236 ir_raw_event_store_with_filter(ir->rc, &rawir); in mtk_ir_irq()
243 * is over the limit, the last incomplete IR message would in mtk_ir_irq()
245 * ir-rc-raw to decode. That helps it is possible that it in mtk_ir_irq()
252 ir_raw_event_store_with_filter(ir->rc, &rawir); in mtk_ir_irq()
255 ir_raw_event_handle(ir->rc); in mtk_ir_irq()
261 mtk_w32_mask(ir, 0x1, MTK_IRCLR, ir->data->regs[MTK_IRCLR_REG]); in mtk_ir_irq()
265 ir->data->regs[MTK_IRINT_CLR_REG]); in mtk_ir_irq()
287 { .compatible = "mediatek,mt7623-cir", .data = &mt7623_data},
288 { .compatible = "mediatek,mt7622-cir", .data = &mt7622_data},
295 struct device *dev = &pdev->dev; in mtk_ir_probe()
296 struct device_node *dn = dev->of_node; in mtk_ir_probe()
304 return -ENOMEM; in mtk_ir_probe()
306 ir->dev = dev; in mtk_ir_probe()
307 ir->data = of_device_get_match_data(dev); in mtk_ir_probe()
309 ir->clk = devm_clk_get(dev, "clk"); in mtk_ir_probe()
310 if (IS_ERR(ir->clk)) { in mtk_ir_probe()
312 return PTR_ERR(ir->clk); in mtk_ir_probe()
315 ir->bus = devm_clk_get(dev, "bus"); in mtk_ir_probe()
316 if (IS_ERR(ir->bus)) { in mtk_ir_probe()
319 * ir->bus uses the same clock as ir->clock. in mtk_ir_probe()
321 ir->bus = ir->clk; in mtk_ir_probe()
324 ir->base = devm_platform_ioremap_resource(pdev, 0); in mtk_ir_probe()
325 if (IS_ERR(ir->base)) in mtk_ir_probe()
326 return PTR_ERR(ir->base); in mtk_ir_probe()
328 ir->rc = devm_rc_allocate_device(dev, RC_DRIVER_IR_RAW); in mtk_ir_probe()
329 if (!ir->rc) { in mtk_ir_probe()
331 return -ENOMEM; in mtk_ir_probe()
334 ir->rc->priv = ir; in mtk_ir_probe()
335 ir->rc->device_name = MTK_IR_DEV; in mtk_ir_probe()
336 ir->rc->input_phys = MTK_IR_DEV "/input0"; in mtk_ir_probe()
337 ir->rc->input_id.bustype = BUS_HOST; in mtk_ir_probe()
338 ir->rc->input_id.vendor = 0x0001; in mtk_ir_probe()
339 ir->rc->input_id.product = 0x0001; in mtk_ir_probe()
340 ir->rc->input_id.version = 0x0001; in mtk_ir_probe()
341 map_name = of_get_property(dn, "linux,rc-map-name", NULL); in mtk_ir_probe()
342 ir->rc->map_name = map_name ?: RC_MAP_EMPTY; in mtk_ir_probe()
343 ir->rc->dev.parent = dev; in mtk_ir_probe()
344 ir->rc->driver_name = MTK_IR_DEV; in mtk_ir_probe()
345 ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; in mtk_ir_probe()
346 ir->rc->rx_resolution = MTK_IR_SAMPLE; in mtk_ir_probe()
347 ir->rc->timeout = MTK_MAX_SAMPLES * (MTK_IR_SAMPLE + 1); in mtk_ir_probe()
349 ret = devm_rc_register_device(dev, ir->rc); in mtk_ir_probe()
357 ir->irq = platform_get_irq(pdev, 0); in mtk_ir_probe()
358 if (ir->irq < 0) in mtk_ir_probe()
359 return -ENODEV; in mtk_ir_probe()
361 if (clk_prepare_enable(ir->clk)) { in mtk_ir_probe()
363 return -EINVAL; in mtk_ir_probe()
366 if (clk_prepare_enable(ir->bus)) { in mtk_ir_probe()
368 ret = -EINVAL; in mtk_ir_probe()
378 ret = devm_request_irq(dev, ir->irq, mtk_ir_irq, 0, MTK_IR_DEV, ir); in mtk_ir_probe()
387 val = (mtk_chk_period(ir) << ir->data->fields[MTK_CHK_PERIOD].offset) & in mtk_ir_probe()
388 ir->data->fields[MTK_CHK_PERIOD].mask; in mtk_ir_probe()
389 mtk_w32_mask(ir, val, ir->data->fields[MTK_CHK_PERIOD].mask, in mtk_ir_probe()
390 ir->data->fields[MTK_CHK_PERIOD].reg); in mtk_ir_probe()
393 * Setup hardware sampling period used to setup the proper timeout for in mtk_ir_probe()
396 val = (ir->data->hw_period << ir->data->fields[MTK_HW_PERIOD].offset) & in mtk_ir_probe()
397 ir->data->fields[MTK_HW_PERIOD].mask; in mtk_ir_probe()
398 mtk_w32_mask(ir, val, ir->data->fields[MTK_HW_PERIOD].mask, in mtk_ir_probe()
399 ir->data->fields[MTK_HW_PERIOD].reg); in mtk_ir_probe()
401 /* Set de-glitch counter */ in mtk_ir_probe()
406 val |= MTK_OK_COUNT(ir->data->ok_count) | MTK_PWM_EN | MTK_IR_EN; in mtk_ir_probe()
417 clk_disable_unprepare(ir->bus); in mtk_ir_probe()
419 clk_disable_unprepare(ir->clk); in mtk_ir_probe()
434 synchronize_irq(ir->irq); in mtk_ir_remove()
436 clk_disable_unprepare(ir->bus); in mtk_ir_remove()
437 clk_disable_unprepare(ir->clk); in mtk_ir_remove()