Lines Matching +full:rk3288 +full:- +full:vpu
1 // SPDX-License-Identifier: GPL-2.0
3 * Hantro VPU codec driver
9 * Based on s5p-mfc driver by Samsung Electronics Co., Ltd.
22 #include <media/v4l2-event.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/videobuf2-core.h>
25 #include <media/videobuf2-vmalloc.h>
31 #define DRIVER_NAME "hantro-vpu"
36 "Debug level - higher value produces more verbose messages");
42 ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, id); in hantro_get_ctrl()
43 return ctrl ? ctrl->p_cur.p : NULL; in hantro_get_ctrl()
48 struct vb2_queue *q = v4l2_m2m_get_dst_vq(ctx->fh.m2m_ctx); in hantro_get_ref()
61 static void hantro_job_finish_no_pm(struct hantro_dev *vpu, in hantro_job_finish_no_pm() argument
67 src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); in hantro_job_finish_no_pm()
68 dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); in hantro_job_finish_no_pm()
75 src->sequence = ctx->sequence_out++; in hantro_job_finish_no_pm()
76 dst->sequence = ctx->sequence_cap++; in hantro_job_finish_no_pm()
78 if (v4l2_m2m_is_last_draining_src_buf(ctx->fh.m2m_ctx, src)) { in hantro_job_finish_no_pm()
79 dst->flags |= V4L2_BUF_FLAG_LAST; in hantro_job_finish_no_pm()
80 v4l2_event_queue_fh(&ctx->fh, &hantro_eos_event); in hantro_job_finish_no_pm()
81 v4l2_m2m_mark_stopped(ctx->fh.m2m_ctx); in hantro_job_finish_no_pm()
84 v4l2_m2m_buf_done_and_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx, in hantro_job_finish_no_pm()
88 static void hantro_job_finish(struct hantro_dev *vpu, in hantro_job_finish() argument
92 pm_runtime_mark_last_busy(vpu->dev); in hantro_job_finish()
93 pm_runtime_put_autosuspend(vpu->dev); in hantro_job_finish()
95 clk_bulk_disable(vpu->variant->num_clocks, vpu->clocks); in hantro_job_finish()
97 hantro_job_finish_no_pm(vpu, ctx, result); in hantro_job_finish()
100 void hantro_irq_done(struct hantro_dev *vpu, in hantro_irq_done() argument
104 v4l2_m2m_get_curr_priv(vpu->m2m_dev); in hantro_irq_done()
111 if (cancel_delayed_work(&vpu->watchdog_work)) { in hantro_irq_done()
112 if (result == VB2_BUF_STATE_DONE && ctx->codec_ops->done) in hantro_irq_done()
113 ctx->codec_ops->done(ctx); in hantro_irq_done()
114 hantro_job_finish(vpu, ctx, result); in hantro_irq_done()
120 struct hantro_dev *vpu; in hantro_watchdog() local
123 vpu = container_of(to_delayed_work(work), in hantro_watchdog()
125 ctx = v4l2_m2m_get_curr_priv(vpu->m2m_dev); in hantro_watchdog()
128 ctx->codec_ops->reset(ctx); in hantro_watchdog()
129 hantro_job_finish(vpu, ctx, VB2_BUF_STATE_ERROR); in hantro_watchdog()
138 v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req, in hantro_start_prepare_run()
139 &ctx->ctrl_handler); in hantro_start_prepare_run()
141 if (!ctx->is_encoder && !ctx->dev->variant->late_postproc) { in hantro_start_prepare_run()
142 if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) in hantro_start_prepare_run()
153 if (!ctx->is_encoder && ctx->dev->variant->late_postproc) { in hantro_end_prepare_run()
154 if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt)) in hantro_end_prepare_run()
161 v4l2_ctrl_request_complete(src_buf->vb2_buf.req_obj.req, in hantro_end_prepare_run()
162 &ctx->ctrl_handler); in hantro_end_prepare_run()
165 schedule_delayed_work(&ctx->dev->watchdog_work, in hantro_end_prepare_run()
178 ret = pm_runtime_resume_and_get(ctx->dev->dev); in device_run()
182 ret = clk_bulk_enable(ctx->dev->variant->num_clocks, ctx->dev->clocks); in device_run()
188 if (ctx->codec_ops->run(ctx)) in device_run()
194 hantro_job_finish_no_pm(ctx->dev, ctx, VB2_BUF_STATE_ERROR); in device_run()
207 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; in queue_init()
208 src_vq->io_modes = VB2_MMAP | VB2_DMABUF; in queue_init()
209 src_vq->drv_priv = ctx; in queue_init()
210 src_vq->ops = &hantro_queue_ops; in queue_init()
211 src_vq->mem_ops = &vb2_dma_contig_memops; in queue_init()
218 src_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES | in queue_init()
220 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer); in queue_init()
221 src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; in queue_init()
222 src_vq->lock = &ctx->dev->vpu_mutex; in queue_init()
223 src_vq->dev = ctx->dev->v4l2_dev.dev; in queue_init()
224 src_vq->supports_requests = true; in queue_init()
230 dst_vq->bidirectional = true; in queue_init()
231 dst_vq->mem_ops = &vb2_dma_contig_memops; in queue_init()
232 dst_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES; in queue_init()
237 if (!ctx->is_encoder) in queue_init()
238 dst_vq->dma_attrs |= DMA_ATTR_NO_KERNEL_MAPPING; in queue_init()
240 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; in queue_init()
241 dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; in queue_init()
242 dst_vq->drv_priv = ctx; in queue_init()
243 dst_vq->ops = &hantro_queue_ops; in queue_init()
244 dst_vq->buf_struct_size = sizeof(struct hantro_decoded_buffer); in queue_init()
245 dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; in queue_init()
246 dst_vq->lock = &ctx->dev->vpu_mutex; in queue_init()
247 dst_vq->dev = ctx->dev->v4l2_dev.dev; in queue_init()
254 if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) { in hantro_try_ctrl()
255 const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; in hantro_try_ctrl()
257 if (sps->chroma_format_idc > 1) in hantro_try_ctrl()
259 return -EINVAL; in hantro_try_ctrl()
260 if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) in hantro_try_ctrl()
262 return -EINVAL; in hantro_try_ctrl()
263 if (sps->bit_depth_luma_minus8 != 0) in hantro_try_ctrl()
264 /* Only 8-bit is supported */ in hantro_try_ctrl()
265 return -EINVAL; in hantro_try_ctrl()
266 } else if (ctrl->id == V4L2_CID_STATELESS_HEVC_SPS) { in hantro_try_ctrl()
267 const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; in hantro_try_ctrl()
269 if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) in hantro_try_ctrl()
270 /* Only 8-bit and 10-bit are supported */ in hantro_try_ctrl()
271 return -EINVAL; in hantro_try_ctrl()
272 } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) { in hantro_try_ctrl()
273 const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame; in hantro_try_ctrl()
276 if (dec_params->profile != 0) in hantro_try_ctrl()
277 return -EINVAL; in hantro_try_ctrl()
278 } else if (ctrl->id == V4L2_CID_STATELESS_AV1_SEQUENCE) { in hantro_try_ctrl()
279 const struct v4l2_ctrl_av1_sequence *sequence = ctrl->p_new.p_av1_sequence; in hantro_try_ctrl()
281 if (sequence->bit_depth != 8 && sequence->bit_depth != 10) in hantro_try_ctrl()
282 return -EINVAL; in hantro_try_ctrl()
292 ctx = container_of(ctrl->handler, in hantro_jpeg_s_ctrl()
295 vpu_debug(1, "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val); in hantro_jpeg_s_ctrl()
297 switch (ctrl->id) { in hantro_jpeg_s_ctrl()
299 ctx->jpeg_quality = ctrl->val; in hantro_jpeg_s_ctrl()
302 return -EINVAL; in hantro_jpeg_s_ctrl()
312 ctx = container_of(ctrl->handler, in hantro_vp9_s_ctrl()
315 switch (ctrl->id) { in hantro_vp9_s_ctrl()
317 int bit_depth = ctrl->p_new.p_vp9_frame->bit_depth; in hantro_vp9_s_ctrl()
319 if (ctx->bit_depth == bit_depth) in hantro_vp9_s_ctrl()
325 return -EINVAL; in hantro_vp9_s_ctrl()
335 ctx = container_of(ctrl->handler, in hantro_hevc_s_ctrl()
338 switch (ctrl->id) { in hantro_hevc_s_ctrl()
340 const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; in hantro_hevc_s_ctrl()
341 int bit_depth = sps->bit_depth_luma_minus8 + 8; in hantro_hevc_s_ctrl()
343 if (ctx->bit_depth == bit_depth) in hantro_hevc_s_ctrl()
349 return -EINVAL; in hantro_hevc_s_ctrl()
359 ctx = container_of(ctrl->handler, in hantro_av1_s_ctrl()
362 switch (ctrl->id) { in hantro_av1_s_ctrl()
365 int bit_depth = ctrl->p_new.p_av1_sequence->bit_depth; in hantro_av1_s_ctrl()
368 if (ctrl->p_new.p_av1_sequence->flags in hantro_av1_s_ctrl()
372 if (ctx->bit_depth == bit_depth && in hantro_av1_s_ctrl()
373 ctx->need_postproc == need_postproc) in hantro_av1_s_ctrl()
379 return -EINVAL; in hantro_av1_s_ctrl()
594 static int hantro_ctrls_setup(struct hantro_dev *vpu, in hantro_ctrls_setup() argument
600 v4l2_ctrl_handler_init(&ctx->ctrl_handler, num_ctrls); in hantro_ctrls_setup()
606 v4l2_ctrl_new_custom(&ctx->ctrl_handler, in hantro_ctrls_setup()
608 if (ctx->ctrl_handler.error) { in hantro_ctrls_setup()
611 ctx->ctrl_handler.error); in hantro_ctrls_setup()
612 v4l2_ctrl_handler_free(&ctx->ctrl_handler); in hantro_ctrls_setup()
613 return ctx->ctrl_handler.error; in hantro_ctrls_setup()
616 return v4l2_ctrl_handler_setup(&ctx->ctrl_handler); in hantro_ctrls_setup()
625 struct hantro_dev *vpu = video_drvdata(filp); in hantro_open() local
636 * as vdev and ctx->fh), which have proper locking done in respective in hantro_open()
642 return -ENOMEM; in hantro_open()
644 ctx->dev = vpu; in hantro_open()
645 if (func->id == MEDIA_ENT_F_PROC_VIDEO_ENCODER) { in hantro_open()
646 allowed_codecs = vpu->variant->codec & HANTRO_ENCODERS; in hantro_open()
647 ctx->is_encoder = true; in hantro_open()
648 } else if (func->id == MEDIA_ENT_F_PROC_VIDEO_DECODER) { in hantro_open()
649 allowed_codecs = vpu->variant->codec & HANTRO_DECODERS; in hantro_open()
650 ctx->is_encoder = false; in hantro_open()
652 ret = -ENODEV; in hantro_open()
656 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(vpu->m2m_dev, ctx, queue_init); in hantro_open()
657 if (IS_ERR(ctx->fh.m2m_ctx)) { in hantro_open()
658 ret = PTR_ERR(ctx->fh.m2m_ctx); in hantro_open()
662 v4l2_fh_init(&ctx->fh, vdev); in hantro_open()
663 filp->private_data = &ctx->fh; in hantro_open()
664 v4l2_fh_add(&ctx->fh); in hantro_open()
668 ret = hantro_ctrls_setup(vpu, ctx, allowed_codecs); in hantro_open()
673 ctx->fh.ctrl_handler = &ctx->ctrl_handler; in hantro_open()
678 v4l2_fh_del(&ctx->fh); in hantro_open()
679 v4l2_fh_exit(&ctx->fh); in hantro_open()
688 container_of(filp->private_data, struct hantro_ctx, fh); in hantro_release()
694 v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); in hantro_release()
695 v4l2_fh_del(&ctx->fh); in hantro_release()
696 v4l2_fh_exit(&ctx->fh); in hantro_release()
697 v4l2_ctrl_handler_free(&ctx->ctrl_handler); in hantro_release()
714 { .compatible = "rockchip,px30-vpu", .data = &px30_vpu_variant, },
715 { .compatible = "rockchip,rk3036-vpu", .data = &rk3036_vpu_variant, },
716 { .compatible = "rockchip,rk3066-vpu", .data = &rk3066_vpu_variant, },
717 { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
718 { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
719 { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
720 { .compatible = "rockchip,rk3568-vepu", .data = &rk3568_vepu_variant, },
721 { .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, },
722 { .compatible = "rockchip,rk3588-av1-vpu", .data = &rk3588_vpu981_variant, },
725 { .compatible = "nxp,imx8mm-vpu-g1", .data = &imx8mm_vpu_g1_variant, },
726 { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
727 { .compatible = "nxp,imx8mq-vpu-g1", .data = &imx8mq_vpu_g1_variant },
728 { .compatible = "nxp,imx8mq-vpu-g2", .data = &imx8mq_vpu_g2_variant },
731 { .compatible = "microchip,sama5d4-vdec", .data = &sama5d4_vdec_variant, },
734 { .compatible = "allwinner,sun50i-h6-vpu-g2", .data = &sunxi_vpu_variant, },
749 entity->obj_type = MEDIA_ENTITY_TYPE_BASE; in hantro_register_entity()
751 entity->info.dev.major = VIDEO_MAJOR; in hantro_register_entity()
752 entity->info.dev.minor = vdev->minor; in hantro_register_entity()
755 name = devm_kasprintf(mdev->dev, GFP_KERNEL, "%s-%s", vdev->name, in hantro_register_entity()
758 return -ENOMEM; in hantro_register_entity()
760 entity->name = name; in hantro_register_entity()
761 entity->function = function; in hantro_register_entity()
774 static int hantro_attach_func(struct hantro_dev *vpu, in hantro_attach_func() argument
777 struct media_device *mdev = &vpu->mdev; in hantro_attach_func()
782 func->source_pad.flags = MEDIA_PAD_FL_SOURCE; in hantro_attach_func()
783 ret = hantro_register_entity(mdev, &func->vdev.entity, "source", in hantro_attach_func()
784 &func->source_pad, 1, MEDIA_ENT_F_IO_V4L, in hantro_attach_func()
785 &func->vdev); in hantro_attach_func()
789 func->proc_pads[0].flags = MEDIA_PAD_FL_SINK; in hantro_attach_func()
790 func->proc_pads[1].flags = MEDIA_PAD_FL_SOURCE; in hantro_attach_func()
791 ret = hantro_register_entity(mdev, &func->proc, "proc", in hantro_attach_func()
792 func->proc_pads, 2, func->id, in hantro_attach_func()
793 &func->vdev); in hantro_attach_func()
797 func->sink_pad.flags = MEDIA_PAD_FL_SINK; in hantro_attach_func()
798 ret = hantro_register_entity(mdev, &func->sink, "sink", in hantro_attach_func()
799 &func->sink_pad, 1, MEDIA_ENT_F_IO_V4L, in hantro_attach_func()
800 &func->vdev); in hantro_attach_func()
805 ret = media_create_pad_link(&func->vdev.entity, 0, &func->proc, 0, in hantro_attach_func()
811 ret = media_create_pad_link(&func->proc, 1, &func->sink, 0, in hantro_attach_func()
818 func->intf_devnode = media_devnode_create(mdev, MEDIA_INTF_T_V4L_VIDEO, in hantro_attach_func()
820 func->vdev.minor); in hantro_attach_func()
821 if (!func->intf_devnode) { in hantro_attach_func()
822 ret = -ENOMEM; in hantro_attach_func()
827 link = media_create_intf_link(&func->vdev.entity, in hantro_attach_func()
828 &func->intf_devnode->intf, in hantro_attach_func()
832 ret = -ENOMEM; in hantro_attach_func()
836 link = media_create_intf_link(&func->sink, &func->intf_devnode->intf, in hantro_attach_func()
840 ret = -ENOMEM; in hantro_attach_func()
846 media_devnode_remove(func->intf_devnode); in hantro_attach_func()
849 media_entity_remove_links(&func->sink); in hantro_attach_func()
852 media_entity_remove_links(&func->proc); in hantro_attach_func()
853 media_entity_remove_links(&func->vdev.entity); in hantro_attach_func()
856 media_device_unregister_entity(&func->sink); in hantro_attach_func()
859 media_device_unregister_entity(&func->proc); in hantro_attach_func()
862 media_device_unregister_entity(&func->vdev.entity); in hantro_attach_func()
868 media_devnode_remove(func->intf_devnode); in hantro_detach_func()
869 media_entity_remove_links(&func->sink); in hantro_detach_func()
870 media_entity_remove_links(&func->proc); in hantro_detach_func()
871 media_entity_remove_links(&func->vdev.entity); in hantro_detach_func()
872 media_device_unregister_entity(&func->sink); in hantro_detach_func()
873 media_device_unregister_entity(&func->proc); in hantro_detach_func()
874 media_device_unregister_entity(&func->vdev.entity); in hantro_detach_func()
877 static int hantro_add_func(struct hantro_dev *vpu, unsigned int funcid) in hantro_add_func() argument
884 match = of_match_node(of_hantro_match, vpu->dev->of_node); in hantro_add_func()
885 func = devm_kzalloc(vpu->dev, sizeof(*func), GFP_KERNEL); in hantro_add_func()
887 v4l2_err(&vpu->v4l2_dev, "Failed to allocate video device\n"); in hantro_add_func()
888 return -ENOMEM; in hantro_add_func()
891 func->id = funcid; in hantro_add_func()
893 vfd = &func->vdev; in hantro_add_func()
894 vfd->fops = &hantro_fops; in hantro_add_func()
895 vfd->release = video_device_release_empty; in hantro_add_func()
896 vfd->lock = &vpu->vpu_mutex; in hantro_add_func()
897 vfd->v4l2_dev = &vpu->v4l2_dev; in hantro_add_func()
898 vfd->vfl_dir = VFL_DIR_M2M; in hantro_add_func()
899 vfd->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_M2M_MPLANE; in hantro_add_func()
900 vfd->ioctl_ops = &hantro_ioctl_ops; in hantro_add_func()
901 snprintf(vfd->name, sizeof(vfd->name), "%s-%s", match->compatible, in hantro_add_func()
905 vpu->encoder = func; in hantro_add_func()
907 vpu->decoder = func; in hantro_add_func()
912 video_set_drvdata(vfd, vpu); in hantro_add_func()
914 ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1); in hantro_add_func()
916 v4l2_err(&vpu->v4l2_dev, "Failed to register video device\n"); in hantro_add_func()
920 ret = hantro_attach_func(vpu, func); in hantro_add_func()
922 v4l2_err(&vpu->v4l2_dev, in hantro_add_func()
927 v4l2_info(&vpu->v4l2_dev, "registered %s as /dev/video%d\n", vfd->name, in hantro_add_func()
928 vfd->num); in hantro_add_func()
937 static int hantro_add_enc_func(struct hantro_dev *vpu) in hantro_add_enc_func() argument
939 if (!vpu->variant->enc_fmts) in hantro_add_enc_func()
942 return hantro_add_func(vpu, MEDIA_ENT_F_PROC_VIDEO_ENCODER); in hantro_add_enc_func()
945 static int hantro_add_dec_func(struct hantro_dev *vpu) in hantro_add_dec_func() argument
947 if (!vpu->variant->dec_fmts) in hantro_add_dec_func()
950 return hantro_add_func(vpu, MEDIA_ENT_F_PROC_VIDEO_DECODER); in hantro_add_dec_func()
953 static void hantro_remove_func(struct hantro_dev *vpu, in hantro_remove_func() argument
959 func = vpu->encoder; in hantro_remove_func()
961 func = vpu->decoder; in hantro_remove_func()
967 video_unregister_device(&func->vdev); in hantro_remove_func()
970 static void hantro_remove_enc_func(struct hantro_dev *vpu) in hantro_remove_enc_func() argument
972 hantro_remove_func(vpu, MEDIA_ENT_F_PROC_VIDEO_ENCODER); in hantro_remove_enc_func()
975 static void hantro_remove_dec_func(struct hantro_dev *vpu) in hantro_remove_dec_func() argument
977 hantro_remove_func(vpu, MEDIA_ENT_F_PROC_VIDEO_DECODER); in hantro_remove_dec_func()
988 struct hantro_dev *vpu; in hantro_probe() local
992 vpu = devm_kzalloc(&pdev->dev, sizeof(*vpu), GFP_KERNEL); in hantro_probe()
993 if (!vpu) in hantro_probe()
994 return -ENOMEM; in hantro_probe()
996 vpu->dev = &pdev->dev; in hantro_probe()
997 vpu->pdev = pdev; in hantro_probe()
998 mutex_init(&vpu->vpu_mutex); in hantro_probe()
999 spin_lock_init(&vpu->irqlock); in hantro_probe()
1001 match = of_match_node(of_hantro_match, pdev->dev.of_node); in hantro_probe()
1002 vpu->variant = match->data; in hantro_probe()
1005 * Support for nxp,imx8mq-vpu is kept for backwards compatibility in hantro_probe()
1007 * nxp,imx8mq-vpu-g1 or nxp,imx8mq-vpu-g2 instead. in hantro_probe()
1009 if (of_device_is_compatible(pdev->dev.of_node, "nxp,imx8mq-vpu")) in hantro_probe()
1010 dev_warn(&pdev->dev, "%s compatible is deprecated\n", in hantro_probe()
1011 match->compatible); in hantro_probe()
1013 INIT_DELAYED_WORK(&vpu->watchdog_work, hantro_watchdog); in hantro_probe()
1015 vpu->clocks = devm_kcalloc(&pdev->dev, vpu->variant->num_clocks, in hantro_probe()
1016 sizeof(*vpu->clocks), GFP_KERNEL); in hantro_probe()
1017 if (!vpu->clocks) in hantro_probe()
1018 return -ENOMEM; in hantro_probe()
1020 if (vpu->variant->num_clocks > 1) { in hantro_probe()
1021 for (i = 0; i < vpu->variant->num_clocks; i++) in hantro_probe()
1022 vpu->clocks[i].id = vpu->variant->clk_names[i]; in hantro_probe()
1024 ret = devm_clk_bulk_get(&pdev->dev, vpu->variant->num_clocks, in hantro_probe()
1025 vpu->clocks); in hantro_probe()
1033 vpu->clocks[0].clk = devm_clk_get(&pdev->dev, NULL); in hantro_probe()
1034 if (IS_ERR(vpu->clocks[0].clk)) in hantro_probe()
1035 return PTR_ERR(vpu->clocks[0].clk); in hantro_probe()
1038 vpu->resets = devm_reset_control_array_get_optional_exclusive(&pdev->dev); in hantro_probe()
1039 if (IS_ERR(vpu->resets)) in hantro_probe()
1040 return PTR_ERR(vpu->resets); in hantro_probe()
1042 num_bases = vpu->variant->num_regs ?: 1; in hantro_probe()
1043 vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases, in hantro_probe()
1044 sizeof(*vpu->reg_bases), GFP_KERNEL); in hantro_probe()
1045 if (!vpu->reg_bases) in hantro_probe()
1046 return -ENOMEM; in hantro_probe()
1049 vpu->reg_bases[i] = vpu->variant->reg_names ? in hantro_probe()
1050 devm_platform_ioremap_resource_byname(pdev, vpu->variant->reg_names[i]) : in hantro_probe()
1052 if (IS_ERR(vpu->reg_bases[i])) in hantro_probe()
1053 return PTR_ERR(vpu->reg_bases[i]); in hantro_probe()
1055 vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset; in hantro_probe()
1056 vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset; in hantro_probe()
1059 * TODO: Eventually allow taking advantage of full 64-bit address space. in hantro_probe()
1063 ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32)); in hantro_probe()
1065 dev_err(vpu->dev, "Could not set DMA coherent mask.\n"); in hantro_probe()
1068 vb2_dma_contig_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); in hantro_probe()
1070 for (i = 0; i < vpu->variant->num_irqs; i++) { in hantro_probe()
1074 if (!vpu->variant->irqs[i].handler) in hantro_probe()
1077 if (vpu->variant->num_irqs > 1) { in hantro_probe()
1078 irq_name = vpu->variant->irqs[i].name; in hantro_probe()
1079 irq = platform_get_irq_byname(vpu->pdev, irq_name); in hantro_probe()
1086 irq = platform_get_irq(vpu->pdev, 0); in hantro_probe()
1091 ret = devm_request_irq(vpu->dev, irq, in hantro_probe()
1092 vpu->variant->irqs[i].handler, 0, in hantro_probe()
1093 dev_name(vpu->dev), vpu); in hantro_probe()
1095 dev_err(vpu->dev, "Could not request %s IRQ.\n", in hantro_probe()
1101 if (vpu->variant->init) { in hantro_probe()
1102 ret = vpu->variant->init(vpu); in hantro_probe()
1104 dev_err(&pdev->dev, "Failed to init VPU hardware\n"); in hantro_probe()
1109 pm_runtime_set_autosuspend_delay(vpu->dev, 100); in hantro_probe()
1110 pm_runtime_use_autosuspend(vpu->dev); in hantro_probe()
1111 pm_runtime_enable(vpu->dev); in hantro_probe()
1113 ret = reset_control_deassert(vpu->resets); in hantro_probe()
1115 dev_err(&pdev->dev, "Failed to deassert resets\n"); in hantro_probe()
1119 ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks); in hantro_probe()
1121 dev_err(&pdev->dev, "Failed to prepare clocks\n"); in hantro_probe()
1125 ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev); in hantro_probe()
1127 dev_err(&pdev->dev, "Failed to register v4l2 device\n"); in hantro_probe()
1130 platform_set_drvdata(pdev, vpu); in hantro_probe()
1132 vpu->m2m_dev = v4l2_m2m_init(&vpu_m2m_ops); in hantro_probe()
1133 if (IS_ERR(vpu->m2m_dev)) { in hantro_probe()
1134 v4l2_err(&vpu->v4l2_dev, "Failed to init mem2mem device\n"); in hantro_probe()
1135 ret = PTR_ERR(vpu->m2m_dev); in hantro_probe()
1139 vpu->mdev.dev = vpu->dev; in hantro_probe()
1140 strscpy(vpu->mdev.model, DRIVER_NAME, sizeof(vpu->mdev.model)); in hantro_probe()
1141 media_device_init(&vpu->mdev); in hantro_probe()
1142 vpu->mdev.ops = &hantro_m2m_media_ops; in hantro_probe()
1143 vpu->v4l2_dev.mdev = &vpu->mdev; in hantro_probe()
1145 ret = hantro_add_enc_func(vpu); in hantro_probe()
1147 dev_err(&pdev->dev, "Failed to register encoder\n"); in hantro_probe()
1151 ret = hantro_add_dec_func(vpu); in hantro_probe()
1153 dev_err(&pdev->dev, "Failed to register decoder\n"); in hantro_probe()
1157 ret = media_device_register(&vpu->mdev); in hantro_probe()
1159 v4l2_err(&vpu->v4l2_dev, "Failed to register mem2mem media device\n"); in hantro_probe()
1166 hantro_remove_dec_func(vpu); in hantro_probe()
1168 hantro_remove_enc_func(vpu); in hantro_probe()
1170 media_device_cleanup(&vpu->mdev); in hantro_probe()
1171 v4l2_m2m_release(vpu->m2m_dev); in hantro_probe()
1173 v4l2_device_unregister(&vpu->v4l2_dev); in hantro_probe()
1175 clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); in hantro_probe()
1177 reset_control_assert(vpu->resets); in hantro_probe()
1179 pm_runtime_dont_use_autosuspend(vpu->dev); in hantro_probe()
1180 pm_runtime_disable(vpu->dev); in hantro_probe()
1186 struct hantro_dev *vpu = platform_get_drvdata(pdev); in hantro_remove() local
1188 v4l2_info(&vpu->v4l2_dev, "Removing %s\n", pdev->name); in hantro_remove()
1190 media_device_unregister(&vpu->mdev); in hantro_remove()
1191 hantro_remove_dec_func(vpu); in hantro_remove()
1192 hantro_remove_enc_func(vpu); in hantro_remove()
1193 media_device_cleanup(&vpu->mdev); in hantro_remove()
1194 v4l2_m2m_release(vpu->m2m_dev); in hantro_remove()
1195 v4l2_device_unregister(&vpu->v4l2_dev); in hantro_remove()
1196 clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks); in hantro_remove()
1197 reset_control_assert(vpu->resets); in hantro_remove()
1198 pm_runtime_dont_use_autosuspend(vpu->dev); in hantro_remove()
1199 pm_runtime_disable(vpu->dev); in hantro_remove()
1205 struct hantro_dev *vpu = dev_get_drvdata(dev); in hantro_runtime_resume() local
1207 if (vpu->variant->runtime_resume) in hantro_runtime_resume()
1208 return vpu->variant->runtime_resume(vpu); in hantro_runtime_resume()
1232 MODULE_AUTHOR("Alpha Lin <Alpha.Lin@Rock-Chips.com>");
1235 MODULE_DESCRIPTION("Hantro VPU codec driver");