15 #define HI847_REG_VALUE_16BIT		2  macro
2256 				      HI847_REG_VALUE_16BIT,  in hi847_write_reg_list()
2274 			      HI847_REG_VALUE_16BIT, d_gain);  in hi847_update_digital_gain()
2279 			      HI847_REG_VALUE_16BIT, d_gain);  in hi847_update_digital_gain()
2284 			      HI847_REG_VALUE_16BIT, d_gain);  in hi847_update_digital_gain()
2289 			       HI847_REG_VALUE_16BIT, d_gain);  in hi847_update_digital_gain()
2299 				     HI847_REG_VALUE_16BIT, &val);  in hi847_test_pattern()
2304 				      HI847_REG_VALUE_16BIT,  in hi847_test_pattern()
2311 			     HI847_REG_VALUE_16BIT, &val);  in hi847_test_pattern()
2316 			       HI847_REG_VALUE_16BIT, val | pattern << 8);  in hi847_test_pattern()
2351 				      HI847_REG_VALUE_16BIT,  in hi847_grbg_shift()
2357 				       HI847_REG_VALUE_16BIT,  in hi847_grbg_shift()
2361 				      HI847_REG_VALUE_16BIT,  in hi847_grbg_shift()
2367 				       HI847_REG_VALUE_16BIT,  in hi847_grbg_shift()
2378 			     HI847_REG_VALUE_16BIT, &val);  in hi847_set_ctrl_hflip()
2387 			       HI847_REG_VALUE_16BIT,  in hi847_set_ctrl_hflip()
2397 			     HI847_REG_VALUE_16BIT, &val);  in hi847_set_ctrl_vflip()
2406 			       HI847_REG_VALUE_16BIT,  in hi847_set_ctrl_vflip()
2436 				      HI847_REG_VALUE_16BIT, ctrl->val);  in hi847_set_ctrl()
2445 				      HI847_REG_VALUE_16BIT, ctrl->val);  in hi847_set_ctrl()
2451 				      HI847_REG_VALUE_16BIT,  in hi847_set_ctrl()
2587 			      HI847_REG_VALUE_16BIT, HI847_REG_MODE_TG_ENABLE);  in hi847_start_streaming()
2590 			      HI847_REG_VALUE_16BIT, HI847_MODE_STREAMING);  in hi847_start_streaming()
2605 			    HI847_REG_VALUE_16BIT, HI847_REG_MODE_TG_DISABLE))  in hi847_stop_streaming()
2610 			    HI847_REG_VALUE_16BIT, HI847_MODE_STANDBY))  in hi847_stop_streaming()
2825 			     HI847_REG_VALUE_16BIT, &val);  in hi847_identify_module()