86 static inline int itd1000_write_reg(struct itd1000_state *state, u8 r, u8 v)  in itd1000_write_reg()  function
128 	itd1000_write_reg(state, CON1, con1 | (1 << 1));  in itd1000_set_lpf_bw()
133 			itd1000_write_reg(state, PLLFH,   pllfh | (itd1000_lpf_pga[i].pgaext << 4));  in itd1000_set_lpf_bw()
134 			itd1000_write_reg(state, BBGVMIN, bbgvmin | (itd1000_lpf_pga[i].bbgvmin));  in itd1000_set_lpf_bw()
135 			itd1000_write_reg(state, BW,      bw | (i & 0x0f));  in itd1000_set_lpf_bw()
139 	itd1000_write_reg(state, CON1, con1 | (0 << 1));  in itd1000_set_lpf_bw()
171 	itd1000_write_reg(state, GVBB_I2C, gvbb_i2c | (1 << 6));  in itd1000_set_vco()
175 			itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | (itd1000_vcorg[i].vcorg << 4));  in itd1000_set_vco()
184 					itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | ((itd1000_vcorg[i].vcorg + 1) << 4));  in itd1000_set_vco()
187 					itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | ((itd1000_vcorg[i].vcorg - 1) << 4));  in itd1000_set_vco()
232 	itd1000_write_reg(state, PLLNH, 0x80); /* PLLNH */  in itd1000_set_lo()
233 	itd1000_write_reg(state, PLLNL, plln & 0xff);  in itd1000_set_lo()
234 	itd1000_write_reg(state, PLLFH, (itd1000_read_reg(state, PLLFH) & 0xf0) | ((pllf >> 16) & 0x0f));  in itd1000_set_lo()
235 	itd1000_write_reg(state, PLLFM, (pllf >> 8) & 0xff);  in itd1000_set_lo()
236 	itd1000_write_reg(state, PLLFL, (pllf >> 0) & 0xff);  in itd1000_set_lo()
241 			itd1000_write_reg(state, RFTR, itd1000_fre_values[i].values[0]);  in itd1000_set_lo()
243 				itd1000_write_reg(state, RFST1+j, itd1000_fre_values[i].values[j+1]);  in itd1000_set_lo()
261 	itd1000_write_reg(state, PLLCON1, pllcon1 | (1 << 7));  in itd1000_set_parameters()
262 	itd1000_write_reg(state, PLLCON1, pllcon1);  in itd1000_set_parameters()
325 		itd1000_write_reg(state, itd1000_init_tab[i][0], itd1000_init_tab[i][1]);  in itd1000_init()
328 		itd1000_write_reg(state, itd1000_reinit_tab[i][0], itd1000_reinit_tab[i][1]);  in itd1000_init()