Lines Matching refs:write16
362 static int write16(struct drxk_state *state, u32 reg, u16 data) in write16() function
477 status = write16(state, SIO_CC_PWD_MODE__A, SIO_CC_PWD_MODE_LEVEL_NONE); in power_up_device()
480 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_up_device()
484 status = write16(state, SIO_CC_PLL_LOCK__A, 1); in power_up_device()
742 status = write16(state, SCU_RAM_GPIO__A, in drxx_open()
750 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in drxx_open()
759 status = write16(state, SIO_TOP_COMM_KEY__A, key); in drxx_open()
777 status = write16(state, SCU_RAM_GPIO__A, in get_device_capabilities()
781 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in get_device_capabilities()
787 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in get_device_capabilities()
974 status = write16(state, SIO_HI_RA_RAM_CMD__A, cmd); in hi_command()
1015 status = write16(state, SIO_HI_RA_RAM_PAR_6__A, in hi_cfg_command()
1019 status = write16(state, SIO_HI_RA_RAM_PAR_5__A, in hi_cfg_command()
1023 status = write16(state, SIO_HI_RA_RAM_PAR_4__A, in hi_cfg_command()
1027 status = write16(state, SIO_HI_RA_RAM_PAR_3__A, in hi_cfg_command()
1031 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in hi_cfg_command()
1035 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in hi_cfg_command()
1075 status = write16(state, SCU_RAM_GPIO__A, in mpegts_configure_pins()
1081 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in mpegts_configure_pins()
1087 status = write16(state, SIO_PDR_MSTRT_CFG__A, 0x0000); in mpegts_configure_pins()
1090 status = write16(state, SIO_PDR_MERR_CFG__A, 0x0000); in mpegts_configure_pins()
1093 status = write16(state, SIO_PDR_MCLK_CFG__A, 0x0000); in mpegts_configure_pins()
1096 status = write16(state, SIO_PDR_MVAL_CFG__A, 0x0000); in mpegts_configure_pins()
1099 status = write16(state, SIO_PDR_MD0_CFG__A, 0x0000); in mpegts_configure_pins()
1102 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1105 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1108 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1111 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1114 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1117 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1120 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1132 status = write16(state, SIO_PDR_MSTRT_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1139 status = write16(state, SIO_PDR_MERR_CFG__A, err_cfg); in mpegts_configure_pins()
1142 status = write16(state, SIO_PDR_MVAL_CFG__A, err_cfg); in mpegts_configure_pins()
1148 status = write16(state, SIO_PDR_MD1_CFG__A, in mpegts_configure_pins()
1152 status = write16(state, SIO_PDR_MD2_CFG__A, in mpegts_configure_pins()
1156 status = write16(state, SIO_PDR_MD3_CFG__A, in mpegts_configure_pins()
1160 status = write16(state, SIO_PDR_MD4_CFG__A, in mpegts_configure_pins()
1164 status = write16(state, SIO_PDR_MD5_CFG__A, in mpegts_configure_pins()
1168 status = write16(state, SIO_PDR_MD6_CFG__A, in mpegts_configure_pins()
1172 status = write16(state, SIO_PDR_MD7_CFG__A, in mpegts_configure_pins()
1181 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1184 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1187 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1190 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1193 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1196 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1199 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1203 status = write16(state, SIO_PDR_MCLK_CFG__A, sio_pdr_mclk_cfg); in mpegts_configure_pins()
1206 status = write16(state, SIO_PDR_MD0_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1211 status = write16(state, SIO_PDR_MON_CFG__A, 0x0000); in mpegts_configure_pins()
1215 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in mpegts_configure_pins()
1238 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_CHAIN); in bl_chain_cmd()
1241 status = write16(state, SIO_BL_CHAIN_ADDR__A, rom_offset); in bl_chain_cmd()
1244 status = write16(state, SIO_BL_CHAIN_LEN__A, nr_of_elements); in bl_chain_cmd()
1247 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_chain_cmd()
1359 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, desired_ctrl); in dvbt_enable_ofdm_token_ring()
1389 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_stop()
1398 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode); in mpegts_stop()
1533 status = write16(state, IQM_AF_STDBY__A, data); in set_iqm_af()
1623 status = write16(state, SIO_CC_PWD_MODE__A, sio_cc_pwd_mode); in ctrl_power_mode()
1626 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in ctrl_power_mode()
1677 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in power_down_dvbt()
1680 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in power_down_dvbt()
1683 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in power_down_dvbt()
1717 status = write16(state, SCU_RAM_GPIO__A, in setoperation_mode()
1887 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_start()
1890 status = write16(state, FEC_OC_SNC_UNLOCK__A, 1); in mpegts_start()
1904 status = write16(state, FEC_OC_RCN_CTL_STEP_LO__A, 0x0000); in mpegts_dto_init()
1907 status = write16(state, FEC_OC_RCN_CTL_STEP_HI__A, 0x000C); in mpegts_dto_init()
1910 status = write16(state, FEC_OC_RCN_GAIN__A, 0x000A); in mpegts_dto_init()
1913 status = write16(state, FEC_OC_AVR_PARM_A__A, 0x0008); in mpegts_dto_init()
1916 status = write16(state, FEC_OC_AVR_PARM_B__A, 0x0006); in mpegts_dto_init()
1919 status = write16(state, FEC_OC_TMD_HI_MARGIN__A, 0x0680); in mpegts_dto_init()
1922 status = write16(state, FEC_OC_TMD_LO_MARGIN__A, 0x0080); in mpegts_dto_init()
1925 status = write16(state, FEC_OC_TMD_COUNT__A, 0x03F4); in mpegts_dto_init()
1930 status = write16(state, FEC_OC_OCR_INVERT__A, 0); in mpegts_dto_init()
1933 status = write16(state, FEC_OC_SNC_LWM__A, 2); in mpegts_dto_init()
1936 status = write16(state, FEC_OC_SNC_HWM__A, 12); in mpegts_dto_init()
2047 status = write16(state, FEC_OC_DTO_BURST_LEN__A, fec_oc_dto_burst_len); in mpegts_dto_setup()
2050 status = write16(state, FEC_OC_DTO_PERIOD__A, fec_oc_dto_period); in mpegts_dto_setup()
2053 status = write16(state, FEC_OC_DTO_MODE__A, fec_oc_dto_mode); in mpegts_dto_setup()
2056 status = write16(state, FEC_OC_FCT_MODE__A, fec_oc_fct_mode); in mpegts_dto_setup()
2059 status = write16(state, FEC_OC_MODE__A, fec_oc_reg_mode); in mpegts_dto_setup()
2062 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_reg_ipr_mode); in mpegts_dto_setup()
2070 status = write16(state, FEC_OC_TMD_INT_UPD_RATE__A, in mpegts_dto_setup()
2074 status = write16(state, FEC_OC_TMD_MODE__A, fec_oc_tmd_mode); in mpegts_dto_setup()
2111 return write16(state, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert); in mpegts_configure_polarity()
2135 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2150 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2164 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_rf()
2181 status = write16(state, in set_agc_rf()
2189 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, in set_agc_rf()
2195 status = write16(state, SCU_RAM_AGC_RF_MAX__A, in set_agc_rf()
2208 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2221 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2226 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, 0); in set_agc_rf()
2231 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, in set_agc_rf()
2243 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2252 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2286 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2302 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2315 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_if()
2326 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2339 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2355 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2360 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2373 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2382 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2390 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, p_agc_cfg->top); in set_agc_if()
2726 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in ConfigureI2CBridge()
2731 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2736 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2761 status = write16(state, IQM_AF_PDREF__A, p_pre_saw_cfg->reference); in set_pre_saw()
2780 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_DIRECT); in bl_direct_cmd()
2783 status = write16(state, SIO_BL_TGT_HDR__A, blockbank); in bl_direct_cmd()
2786 status = write16(state, SIO_BL_TGT_ADDR__A, offset); in bl_direct_cmd()
2789 status = write16(state, SIO_BL_SRC_ADDR__A, rom_offset); in bl_direct_cmd()
2792 status = write16(state, SIO_BL_SRC_LEN__A, nr_of_elements); in bl_direct_cmd()
2795 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_direct_cmd()
2827 status = write16(state, IQM_AF_COMM_EXEC__A, IQM_AF_COMM_EXEC_ACTIVE); in adc_sync_measurement()
2830 status = write16(state, IQM_AF_START_LOCK__A, 1); in adc_sync_measurement()
2885 status = write16(state, IQM_AF_CLKNEG__A, clk_neg); in adc_synchronization()
3019 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in init_agc()
3024 status = write16(state, SCU_RAM_AGC_CLP_CTRL_MODE__A, clp_ctrl_mode); in init_agc()
3027 status = write16(state, SCU_RAM_AGC_INGAIN_TGT__A, ingain_tgt); in init_agc()
3030 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, ingain_tgt_min); in init_agc()
3033 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, ingain_tgt_max); in init_agc()
3036 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A, in init_agc()
3040 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in init_agc()
3044 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI__A, 0); in init_agc()
3047 status = write16(state, SCU_RAM_AGC_IF_IACCU_LO__A, 0); in init_agc()
3050 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, 0); in init_agc()
3053 status = write16(state, SCU_RAM_AGC_RF_IACCU_LO__A, 0); in init_agc()
3056 status = write16(state, SCU_RAM_AGC_CLP_SUM_MAX__A, clp_sum_max); in init_agc()
3059 status = write16(state, SCU_RAM_AGC_SNS_SUM_MAX__A, sns_sum_max); in init_agc()
3063 status = write16(state, SCU_RAM_AGC_KI_INNERGAIN_MIN__A, in init_agc()
3067 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT__A, in init_agc()
3071 status = write16(state, SCU_RAM_AGC_CLP_CYCLEN__A, clp_cyclen); in init_agc()
3075 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MAX__A, 1023); in init_agc()
3078 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MIN__A, (u16) -1023); in init_agc()
3081 status = write16(state, SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A, 50); in init_agc()
3085 status = write16(state, SCU_RAM_AGC_KI_MAXMINGAIN_TH__A, 20); in init_agc()
3088 status = write16(state, SCU_RAM_AGC_CLP_SUM_MIN__A, clp_sum_min); in init_agc()
3091 status = write16(state, SCU_RAM_AGC_SNS_SUM_MIN__A, sns_sum_min); in init_agc()
3094 status = write16(state, SCU_RAM_AGC_CLP_DIR_TO__A, clp_dir_to); in init_agc()
3097 status = write16(state, SCU_RAM_AGC_SNS_DIR_TO__A, sns_dir_to); in init_agc()
3100 status = write16(state, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff); in init_agc()
3103 status = write16(state, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0); in init_agc()
3106 status = write16(state, SCU_RAM_AGC_KI_MIN__A, 0x0117); in init_agc()
3109 status = write16(state, SCU_RAM_AGC_KI_MAX__A, 0x0657); in init_agc()
3112 status = write16(state, SCU_RAM_AGC_CLP_SUM__A, 0); in init_agc()
3115 status = write16(state, SCU_RAM_AGC_CLP_CYCCNT__A, 0); in init_agc()
3118 status = write16(state, SCU_RAM_AGC_CLP_DIR_WD__A, 0); in init_agc()
3121 status = write16(state, SCU_RAM_AGC_CLP_DIR_STP__A, 1); in init_agc()
3124 status = write16(state, SCU_RAM_AGC_SNS_SUM__A, 0); in init_agc()
3127 status = write16(state, SCU_RAM_AGC_SNS_CYCCNT__A, 0); in init_agc()
3130 status = write16(state, SCU_RAM_AGC_SNS_DIR_WD__A, 0); in init_agc()
3133 status = write16(state, SCU_RAM_AGC_SNS_DIR_STP__A, 1); in init_agc()
3136 status = write16(state, SCU_RAM_AGC_SNS_CYCLEN__A, 500); in init_agc()
3139 status = write16(state, SCU_RAM_AGC_KI_CYCLEN__A, 500); in init_agc()
3154 status = write16(state, SCU_RAM_AGC_KI__A, data); in init_agc()
3167 status = write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in dvbtqam_get_acc_pkt_err()
3212 status = write16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, subcmd); in dvbt_sc_command()
3231 status |= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1); in dvbt_sc_command()
3235 status |= write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0); in dvbt_sc_command()
3240 status |= write16(state, OFDM_SC_RA_RAM_CMD__A, cmd); in dvbt_sc_command()
3316 status = write16(state, IQM_CF_BYPASSDET__A, 0); in dvbt_ctrl_set_inc_enable()
3318 status = write16(state, IQM_CF_BYPASSDET__A, 1); in dvbt_ctrl_set_inc_enable()
3333 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, in dvbt_ctrl_set_fr_enable()
3337 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, 0); in dvbt_ctrl_set_fr_enable()
3373 status = write16(state, OFDM_SC_RA_RAM_ECHO_THRES__A, data); in dvbt_ctrl_set_echo_threshold()
3395 status = write16(state, SCU_RAM_FEC_PRE_RS_BER_FILTER_SH__A, in dvbt_ctrl_set_sqi_speed()
3435 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, in dvbt_activate_presets()
3481 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt_standard()
3484 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt_standard()
3487 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_dvbt_standard()
3493 status = write16(state, IQM_AF_UPD_SEL__A, 1); in set_dvbt_standard()
3497 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_dvbt_standard()
3501 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_dvbt_standard()
3505 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_dvbt_standard()
3512 status = write16(state, IQM_AF_AGC_RF__A, 0); in set_dvbt_standard()
3517 status = write16(state, IQM_AF_INC_LCT__A, 0); /* crunch in IQM_CF */ in set_dvbt_standard()
3520 status = write16(state, IQM_CF_DET_LCT__A, 0); /* detect in IQM_CF */ in set_dvbt_standard()
3523 status = write16(state, IQM_CF_WND_LEN__A, 3); /* peak detector window length */ in set_dvbt_standard()
3527 status = write16(state, IQM_RC_STRETCH__A, 16); in set_dvbt_standard()
3530 status = write16(state, IQM_CF_OUT_ENA__A, 0x4); /* enable output 2 */ in set_dvbt_standard()
3533 status = write16(state, IQM_CF_DS_ENA__A, 0x4); /* decimate output 2 */ in set_dvbt_standard()
3536 status = write16(state, IQM_CF_SCALE__A, 1600); in set_dvbt_standard()
3539 status = write16(state, IQM_CF_SCALE_SH__A, 0); in set_dvbt_standard()
3544 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_dvbt_standard()
3547 status = write16(state, IQM_CF_DATATH__A, 495); /* crunching threshold */ in set_dvbt_standard()
3556 status = write16(state, IQM_CF_PKDTH__A, 2); /* peak detector threshold */ in set_dvbt_standard()
3559 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 2); in set_dvbt_standard()
3563 status = write16(state, IQM_CF_COMM_INT_MSK__A, 1); in set_dvbt_standard()
3566 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_dvbt_standard()
3579 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt_standard()
3595 status = write16(state, OFDM_SC_RA_RAM_CONFIG__A, data); in set_dvbt_standard()
3600 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt_standard()
3606 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in set_dvbt_standard()
3614 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_DELAY__A, 1); in set_dvbt_standard()
3617 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A, 2); in set_dvbt_standard()
3623 status = write16(state, FEC_DI_INPUT_CTL__A, 1); /* OFDM input */ in set_dvbt_standard()
3629 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x400); in set_dvbt_standard()
3633 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x1000); in set_dvbt_standard()
3637 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, 0x0001); in set_dvbt_standard()
3681 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in dvbt_start()
3719 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt()
3724 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt()
3727 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt()
3733 status = write16(state, OFDM_CP_COMM_EXEC__A, OFDM_CP_COMM_EXEC_STOP); in set_dvbt()
3822 status = write16(state, OFDM_EC_SB_PRIOR__A, OFDM_EC_SB_PRIOR_HI); in set_dvbt()
3867 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3872 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3876 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3880 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3884 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3891 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3896 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3900 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3904 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3908 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3915 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3920 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3924 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3928 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3932 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3988 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt()
3993 status = write16(state, OFDM_SC_COMM_STATE__A, 0); in set_dvbt()
3996 status = write16(state, OFDM_SC_COMM_EXEC__A, 1); in set_dvbt()
4109 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in power_down_qam()
4202 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, fec_rs_period); in set_qam_measurement()
4205 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, in set_qam_measurement()
4209 status = write16(state, FEC_OC_SNC_FAIL_PERIOD__A, fec_rs_period); in set_qam_measurement()
4223 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13517); in set_qam16()
4226 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 13517); in set_qam16()
4229 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 13517); in set_qam16()
4232 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13517); in set_qam16()
4235 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13517); in set_qam16()
4238 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 13517); in set_qam16()
4242 status = write16(state, QAM_DQ_QUAL_FUN0__A, 2); in set_qam16()
4245 status = write16(state, QAM_DQ_QUAL_FUN1__A, 2); in set_qam16()
4248 status = write16(state, QAM_DQ_QUAL_FUN2__A, 2); in set_qam16()
4251 status = write16(state, QAM_DQ_QUAL_FUN3__A, 2); in set_qam16()
4254 status = write16(state, QAM_DQ_QUAL_FUN4__A, 2); in set_qam16()
4257 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam16()
4261 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam16()
4264 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam16()
4267 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam16()
4272 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam16()
4278 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam16()
4281 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam16()
4284 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam16()
4287 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam16()
4290 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam16()
4293 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam16()
4296 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam16()
4299 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam16()
4303 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam16()
4306 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam16()
4309 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam16()
4312 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam16()
4315 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam16()
4318 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam16()
4321 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam16()
4324 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam16()
4327 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 32); in set_qam16()
4330 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam16()
4333 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam16()
4336 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam16()
4343 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 140); in set_qam16()
4346 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam16()
4349 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 95); in set_qam16()
4352 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 120); in set_qam16()
4355 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 230); in set_qam16()
4358 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 105); in set_qam16()
4362 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam16()
4365 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam16()
4368 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 24); in set_qam16()
4375 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 16); in set_qam16()
4378 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 220); in set_qam16()
4381 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 25); in set_qam16()
4384 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 6); in set_qam16()
4387 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -24); in set_qam16()
4390 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -65); in set_qam16()
4393 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -127); in set_qam16()
4418 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6707); in set_qam32()
4421 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6707); in set_qam32()
4424 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6707); in set_qam32()
4427 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6707); in set_qam32()
4430 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6707); in set_qam32()
4433 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 6707); in set_qam32()
4438 status = write16(state, QAM_DQ_QUAL_FUN0__A, 3); in set_qam32()
4441 status = write16(state, QAM_DQ_QUAL_FUN1__A, 3); in set_qam32()
4444 status = write16(state, QAM_DQ_QUAL_FUN2__A, 3); in set_qam32()
4447 status = write16(state, QAM_DQ_QUAL_FUN3__A, 3); in set_qam32()
4450 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam32()
4453 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam32()
4457 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam32()
4460 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam32()
4463 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam32()
4469 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam32()
4477 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam32()
4480 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam32()
4483 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam32()
4486 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam32()
4489 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam32()
4492 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam32()
4495 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam32()
4498 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam32()
4502 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam32()
4505 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam32()
4508 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam32()
4511 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam32()
4514 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam32()
4517 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam32()
4520 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam32()
4523 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam32()
4526 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 16); in set_qam32()
4529 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam32()
4532 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam32()
4535 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam32()
4542 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 90); in set_qam32()
4545 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam32()
4548 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam32()
4551 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam32()
4554 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 170); in set_qam32()
4557 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam32()
4561 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam32()
4564 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam32()
4567 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 10); in set_qam32()
4574 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam32()
4577 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 140); in set_qam32()
4580 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) -8); in set_qam32()
4583 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) -16); in set_qam32()
4586 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -26); in set_qam32()
4589 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -56); in set_qam32()
4592 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -86); in set_qam32()
4613 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13336); in set_qam64()
4616 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12618); in set_qam64()
4619 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 11988); in set_qam64()
4622 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13809); in set_qam64()
4625 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13809); in set_qam64()
4628 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15609); in set_qam64()
4633 status = write16(state, QAM_DQ_QUAL_FUN0__A, 4); in set_qam64()
4636 status = write16(state, QAM_DQ_QUAL_FUN1__A, 4); in set_qam64()
4639 status = write16(state, QAM_DQ_QUAL_FUN2__A, 4); in set_qam64()
4642 status = write16(state, QAM_DQ_QUAL_FUN3__A, 4); in set_qam64()
4645 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam64()
4648 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam64()
4652 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam64()
4655 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam64()
4658 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam64()
4663 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam64()
4671 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam64()
4674 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam64()
4677 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam64()
4680 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam64()
4683 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam64()
4686 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam64()
4689 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam64()
4692 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam64()
4696 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam64()
4699 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 30); in set_qam64()
4702 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 100); in set_qam64()
4705 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam64()
4708 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 30); in set_qam64()
4711 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam64()
4714 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam64()
4717 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam64()
4720 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam64()
4723 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam64()
4726 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam64()
4729 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam64()
4736 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 100); in set_qam64()
4739 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam64()
4742 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam64()
4745 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 110); in set_qam64()
4748 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 200); in set_qam64()
4751 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 95); in set_qam64()
4755 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam64()
4758 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam64()
4761 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 15); in set_qam64()
4768 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam64()
4771 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 141); in set_qam64()
4774 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 7); in set_qam64()
4777 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 0); in set_qam64()
4780 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -15); in set_qam64()
4783 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -45); in set_qam64()
4786 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -80); in set_qam64()
4808 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6564); in set_qam128()
4811 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6598); in set_qam128()
4814 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6394); in set_qam128()
4817 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6409); in set_qam128()
4820 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6656); in set_qam128()
4823 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 7238); in set_qam128()
4828 status = write16(state, QAM_DQ_QUAL_FUN0__A, 6); in set_qam128()
4831 status = write16(state, QAM_DQ_QUAL_FUN1__A, 6); in set_qam128()
4834 status = write16(state, QAM_DQ_QUAL_FUN2__A, 6); in set_qam128()
4837 status = write16(state, QAM_DQ_QUAL_FUN3__A, 6); in set_qam128()
4840 status = write16(state, QAM_DQ_QUAL_FUN4__A, 5); in set_qam128()
4843 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam128()
4847 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam128()
4850 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam128()
4853 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam128()
4860 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam128()
4868 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam128()
4871 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam128()
4874 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam128()
4877 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam128()
4880 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam128()
4883 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam128()
4886 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam128()
4889 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam128()
4893 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam128()
4896 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 40); in set_qam128()
4899 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 120); in set_qam128()
4902 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam128()
4905 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 40); in set_qam128()
4908 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 60); in set_qam128()
4911 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam128()
4914 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam128()
4917 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 64); in set_qam128()
4920 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam128()
4923 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam128()
4926 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam128()
4933 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam128()
4936 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam128()
4939 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam128()
4942 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam128()
4945 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 140); in set_qam128()
4948 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam128()
4952 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam128()
4955 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 5); in set_qam128()
4959 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam128()
4965 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam128()
4968 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 65); in set_qam128()
4971 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 5); in set_qam128()
4974 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 3); in set_qam128()
4977 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -1); in set_qam128()
4980 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -12); in set_qam128()
4983 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -23); in set_qam128()
5005 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 11502); in set_qam256()
5008 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12084); in set_qam256()
5011 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 12543); in set_qam256()
5014 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 12931); in set_qam256()
5017 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13629); in set_qam256()
5020 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15385); in set_qam256()
5025 status = write16(state, QAM_DQ_QUAL_FUN0__A, 8); in set_qam256()
5028 status = write16(state, QAM_DQ_QUAL_FUN1__A, 8); in set_qam256()
5031 status = write16(state, QAM_DQ_QUAL_FUN2__A, 8); in set_qam256()
5034 status = write16(state, QAM_DQ_QUAL_FUN3__A, 8); in set_qam256()
5037 status = write16(state, QAM_DQ_QUAL_FUN4__A, 6); in set_qam256()
5040 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam256()
5044 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam256()
5047 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam256()
5050 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam256()
5056 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam256()
5064 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam256()
5067 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam256()
5070 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam256()
5073 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam256()
5076 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam256()
5079 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam256()
5082 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam256()
5085 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam256()
5089 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam256()
5092 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 50); in set_qam256()
5095 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 250); in set_qam256()
5098 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam256()
5101 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 50); in set_qam256()
5104 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 125); in set_qam256()
5107 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam256()
5110 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam256()
5113 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam256()
5116 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam256()
5119 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam256()
5122 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam256()
5129 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam256()
5132 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam256()
5135 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam256()
5138 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam256()
5141 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 150); in set_qam256()
5144 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 110); in set_qam256()
5148 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam256()
5151 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam256()
5154 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam256()
5161 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam256()
5164 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 74); in set_qam256()
5167 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 18); in set_qam256()
5170 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 13); in set_qam256()
5173 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) 7); in set_qam256()
5176 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) 0); in set_qam256()
5179 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -8); in set_qam256()
5201 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in qam_reset_qam()
5241 status = write16(state, IQM_FD_RATESEL__A, ratesel); in qam_set_symbolrate()
5275 status = write16(state, QAM_LC_SYMBOL_FREQ__A, (u16) lc_symb_rate); in qam_set_symbolrate()
5405 status = write16(state, FEC_DI_COMM_EXEC__A, FEC_DI_COMM_EXEC_STOP); in set_qam()
5408 status = write16(state, FEC_RS_COMM_EXEC__A, FEC_RS_COMM_EXEC_STOP); in set_qam()
5506 status = write16(state, IQM_CF_SCALE_SH__A, IQM_CF_SCALE_SH__PRE); in set_qam()
5509 status = write16(state, QAM_SY_TIMEOUT__A, QAM_SY_TIMEOUT__PRE); in set_qam()
5514 status = write16(state, QAM_LC_RATE_LIMIT__A, 3); in set_qam()
5517 status = write16(state, QAM_LC_LPF_FACTORP__A, 4); in set_qam()
5520 status = write16(state, QAM_LC_LPF_FACTORI__A, 4); in set_qam()
5523 status = write16(state, QAM_LC_MODE__A, 7); in set_qam()
5527 status = write16(state, QAM_LC_QUAL_TAB0__A, 1); in set_qam()
5530 status = write16(state, QAM_LC_QUAL_TAB1__A, 1); in set_qam()
5533 status = write16(state, QAM_LC_QUAL_TAB2__A, 1); in set_qam()
5536 status = write16(state, QAM_LC_QUAL_TAB3__A, 1); in set_qam()
5539 status = write16(state, QAM_LC_QUAL_TAB4__A, 2); in set_qam()
5542 status = write16(state, QAM_LC_QUAL_TAB5__A, 2); in set_qam()
5545 status = write16(state, QAM_LC_QUAL_TAB6__A, 2); in set_qam()
5548 status = write16(state, QAM_LC_QUAL_TAB8__A, 2); in set_qam()
5551 status = write16(state, QAM_LC_QUAL_TAB9__A, 2); in set_qam()
5554 status = write16(state, QAM_LC_QUAL_TAB10__A, 2); in set_qam()
5557 status = write16(state, QAM_LC_QUAL_TAB12__A, 2); in set_qam()
5560 status = write16(state, QAM_LC_QUAL_TAB15__A, 3); in set_qam()
5563 status = write16(state, QAM_LC_QUAL_TAB16__A, 3); in set_qam()
5566 status = write16(state, QAM_LC_QUAL_TAB20__A, 4); in set_qam()
5569 status = write16(state, QAM_LC_QUAL_TAB25__A, 4); in set_qam()
5574 status = write16(state, QAM_SY_SP_INV__A, in set_qam()
5580 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam()
5610 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam()
5625 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in set_qam()
5628 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_ACTIVE); in set_qam()
5631 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_qam()
5677 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_qam_standard()
5680 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_qam_standard()
5711 status = write16(state, IQM_CF_OUT_ENA__A, 1 << IQM_CF_OUT_ENA_QAM__B); in set_qam_standard()
5714 status = write16(state, IQM_CF_SYMMETRIC__A, 0); in set_qam_standard()
5717 status = write16(state, IQM_CF_MIDTAP__A, in set_qam_standard()
5722 status = write16(state, IQM_RC_STRETCH__A, 21); in set_qam_standard()
5725 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_qam_standard()
5728 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_qam_standard()
5731 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_qam_standard()
5734 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 0); in set_qam_standard()
5738 status = write16(state, IQM_FS_ADJ_SEL__A, 1); in set_qam_standard()
5741 status = write16(state, IQM_RC_ADJ_SEL__A, 1); in set_qam_standard()
5744 status = write16(state, IQM_CF_ADJ_SEL__A, 1); in set_qam_standard()
5747 status = write16(state, IQM_AF_UPD_SEL__A, 0); in set_qam_standard()
5752 status = write16(state, IQM_CF_CLP_VAL__A, 500); in set_qam_standard()
5755 status = write16(state, IQM_CF_DATATH__A, 1000); in set_qam_standard()
5758 status = write16(state, IQM_CF_BYPASSDET__A, 1); in set_qam_standard()
5761 status = write16(state, IQM_CF_DET_LCT__A, 0); in set_qam_standard()
5764 status = write16(state, IQM_CF_WND_LEN__A, 1); in set_qam_standard()
5767 status = write16(state, IQM_CF_PKDTH__A, 1); in set_qam_standard()
5770 status = write16(state, IQM_AF_INC_BYPASS__A, 1); in set_qam_standard()
5778 status = write16(state, IQM_AF_START_LOCK__A, 0x01); in set_qam_standard()
5788 status = write16(state, SCU_RAM_QAM_FSM_STEP_PERIOD__A, 2000); in set_qam_standard()
5793 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam_standard()
5816 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam_standard()
5830 status = write16(state, SCU_RAM_GPIO__A, in write_gpio()
5836 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in write_gpio()
5843 status = write16(state, SIO_PDR_SMA_TX_CFG__A, in write_gpio()
5857 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5863 status = write16(state, SIO_PDR_SMA_RX_CFG__A, in write_gpio()
5877 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5883 status = write16(state, SIO_PDR_GPIO_CFG__A, in write_gpio()
5897 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5903 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in write_gpio()
5983 status = write16(state, SIO_CC_PWD_MODE__A, in power_down_device()
5987 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_down_device()
6015 status = write16(state, SIO_CC_SOFT_RST__A, in init_drxk()
6021 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in init_drxk()
6060 status = write16(state, SCU_RAM_GPIO__A, in init_drxk()
6072 status = write16(state, AUD_COMM_EXEC__A, AUD_COMM_EXEC_STOP); in init_drxk()
6075 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_STOP); in init_drxk()
6080 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6086 status = write16(state, SIO_BL_COMM_EXEC__A, in init_drxk()
6102 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6108 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in init_drxk()
6133 status = write16(state, SCU_RAM_DRIVER_VER_HI__A, in init_drxk()
6142 status = write16(state, SCU_RAM_DRIVER_VER_LO__A, in init_drxk()
6162 status = write16(state, SCU_RAM_DRIVER_DEBUG__A, 0); in init_drxk()
6168 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP); in init_drxk()
6560 write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in drxk_get_stats()