12 	0x01, 0x15,
13 	0x02, 0x30,
14 	0x03, 0x00,
15 	0x04, 0x7d,   /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
16 	0x05, 0x35,   /* I2CT = 0, SCLT = 1, SDAT = 1 */
17 	0x06, 0x40,   /* DAC not used, set to high impendance mode */
18 	0x07, 0x00,   /* DAC LSB */
19 	0x08, 0x40,   /* DiSEqC off, LNB power on OP2/LOCK pin on */
20 	0x09, 0x00,   /* FIFO */
21 	0x0c, 0x51,   /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
22 	0x0d, 0x82,   /* DC offset compensation = ON, beta_agc1 = 2 */
23 	0x0e, 0x23,   /* alpha_tmg = 2, beta_tmg = 3 */
24 	0x10, 0x3f,   // AGC2  0x3d
25 	0x11, 0x84,
26 	0x12, 0xb9,
27 	0x15, 0xc9,   // lock detector threshold
28 	0x16, 0x00,
29 	0x17, 0x00,
30 	0x18, 0x00,
31 	0x19, 0x00,
32 	0x1a, 0x00,
33 	0x1f, 0x50,
34 	0x20, 0x00,
35 	0x21, 0x00,
36 	0x22, 0x00,
37 	0x23, 0x00,
38 	0x28, 0x00,  // out imp: normal  out type: parallel FEC mode:0
39 	0x29, 0x1e,  // 1/2 threshold
40 	0x2a, 0x14,  // 2/3 threshold
41 	0x2b, 0x0f,  // 3/4 threshold
42 	0x2c, 0x09,  // 5/6 threshold
43 	0x2d, 0x05,  // 7/8 threshold
44 	0x2e, 0x01,
45 	0x31, 0x1f,  // test all FECs
46 	0x32, 0x19,  // viterbi and synchro search
47 	0x33, 0xfc,  // rs control
48 	0x34, 0x93,  // error control
49 	0x0f, 0x52,
50 	0xff, 0xff
55 	u8 aclk = 0;  in alps_bsru6_set_symbol_rate()
56 	u8 bclk = 0;  in alps_bsru6_set_symbol_rate()
59 		aclk = 0xb7;  in alps_bsru6_set_symbol_rate()
60 		bclk = 0x47;  in alps_bsru6_set_symbol_rate()
62 		aclk = 0xb7;  in alps_bsru6_set_symbol_rate()
63 		bclk = 0x4b;  in alps_bsru6_set_symbol_rate()
65 		aclk = 0xb7;  in alps_bsru6_set_symbol_rate()
66 		bclk = 0x4f;  in alps_bsru6_set_symbol_rate()
68 		aclk = 0xb7;  in alps_bsru6_set_symbol_rate()
69 		bclk = 0x53;  in alps_bsru6_set_symbol_rate()
71 		aclk = 0xb6;  in alps_bsru6_set_symbol_rate()
72 		bclk = 0x53;  in alps_bsru6_set_symbol_rate()
74 		aclk = 0xb4;  in alps_bsru6_set_symbol_rate()
75 		bclk = 0x51;  in alps_bsru6_set_symbol_rate()
78 	stv0299_writereg(fe, 0x13, aclk);  in alps_bsru6_set_symbol_rate()
79 	stv0299_writereg(fe, 0x14, bclk);  in alps_bsru6_set_symbol_rate()
80 	stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);  in alps_bsru6_set_symbol_rate()
81 	stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);  in alps_bsru6_set_symbol_rate()
82 	stv0299_writereg(fe, 0x21, ratio & 0xf0);  in alps_bsru6_set_symbol_rate()
84 	return 0;  in alps_bsru6_set_symbol_rate()
92 	struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };  in alps_bsru6_tuner_set_params()
99 	buf[0] = (div >> 8) & 0x7f;  in alps_bsru6_tuner_set_params()
100 	buf[1] = div & 0xff;  in alps_bsru6_tuner_set_params()
101 	buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4;  in alps_bsru6_tuner_set_params()
102 	buf[3] = 0xC4;  in alps_bsru6_tuner_set_params()
105 		buf[3] = 0xc0;  in alps_bsru6_tuner_set_params()
111 	return 0;  in alps_bsru6_tuner_set_params()
115 	.demod_address = 0x68,
119 	.skip_reinit = 0,