Lines Matching +full:0 +full:x004

13 PMU_FORMAT_ATTR(event,		"config:0-27");		/* ES: Events Select */
86 return 0; \
87 return (iommu_pmu->filter & _filter) ? attr->mode : 0; \
96 IOMMU_PMU_ATTR(filter_requester_id_en, "config1:0", IOMMU_PMU_FILTER_REQUESTER_ID);
103 IOMMU_PMU_ATTR(filter_pasid, "config2:0-21", IOMMU_PMU_FILTER_PASID);
107 #define iommu_pmu_en_requester_id(e) ((e) & 0x1)
108 #define iommu_pmu_en_domain(e) (((e) >> 1) & 0x1)
109 #define iommu_pmu_en_pasid(e) (((e) >> 2) & 0x1)
110 #define iommu_pmu_en_ats(e) (((e) >> 3) & 0x1)
111 #define iommu_pmu_en_page_table(e) (((e) >> 4) & 0x1)
112 #define iommu_pmu_get_requester_id(filter) (((filter) >> 16) & 0xffff)
113 #define iommu_pmu_get_domain(filter) (((filter) >> 32) & 0xffff)
114 #define iommu_pmu_get_pasid(filter) ((filter) & 0x3fffff)
115 #define iommu_pmu_get_ats(filter) (((filter) >> 24) & 0x1f)
116 #define iommu_pmu_get_page_table(filter) (((filter) >> 32) & 0x1f)
134 0); \
160 return 0; \
161 return (iommu_pmu->evcap[_g_idx] & _event) ? attr->mode : 0; \
170 IOMMU_PMU_EVENT_ATTR(iommu_clocks, "event_group=0x0,event=0x001", 0x0, 0x001)
171 IOMMU_PMU_EVENT_ATTR(iommu_requests, "event_group=0x0,event=0x002", 0x0, 0x002)
172 IOMMU_PMU_EVENT_ATTR(pw_occupancy, "event_group=0x0,event=0x004", 0x0, 0x004)
173 IOMMU_PMU_EVENT_ATTR(ats_blocked, "event_group=0x0,event=0x008", 0x0, 0x008)
174 IOMMU_PMU_EVENT_ATTR(iommu_mrds, "event_group=0x1,event=0x001", 0x1, 0x001)
175 IOMMU_PMU_EVENT_ATTR(iommu_mem_blocked, "event_group=0x1,event=0x020", 0x1, 0x020)
176 IOMMU_PMU_EVENT_ATTR(pg_req_posted, "event_group=0x1,event=0x040", 0x1, 0x040)
177 IOMMU_PMU_EVENT_ATTR(ctxt_cache_lookup, "event_group=0x2,event=0x001", 0x2, 0x001)
178 IOMMU_PMU_EVENT_ATTR(ctxt_cache_hit, "event_group=0x2,event=0x002", 0x2, 0x002)
179 IOMMU_PMU_EVENT_ATTR(pasid_cache_lookup, "event_group=0x2,event=0x004", 0x2, 0x004)
180 IOMMU_PMU_EVENT_ATTR(pasid_cache_hit, "event_group=0x2,event=0x008", 0x2, 0x008)
181 IOMMU_PMU_EVENT_ATTR(ss_nonleaf_lookup, "event_group=0x2,event=0x010", 0x2, 0x010)
182 IOMMU_PMU_EVENT_ATTR(ss_nonleaf_hit, "event_group=0x2,event=0x020", 0x2, 0x020)
183 IOMMU_PMU_EVENT_ATTR(fs_nonleaf_lookup, "event_group=0x2,event=0x040", 0x2, 0x040)
184 IOMMU_PMU_EVENT_ATTR(fs_nonleaf_hit, "event_group=0x2,event=0x080", 0x2, 0x080)
185 IOMMU_PMU_EVENT_ATTR(hpt_nonleaf_lookup, "event_group=0x2,event=0x100", 0x2, 0x100)
186 IOMMU_PMU_EVENT_ATTR(hpt_nonleaf_hit, "event_group=0x2,event=0x200", 0x2, 0x200)
187 IOMMU_PMU_EVENT_ATTR(iotlb_lookup, "event_group=0x3,event=0x001", 0x3, 0x001)
188 IOMMU_PMU_EVENT_ATTR(iotlb_hit, "event_group=0x3,event=0x002", 0x3, 0x002)
189 IOMMU_PMU_EVENT_ATTR(hpt_leaf_lookup, "event_group=0x3,event=0x004", 0x3, 0x004)
190 IOMMU_PMU_EVENT_ATTR(hpt_leaf_hit, "event_group=0x3,event=0x008", 0x3, 0x008)
191 IOMMU_PMU_EVENT_ATTR(int_cache_lookup, "event_group=0x4,event=0x001", 0x4, 0x001)
192 IOMMU_PMU_EVENT_ATTR(int_cache_hit_nonposted, "event_group=0x4,event=0x002", 0x4, 0x002)
193 IOMMU_PMU_EVENT_ATTR(int_cache_hit_posted, "event_group=0x4,event=0x004", 0x4, 0x004)
273 return 0; in iommu_pmu_validate_event()
280 int nr = 0; in iommu_pmu_validate_group()
295 return 0; in iommu_pmu_validate_group()
309 if (event->cpu < 0) in iommu_pmu_event_init()
353 if (WARN_ON_ONCE(hwc->idx < 0 || hwc->idx >= IOMMU_PMU_IDX_MAX)) in iommu_pmu_start()
359 hwc->state = 0; in iommu_pmu_start()
375 ecmd_submit_sync(iommu, DMA_ECMD_ENABLE, hwc->idx, 0); in iommu_pmu_start()
387 ecmd_submit_sync(iommu, DMA_ECMD_DISABLE, hwc->idx, 0); in iommu_pmu_stop()
405 return 0; in iommu_pmu_validate_per_cntr_event()
418 for (idx = iommu_pmu->num_cntr - 1; idx >= 0; idx--) { in iommu_pmu_assign_event()
426 if (idx < 0) in iommu_pmu_assign_event()
451 return 0; in iommu_pmu_assign_event()
461 if (ret < 0) in iommu_pmu_add()
467 iommu_pmu_start(event, 0); in iommu_pmu_add()
469 return 0; in iommu_pmu_add()
497 ecmd_submit_sync(iommu, DMA_ECMD_UNFREEZE, 0, 0); in iommu_pmu_enable()
505 ecmd_submit_sync(iommu, DMA_ECMD_FREEZE, 0, 0); in iommu_pmu_disable()
589 return 0; in alloc_iommu_pmu()
635 for (i = 0; i < iommu_pmu->num_eg; i++) { in alloc_iommu_pmu()
648 for (i = 0; i < iommu_pmu->num_cntr; i++) { in alloc_iommu_pmu()
658 for (j = 0; j < iommu_pmu->num_eg; j++) in alloc_iommu_pmu()
671 for (i = 0; i < iommu_pmu->num_cntr; i++) { in alloc_iommu_pmu()
691 for (j = 0; j < iommu_pmu->num_eg; j++) in alloc_iommu_pmu()
692 iommu_pmu->cntr_evcap[i][j] = 0; in alloc_iommu_pmu()
695 for (j = 0; j < iommu_cntrcap_egcnt(cap); j++) { in alloc_iommu_pmu()
711 return 0; in alloc_iommu_pmu()
714 for (i = 0; i < iommu_pmu->num_cntr; i++) in alloc_iommu_pmu()
735 for (i = 0; i < iommu_pmu->num_cntr; i++) in free_iommu_pmu()
750 if (irq <= 0) in iommu_pmu_set_interrupt()
760 iommu->perf_irq = 0; in iommu_pmu_set_interrupt()
763 return 0; in iommu_pmu_set_interrupt()
773 iommu->perf_irq = 0; in iommu_pmu_unset_interrupt()
786 return 0; in iommu_pmu_cpu_online()
802 return 0; in iommu_pmu_cpu_offline()
806 return 0; in iommu_pmu_cpu_offline()
813 return 0; in iommu_pmu_cpu_offline()
818 return 0; in iommu_pmu_cpu_offline()
833 if (ret < 0) in iommu_pmu_cpuhp_setup()
846 return 0; in iommu_pmu_cpuhp_setup()