Lines Matching defs:iommu_pmu
624 struct iommu_pmu { struct
625 struct intel_iommu *iommu;
626 u32 num_cntr; /* Number of counters */
627 u32 num_eg; /* Number of event group */
628 u32 cntr_width; /* Counter width */
629 u32 cntr_stride; /* Counter Stride */
630 u32 filter; /* Bitmask of filter support */
631 void __iomem *base; /* the PerfMon base address */
632 void __iomem *cfg_reg; /* counter configuration base address */
633 void __iomem *cntr_reg; /* counter 0 address*/
634 void __iomem *overflow; /* overflow status register */
636 u64 *evcap; /* Indicates all supported events */
637 u32 **cntr_evcap; /* Supported events of each counter. */
639 struct pmu pmu;
641 struct perf_event *event_list[IOMMU_PMU_IDX_MAX];
642 unsigned char irq_name[16];
643 struct hlist_node cpuhp_node;
644 int cpu;