Lines Matching refs:reg_shift
686 int reg_shift; member
700 .reg_shift = 8,
708 .reg_shift = 0,
716 .reg_shift = 6,
724 .reg_shift = 5,
731 .reg_shift = 4,
738 .reg_shift = 3,
745 .reg_shift = 0,
754 .reg_shift = 10,
761 .reg_shift = 4,
769 .reg_shift = 0,
777 .reg_shift = 13,
785 .reg_shift = 2,
793 .reg_shift = 9,
801 .reg_shift = 0,
809 .reg_shift = 0,
817 .reg_shift = 12,
825 .reg_shift = 11,
832 .reg_shift = 10,
839 .reg_shift = 9,
846 .reg_shift = 3,
853 .reg_shift = 2,
860 .reg_shift = 0,
868 .reg_shift = 8,
877 .reg_shift = 3,
886 .reg_shift = 0,
895 .reg_shift = 9,
903 .reg_shift = 5,
911 .reg_shift = 0,
919 .reg_shift = 11,
927 .reg_shift = 0,
936 .reg_shift = 12,
945 .reg_shift = 8,
954 .reg_shift = 0,
964 .reg_shift = 0,
973 .reg_shift = 8,
981 .reg_shift = 12,
989 .reg_shift = 8,
997 .reg_shift = 4,
1005 .reg_shift = 0,
1013 .reg_shift = 4,
1021 .reg_shift = 0,
1029 .reg_shift = 8,
1038 .reg_shift = 6,
1046 .reg_shift = 3,
1055 .reg_shift = 7,
1063 .reg_shift = 4,
1071 .reg_shift = 8,
1079 .reg_shift = 0,
1088 .reg_shift = 8,
1098 .reg_shift = 8,
1108 .reg_shift = 3,
1118 .reg_shift = 3,
1128 .reg_shift = 8,
1138 .reg_shift = 8,
1148 .reg_shift = 0,
1158 .reg_shift = 0,
1167 .reg_shift = 4,
1177 .reg_shift = 0,
1187 .reg_shift = 8,
1195 .reg_shift = 0,
1203 .reg_shift = 8,
1211 .reg_shift = 0,
1219 .reg_shift = 8,
1228 .reg_shift = 0,
1237 .reg_shift = 8,
1247 .reg_shift = 8,
1257 .reg_shift = 0,
1267 .reg_shift = 0,
1276 .reg_shift = 0,
1284 .reg_shift = 1,
1291 .reg_shift = 0,
1300 .reg_shift = 0,
1308 .reg_shift = 0,
1316 .reg_shift = 0,
1325 .reg_shift = 0,
1333 .reg_shift = 0,
1342 .reg_shift = 0,
1350 .reg_shift = 0,
1961 int reg_shift = iqs7222_props[i].reg_shift; in iqs7222_parse_props() local
1985 setup[reg_offset] |= BIT(reg_shift); in iqs7222_parse_props()
1987 setup[reg_offset] &= ~BIT(reg_shift); in iqs7222_parse_props()
1995 setup[reg_offset] &= ~BIT(reg_shift); in iqs7222_parse_props()
1997 setup[reg_offset] |= BIT(reg_shift); in iqs7222_parse_props()
2018 setup[reg_offset] &= ~GENMASK(reg_shift + reg_width - 1, in iqs7222_parse_props()
2019 reg_shift); in iqs7222_parse_props()
2020 setup[reg_offset] |= (val / val_pitch << reg_shift); in iqs7222_parse_props()