Lines Matching refs:reg_offset

685 	int reg_offset;  member
699 .reg_offset = 0,
707 .reg_offset = 0,
715 .reg_offset = 1,
723 .reg_offset = 1,
730 .reg_offset = 1,
737 .reg_offset = 1,
744 .reg_offset = 1,
753 .reg_offset = 2,
760 .reg_offset = 2,
768 .reg_offset = 2,
776 .reg_offset = 0,
784 .reg_offset = 0,
792 .reg_offset = 1,
800 .reg_offset = 1,
808 .reg_offset = 2,
816 .reg_offset = 0,
824 .reg_offset = 0,
831 .reg_offset = 0,
838 .reg_offset = 0,
845 .reg_offset = 0,
852 .reg_offset = 0,
859 .reg_offset = 0,
867 .reg_offset = 1,
876 .reg_offset = 1,
885 .reg_offset = 1,
894 .reg_offset = 2,
902 .reg_offset = 2,
910 .reg_offset = 2,
918 .reg_offset = 3,
926 .reg_offset = 3,
935 .reg_offset = 0,
944 .reg_offset = 0,
953 .reg_offset = 0,
963 .reg_offset = 1,
972 .reg_offset = 1,
980 .reg_offset = 0,
988 .reg_offset = 0,
996 .reg_offset = 0,
1004 .reg_offset = 0,
1012 .reg_offset = 1,
1020 .reg_offset = 1,
1028 .reg_offset = 0,
1037 .reg_offset = 0,
1045 .reg_offset = 0,
1054 .reg_offset = 0,
1062 .reg_offset = 0,
1070 .reg_offset = 1,
1078 .reg_offset = 1,
1087 .reg_offset = 9,
1097 .reg_offset = 9,
1107 .reg_offset = 9,
1117 .reg_offset = 9,
1127 .reg_offset = 10,
1137 .reg_offset = 10,
1147 .reg_offset = 10,
1157 .reg_offset = 10,
1166 .reg_offset = 0,
1176 .reg_offset = 0,
1186 .reg_offset = 1,
1194 .reg_offset = 1,
1202 .reg_offset = 2,
1210 .reg_offset = 2,
1218 .reg_offset = 3,
1227 .reg_offset = 3,
1236 .reg_offset = 20,
1246 .reg_offset = 21,
1256 .reg_offset = 21,
1266 .reg_offset = 22,
1275 .reg_offset = 23,
1283 .reg_offset = 0,
1290 .reg_offset = 1,
1299 .reg_offset = 2,
1307 .reg_offset = 3,
1315 .reg_offset = 4,
1324 .reg_offset = 5,
1332 .reg_offset = 6,
1341 .reg_offset = 7,
1349 .reg_offset = 8,
1960 int reg_offset = iqs7222_props[i].reg_offset; in iqs7222_parse_props() local
1985 setup[reg_offset] |= BIT(reg_shift); in iqs7222_parse_props()
1987 setup[reg_offset] &= ~BIT(reg_shift); in iqs7222_parse_props()
1995 setup[reg_offset] &= ~BIT(reg_shift); in iqs7222_parse_props()
1997 setup[reg_offset] |= BIT(reg_shift); in iqs7222_parse_props()
2018 setup[reg_offset] &= ~GENMASK(reg_shift + reg_width - 1, in iqs7222_parse_props()
2020 setup[reg_offset] |= (val / val_pitch << reg_shift); in iqs7222_parse_props()
2346 int count, error, reg_offset, i; in iqs7222_parse_sldr() local
2381 reg_offset = dev_desc->sldr_res < U16_MAX ? 0 : 1; in iqs7222_parse_sldr()
2384 sldr_setup[3 + reg_offset] &= ~GENMASK(ext_chan - 1, 0); in iqs7222_parse_sldr()
2387 sldr_setup[5 + reg_offset + i] = 0; in iqs7222_parse_sldr()
2401 sldr_setup[3 + reg_offset] |= BIT(chan_sel[i]); in iqs7222_parse_sldr()
2402 sldr_setup[5 + reg_offset + i] = chan_sel[i] * 42 + 1080; in iqs7222_parse_sldr()
2405 sldr_setup[4 + reg_offset] = dev_desc->touch_link; in iqs7222_parse_sldr()
2407 sldr_setup[4 + reg_offset] -= 2; in iqs7222_parse_sldr()
2417 if (reg_offset) { in iqs7222_parse_sldr()
2430 if (!(reg_offset ? sldr_setup[3] in iqs7222_parse_sldr()
2439 if (val > (reg_offset ? U16_MAX : U8_MAX * 4)) { in iqs7222_parse_sldr()
2445 if (reg_offset) { in iqs7222_parse_sldr()
2461 if (!reg_offset) { in iqs7222_parse_sldr()
2489 if (!reg_offset) in iqs7222_parse_sldr()
2506 if (reg_offset) in iqs7222_parse_sldr()
2525 : sldr_setup[3 + reg_offset], in iqs7222_parse_sldr()
2527 : sldr_setup[4 + reg_offset], in iqs7222_parse_sldr()
2534 if (!reg_offset) in iqs7222_parse_sldr()
2545 if (i && !reg_offset) in iqs7222_parse_sldr()
2547 else if (sldr_setup[4 + reg_offset] == dev_desc->touch_link) in iqs7222_parse_sldr()