65 static u32 get_adc_step_mask(struct tiadc_device *adc_dev)  in get_adc_step_mask()  argument
69 	step_en = ((1 << adc_dev->channels) - 1);  in get_adc_step_mask()
70 	step_en <<= TOTAL_STEPS - adc_dev->channels + 1;  in get_adc_step_mask()
74 static u32 get_adc_chan_step_mask(struct tiadc_device *adc_dev,  in get_adc_chan_step_mask()  argument
79 	for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) {  in get_adc_chan_step_mask()
80 		if (chan->channel == adc_dev->channel_line[i]) {  in get_adc_chan_step_mask()
83 			step = adc_dev->channel_step[i];  in get_adc_chan_step_mask()
92 static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan)  in get_adc_step_bit()  argument
94 	return 1 << adc_dev->channel_step[chan];  in get_adc_step_bit()
97 static int tiadc_wait_idle(struct tiadc_device *adc_dev)  in tiadc_wait_idle()  argument
101 	return readl_poll_timeout(adc_dev->mfd_tscadc->tscadc_base + REG_ADCFSM,  in tiadc_wait_idle()
103 				  IDLE_TIMEOUT_MS * 1000 * adc_dev->channels);  in tiadc_wait_idle()
108 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_step_config()  local
121 	for (i = 0; i < adc_dev->channels; i++) {  in tiadc_step_config()
124 		chan = adc_dev->channel_line[i];  in tiadc_step_config()
126 		if (adc_dev->step_avg[i])  in tiadc_step_config()
127 			stepconfig = STEPCONFIG_AVG(ffs(adc_dev->step_avg[i]) - 1) |  in tiadc_step_config()
135 		tiadc_writel(adc_dev, REG_STEPCONFIG(steps),  in tiadc_step_config()
140 		tiadc_writel(adc_dev, REG_STEPDELAY(steps),  in tiadc_step_config()
141 			     STEPDELAY_OPEN(adc_dev->open_delay[i]) |  in tiadc_step_config()
142 			     STEPDELAY_SAMPLE(adc_dev->sample_delay[i]));  in tiadc_step_config()
144 		adc_dev->channel_step[i] = steps;  in tiadc_step_config()
152 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_irq_h()  local
156 	status = tiadc_readl(adc_dev, REG_IRQSTATUS);  in tiadc_irq_h()
164 		config = tiadc_readl(adc_dev, REG_CTRL);  in tiadc_irq_h()
166 		tiadc_writel(adc_dev, REG_CTRL, config);  in tiadc_irq_h()
167 		tiadc_writel(adc_dev, REG_IRQSTATUS,  in tiadc_irq_h()
177 			adc_fsm = tiadc_readl(adc_dev, REG_ADCFSM);  in tiadc_irq_h()
180 		tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_SSENB));  in tiadc_irq_h()
184 		tiadc_writel(adc_dev, REG_IRQCLR, IRQENB_FIFO1THRES);  in tiadc_irq_h()
194 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_worker_h()  local
196 	u16 *data = adc_dev->data;  in tiadc_worker_h()
198 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);  in tiadc_worker_h()
201 			read = tiadc_readl(adc_dev, REG_FIFO1);  in tiadc_worker_h()
207 	tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES);  in tiadc_worker_h()
208 	tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES);  in tiadc_worker_h()
216 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_dma_rx_complete()  local
217 	struct tiadc_dma *dma = &adc_dev->dma;  in tiadc_dma_rx_complete()
232 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_start_dma()  local
233 	struct tiadc_dma *dma = &adc_dev->dma;  in tiadc_start_dma()
246 				     adc_dev->total_ch_enabled) - 1;  in tiadc_start_dma()
269 	tiadc_writel(adc_dev, REG_FIFO1THR, dma->fifo_thresh);  in tiadc_start_dma()
270 	tiadc_writel(adc_dev, REG_DMA1REQ, dma->fifo_thresh);  in tiadc_start_dma()
271 	tiadc_writel(adc_dev, REG_DMAENABLE_SET, DMA_FIFO1);  in tiadc_start_dma()
278 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_buffer_preenable()  local
282 	ret = tiadc_wait_idle(adc_dev);  in tiadc_buffer_preenable()
286 	tiadc_writel(adc_dev, REG_IRQCLR,  in tiadc_buffer_preenable()
291 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);  in tiadc_buffer_preenable()
293 		tiadc_readl(adc_dev, REG_FIFO1);  in tiadc_buffer_preenable()
300 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_buffer_postenable()  local
301 	struct tiadc_dma *dma = &adc_dev->dma;  in tiadc_buffer_postenable()
307 	for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels) {  in tiadc_buffer_postenable()
308 		enb |= (get_adc_step_bit(adc_dev, bit) << 1);  in tiadc_buffer_postenable()
309 		adc_dev->total_ch_enabled++;  in tiadc_buffer_postenable()
311 	adc_dev->buffer_en_ch_steps = enb;  in tiadc_buffer_postenable()
316 	am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);  in tiadc_buffer_postenable()
318 	tiadc_writel(adc_dev, REG_IRQSTATUS,  in tiadc_buffer_postenable()
325 	tiadc_writel(adc_dev,  REG_IRQENABLE, irq_enable);  in tiadc_buffer_postenable()
332 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_buffer_predisable()  local
333 	struct tiadc_dma *dma = &adc_dev->dma;  in tiadc_buffer_predisable()
336 	tiadc_writel(adc_dev, REG_IRQCLR,  in tiadc_buffer_predisable()
339 	am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);  in tiadc_buffer_predisable()
340 	adc_dev->buffer_en_ch_steps = 0;  in tiadc_buffer_predisable()
341 	adc_dev->total_ch_enabled = 0;  in tiadc_buffer_predisable()
343 		tiadc_writel(adc_dev, REG_DMAENABLE_CLEAR, 0x2);  in tiadc_buffer_predisable()
348 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);  in tiadc_buffer_predisable()
350 		tiadc_readl(adc_dev, REG_FIFO1);  in tiadc_buffer_predisable()
400 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_channel_init()  local
415 		chan->channel = adc_dev->channel_line[i];  in tiadc_channel_init()
434 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_read_raw()  local
462 	step_en = get_adc_chan_step_mask(adc_dev, chan);  in tiadc_read_raw()
466 	mutex_lock(&adc_dev->fifo1_lock);  in tiadc_read_raw()
468 	ret = tiadc_wait_idle(adc_dev);  in tiadc_read_raw()
472 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);  in tiadc_read_raw()
474 		tiadc_readl(adc_dev, REG_FIFO1);  in tiadc_read_raw()
476 	am335x_tsc_se_set_once(adc_dev->mfd_tscadc, step_en);  in tiadc_read_raw()
479 	timeout = jiffies + msecs_to_jiffies(IDLE_TIMEOUT_MS * adc_dev->channels);  in tiadc_read_raw()
481 		fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);  in tiadc_read_raw()
486 			am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);  in tiadc_read_raw()
492 	map_val = adc_dev->channel_step[chan->scan_index];  in tiadc_read_raw()
502 		read = tiadc_readl(adc_dev, REG_FIFO1);  in tiadc_read_raw()
513 	am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);  in tiadc_read_raw()
519 	mutex_unlock(&adc_dev->fifo1_lock);  in tiadc_read_raw()
528 			     struct tiadc_device *adc_dev)  in tiadc_request_dma()  argument
530 	struct tiadc_dma	*dma = &adc_dev->dma;  in tiadc_request_dma()
536 	dma->conf.src_addr = adc_dev->mfd_tscadc->tscadc_phys_base + REG_FIFO1;  in tiadc_request_dma()
542 	dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1");  in tiadc_request_dma()
564 			  struct tiadc_device *adc_dev)  in tiadc_parse_dt()  argument
574 		adc_dev->channel_line[channels] = val;  in tiadc_parse_dt()
577 		adc_dev->open_delay[channels] = STEPCONFIG_OPENDLY;  in tiadc_parse_dt()
578 		adc_dev->sample_delay[channels] = STEPCONFIG_SAMPLEDLY;  in tiadc_parse_dt()
579 		adc_dev->step_avg[channels] = 16;  in tiadc_parse_dt()
584 	adc_dev->channels = channels;  in tiadc_parse_dt()
587 				   adc_dev->step_avg, channels);  in tiadc_parse_dt()
589 				   adc_dev->open_delay, channels);  in tiadc_parse_dt()
591 				   adc_dev->sample_delay, channels);  in tiadc_parse_dt()
593 	for (i = 0; i < adc_dev->channels; i++) {  in tiadc_parse_dt()
596 		chan = adc_dev->channel_line[i];  in tiadc_parse_dt()
598 		if (adc_dev->step_avg[i] > STEPCONFIG_AVG_16) {  in tiadc_parse_dt()
602 			adc_dev->step_avg[i] = STEPCONFIG_AVG_16;  in tiadc_parse_dt()
605 		if (adc_dev->open_delay[i] > STEPCONFIG_MAX_OPENDLY) {  in tiadc_parse_dt()
609 			adc_dev->open_delay[i] = STEPCONFIG_MAX_OPENDLY;  in tiadc_parse_dt()
612 		if (adc_dev->sample_delay[i] > STEPCONFIG_MAX_SAMPLE) {  in tiadc_parse_dt()
616 			adc_dev->sample_delay[i] = STEPCONFIG_MAX_SAMPLE;  in tiadc_parse_dt()
626 	struct tiadc_device	*adc_dev;  in tiadc_probe()  local
635 	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc_dev));  in tiadc_probe()
640 	adc_dev = iio_priv(indio_dev);  in tiadc_probe()
642 	adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev);  in tiadc_probe()
643 	tiadc_parse_dt(pdev, adc_dev);  in tiadc_probe()
650 	tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD);  in tiadc_probe()
651 	mutex_init(&adc_dev->fifo1_lock);  in tiadc_probe()
653 	err = tiadc_channel_init(&pdev->dev, indio_dev, adc_dev->channels);  in tiadc_probe()
660 						adc_dev->mfd_tscadc->irq,  in tiadc_probe()
672 	err = tiadc_request_dma(pdev, adc_dev);  in tiadc_probe()
687 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_remove()  local
688 	struct tiadc_dma *dma = &adc_dev->dma;  in tiadc_remove()
698 	step_en = get_adc_step_mask(adc_dev);  in tiadc_remove()
699 	am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);  in tiadc_remove()
707 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_suspend()  local
710 	idle = tiadc_readl(adc_dev, REG_CTRL);  in tiadc_suspend()
712 	tiadc_writel(adc_dev, REG_CTRL, idle | CNTRLREG_POWERDOWN);  in tiadc_suspend()
720 	struct tiadc_device *adc_dev = iio_priv(indio_dev);  in tiadc_resume()  local
724 	restore = tiadc_readl(adc_dev, REG_CTRL);  in tiadc_resume()
726 	tiadc_writel(adc_dev, REG_CTRL, restore);  in tiadc_resume()
729 	am335x_tsc_se_set_cache(adc_dev->mfd_tscadc,  in tiadc_resume()
730 				adc_dev->buffer_en_ch_steps);  in tiadc_resume()