Lines Matching +full:rx +full:- +full:level +full:- +full:trig
1 // SPDX-License-Identifier: GPL-2.0
23 * The PENIRQ of TSC2046 controller is implemented as level shifter attached to
24 * the X+ line. If voltage of the X+ line reaches a specific level the IRQ will
28 * - rate limiting:
30 * - hrtimer:
60 * conversion has 12-bit resolution, whereas with this bit high, the next
61 * conversion has 8-bit resolution. This driver is optimized for 12-bit mode.
67 * SER/DFR - The SER/DFR bit controls the reference mode, either single-ended
74 * auto-wake/suspend mode. In most case this bits should stay zero.
96 * Command transmitted to the controller. This field is empty on the RX
109 /* Group offset within the SPI RX buffer */
146 struct iio_trigger *trig; member
165 * in this case the l[] and tx/rx buffer will be out of sync to each
170 struct tsc2046_adc_atom *rx; member
230 bit_count = DIV_ROUND_UP(time * NSEC_PER_USEC, priv->time_per_bit_ns); in tsc2046_adc_time_to_count()
233 …dev_dbg(&priv->spi->dev, "Effective speed %u, time per bit: %u, count bits: %u, count samples: %u\… in tsc2046_adc_time_to_count()
234 priv->effective_speed_hz, priv->time_per_bit_ns, in tsc2046_adc_time_to_count()
260 if (!priv->vref_reg) in tsc2046_adc_get_cmd()
269 return FIELD_GET(TI_TSC2046_DATA_12BIT, get_unaligned_be16(&buf->data)); in tsc2046_adc_get_value()
275 struct tsc2046_adc_ch_cfg *ch = &priv->ch_cfg[ch_idx]; in tsc2046_adc_read_one()
284 count_skip = tsc2046_adc_time_to_count(priv, ch->settling_time_us); in tsc2046_adc_read_one()
285 max_count = count_skip + ch->oversampling_ratio; in tsc2046_adc_read_one()
291 return -ENOSPC; in tsc2046_adc_read_one()
295 return -ENOMEM; in tsc2046_adc_read_one()
299 ret = -ENOMEM; in tsc2046_adc_read_one()
309 for (i = 0; i < max_count - 1; i++) in tsc2046_adc_read_one()
325 ret = spi_sync(priv->spi, &msg); in tsc2046_adc_read_one()
327 dev_err_ratelimited(&priv->spi->dev, "SPI transfer failed %pe\n", in tsc2046_adc_read_one()
335 for (i = 0; i < max_count - count_skip; i++) { in tsc2046_adc_read_one()
340 ret = DIV_ROUND_UP(val_normalized, max_count - count_skip); in tsc2046_adc_read_one()
354 struct tsc2046_adc_ch_cfg *ch = &priv->ch_cfg[ch_idx]; in tsc2046_adc_group_set_layout()
360 offset = priv->l[group - 1].offset + priv->l[group - 1].count; in tsc2046_adc_group_set_layout()
362 count_skip = tsc2046_adc_time_to_count(priv, ch->settling_time_us); in tsc2046_adc_group_set_layout()
363 max_count = count_skip + ch->oversampling_ratio; in tsc2046_adc_group_set_layout()
365 cur = &priv->l[group]; in tsc2046_adc_group_set_layout()
366 cur->offset = offset; in tsc2046_adc_group_set_layout()
367 cur->count = max_count; in tsc2046_adc_group_set_layout()
368 cur->skip = count_skip; in tsc2046_adc_group_set_layout()
370 return sizeof(*priv->tx) * max_count; in tsc2046_adc_group_set_layout()
376 struct tsc2046_adc_group_layout *l = &priv->l[group]; in tsc2046_adc_group_set_cmd()
386 for (i = 0; i < l->count - 1; i++) in tsc2046_adc_group_set_cmd()
387 priv->tx[l->offset + i].cmd = cmd; in tsc2046_adc_group_set_cmd()
390 priv->tx[l->offset + i].cmd = tsc2046_adc_get_cmd(priv, ch_idx, false); in tsc2046_adc_group_set_cmd()
399 l = &priv->l[group]; in tsc2046_adc_get_val()
400 valid_count = l->count - l->skip; in tsc2046_adc_get_val()
403 val = tsc2046_adc_get_value(&priv->rx[l->offset + l->skip + i]); in tsc2046_adc_get_val()
413 struct device *dev = &priv->spi->dev; in tsc2046_adc_scan()
417 ret = spi_sync(priv->spi, &priv->msg); in tsc2046_adc_scan()
423 for (group = 0; group < priv->groups; group++) in tsc2046_adc_scan()
424 priv->scan_buf.data[group] = tsc2046_adc_get_val(priv, group); in tsc2046_adc_scan()
426 ret = iio_push_to_buffers_with_timestamp(indio_dev, &priv->scan_buf, in tsc2046_adc_scan()
428 /* If the consumer is kfifo, we may get a EBUSY here - ignore it. */ in tsc2046_adc_scan()
429 if (ret < 0 && ret != -EBUSY) { in tsc2046_adc_scan()
442 struct iio_dev *indio_dev = pf->indio_dev; in tsc2046_adc_trigger_handler()
445 mutex_lock(&priv->slock); in tsc2046_adc_trigger_handler()
447 mutex_unlock(&priv->slock); in tsc2046_adc_trigger_handler()
449 iio_trigger_notify_done(indio_dev->trig); in tsc2046_adc_trigger_handler()
463 ret = tsc2046_adc_read_one(priv, chan->channel, NULL); in tsc2046_adc_read_raw()
474 * So, it is better to use external voltage-divider driver in tsc2046_adc_read_raw()
477 *val = priv->vref_mv; in tsc2046_adc_read_raw()
478 *val2 = chan->scan_type.realbits; in tsc2046_adc_read_raw()
482 return -EINVAL; in tsc2046_adc_read_raw()
492 mutex_lock(&priv->slock); in tsc2046_adc_update_scan_mode()
495 for_each_set_bit(ch_idx, active_scan_mask, ARRAY_SIZE(priv->l)) { in tsc2046_adc_update_scan_mode()
501 priv->groups = group; in tsc2046_adc_update_scan_mode()
502 priv->xfer.len = size; in tsc2046_adc_update_scan_mode()
503 priv->time_per_scan_us = size * 8 * priv->time_per_bit_ns / NSEC_PER_USEC; in tsc2046_adc_update_scan_mode()
505 if (priv->scan_interval_us < priv->time_per_scan_us) in tsc2046_adc_update_scan_mode()
506 dev_warn(&priv->spi->dev, "The scan interval (%d) is less then calculated scan time (%d)\n", in tsc2046_adc_update_scan_mode()
507 priv->scan_interval_us, priv->time_per_scan_us); in tsc2046_adc_update_scan_mode()
509 mutex_unlock(&priv->slock); in tsc2046_adc_update_scan_mode()
528 * - the interrupt source is based on level shifter attached to the X in tsc2046_adc_timer()
532 * - we should do iio_trigger_poll() at some reduced sample rate in tsc2046_adc_timer()
533 * - we should still trigger for some amount of time after last in tsc2046_adc_timer()
537 spin_lock_irqsave(&priv->state_lock, flags); in tsc2046_adc_timer()
538 switch (priv->state) { in tsc2046_adc_timer()
540 if (priv->poll_cnt < TI_TSC2046_POLL_CNT) { in tsc2046_adc_timer()
541 priv->poll_cnt++; in tsc2046_adc_timer()
542 hrtimer_start(&priv->trig_timer, in tsc2046_adc_timer()
543 ns_to_ktime(priv->scan_interval_us * in tsc2046_adc_timer()
547 if (priv->poll_cnt >= TI_TSC2046_MIN_POLL_CNT) { in tsc2046_adc_timer()
548 priv->state = TSC2046_STATE_POLL_IRQ_DISABLE; in tsc2046_adc_timer()
549 enable_irq(priv->spi->irq); in tsc2046_adc_timer()
551 priv->state = TSC2046_STATE_POLL; in tsc2046_adc_timer()
554 priv->state = TSC2046_STATE_STANDBY; in tsc2046_adc_timer()
555 enable_irq(priv->spi->irq); in tsc2046_adc_timer()
559 disable_irq_nosync(priv->spi->irq); in tsc2046_adc_timer()
562 priv->state = TSC2046_STATE_ENABLE_IRQ; in tsc2046_adc_timer()
564 iio_trigger_poll(priv->trig); in tsc2046_adc_timer()
571 dev_warn(&priv->spi->dev, "Got unexpected state: %i\n", in tsc2046_adc_timer()
572 priv->state); in tsc2046_adc_timer()
575 spin_unlock_irqrestore(&priv->state_lock, flags); in tsc2046_adc_timer()
586 hrtimer_try_to_cancel(&priv->trig_timer); in tsc2046_adc_irq()
588 spin_lock_irqsave(&priv->state_lock, flags); in tsc2046_adc_irq()
589 if (priv->state != TSC2046_STATE_SHUTDOWN) { in tsc2046_adc_irq()
590 priv->state = TSC2046_STATE_ENABLE_IRQ; in tsc2046_adc_irq()
591 priv->poll_cnt = 0; in tsc2046_adc_irq()
594 disable_irq_nosync(priv->spi->irq); in tsc2046_adc_irq()
595 iio_trigger_poll(priv->trig); in tsc2046_adc_irq()
597 spin_unlock_irqrestore(&priv->state_lock, flags); in tsc2046_adc_irq()
602 static void tsc2046_adc_reenable_trigger(struct iio_trigger *trig) in tsc2046_adc_reenable_trigger() argument
604 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); in tsc2046_adc_reenable_trigger()
613 tim = ns_to_ktime((priv->scan_interval_us - priv->time_per_scan_us) * in tsc2046_adc_reenable_trigger()
615 hrtimer_start(&priv->trig_timer, tim, HRTIMER_MODE_REL_SOFT); in tsc2046_adc_reenable_trigger()
618 static int tsc2046_adc_set_trigger_state(struct iio_trigger *trig, bool enable) in tsc2046_adc_set_trigger_state() argument
620 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); in tsc2046_adc_set_trigger_state()
625 spin_lock_irqsave(&priv->state_lock, flags); in tsc2046_adc_set_trigger_state()
626 if (priv->state == TSC2046_STATE_SHUTDOWN) { in tsc2046_adc_set_trigger_state()
627 priv->state = TSC2046_STATE_STANDBY; in tsc2046_adc_set_trigger_state()
628 enable_irq(priv->spi->irq); in tsc2046_adc_set_trigger_state()
630 spin_unlock_irqrestore(&priv->state_lock, flags); in tsc2046_adc_set_trigger_state()
632 spin_lock_irqsave(&priv->state_lock, flags); in tsc2046_adc_set_trigger_state()
634 if (priv->state == TSC2046_STATE_STANDBY || in tsc2046_adc_set_trigger_state()
635 priv->state == TSC2046_STATE_POLL_IRQ_DISABLE) in tsc2046_adc_set_trigger_state()
636 disable_irq_nosync(priv->spi->irq); in tsc2046_adc_set_trigger_state()
638 priv->state = TSC2046_STATE_SHUTDOWN; in tsc2046_adc_set_trigger_state()
639 spin_unlock_irqrestore(&priv->state_lock, flags); in tsc2046_adc_set_trigger_state()
641 hrtimer_cancel(&priv->trig_timer); in tsc2046_adc_set_trigger_state()
664 &priv->effective_speed_hz); in tsc2046_adc_setup_spi_msg()
672 if (!priv->effective_speed_hz) in tsc2046_adc_setup_spi_msg()
673 priv->effective_speed_hz = priv->spi->max_speed_hz; in tsc2046_adc_setup_spi_msg()
676 priv->scan_interval_us = TI_TSC2046_SAMPLE_INTERVAL_US; in tsc2046_adc_setup_spi_msg()
677 priv->time_per_bit_ns = DIV_ROUND_UP(NSEC_PER_SEC, in tsc2046_adc_setup_spi_msg()
678 priv->effective_speed_hz); in tsc2046_adc_setup_spi_msg()
685 for (ch_idx = 0; ch_idx < ARRAY_SIZE(priv->l); ch_idx++) in tsc2046_adc_setup_spi_msg()
689 dev_err(&priv->spi->dev, in tsc2046_adc_setup_spi_msg()
690 …Calculated scan buffer is too big. Try to reduce spi-max-frequency, settling-time-us or oversampli… in tsc2046_adc_setup_spi_msg()
691 return -ENOSPC; in tsc2046_adc_setup_spi_msg()
694 priv->tx = devm_kzalloc(&priv->spi->dev, size, GFP_KERNEL); in tsc2046_adc_setup_spi_msg()
695 if (!priv->tx) in tsc2046_adc_setup_spi_msg()
696 return -ENOMEM; in tsc2046_adc_setup_spi_msg()
698 priv->rx = devm_kzalloc(&priv->spi->dev, size, GFP_KERNEL); in tsc2046_adc_setup_spi_msg()
699 if (!priv->rx) in tsc2046_adc_setup_spi_msg()
700 return -ENOMEM; in tsc2046_adc_setup_spi_msg()
702 priv->xfer.tx_buf = priv->tx; in tsc2046_adc_setup_spi_msg()
703 priv->xfer.rx_buf = priv->rx; in tsc2046_adc_setup_spi_msg()
704 priv->xfer.len = size; in tsc2046_adc_setup_spi_msg()
705 spi_message_init_with_transfers(&priv->msg, &priv->xfer, 1); in tsc2046_adc_setup_spi_msg()
713 struct device *dev = &priv->spi->dev; in tsc2046_adc_parse_fwnode()
716 for (i = 0; i < ARRAY_SIZE(priv->ch_cfg); i++) { in tsc2046_adc_parse_fwnode()
717 priv->ch_cfg[i].settling_time_us = 1; in tsc2046_adc_parse_fwnode()
718 priv->ch_cfg[i].oversampling_ratio = 1; in tsc2046_adc_parse_fwnode()
732 if (reg >= ARRAY_SIZE(priv->ch_cfg)) { in tsc2046_adc_parse_fwnode()
734 child, reg, ARRAY_SIZE(priv->ch_cfg)); in tsc2046_adc_parse_fwnode()
738 ret = fwnode_property_read_u32(child, "settling-time-us", &stl); in tsc2046_adc_parse_fwnode()
740 priv->ch_cfg[reg].settling_time_us = stl; in tsc2046_adc_parse_fwnode()
742 ret = fwnode_property_read_u32(child, "oversampling-ratio", in tsc2046_adc_parse_fwnode()
745 priv->ch_cfg[reg].oversampling_ratio = overs; in tsc2046_adc_parse_fwnode()
753 regulator_disable(priv->vref_reg); in tsc2046_adc_regulator_disable()
758 struct device *dev = &priv->spi->dev; in tsc2046_adc_configure_regulator()
761 priv->vref_reg = devm_regulator_get_optional(dev, "vref"); in tsc2046_adc_configure_regulator()
762 if (IS_ERR(priv->vref_reg)) { in tsc2046_adc_configure_regulator()
764 if (PTR_ERR(priv->vref_reg) != -ENODEV) in tsc2046_adc_configure_regulator()
765 return PTR_ERR(priv->vref_reg); in tsc2046_adc_configure_regulator()
766 priv->vref_reg = NULL; in tsc2046_adc_configure_regulator()
768 if (!priv->vref_reg) { in tsc2046_adc_configure_regulator()
770 priv->vref_mv = TI_TSC2046_INT_VREF; in tsc2046_adc_configure_regulator()
774 ret = regulator_enable(priv->vref_reg); in tsc2046_adc_configure_regulator()
783 ret = regulator_get_voltage(priv->vref_reg); in tsc2046_adc_configure_regulator()
787 priv->vref_mv = ret / MILLI; in tsc2046_adc_configure_regulator()
795 struct device *dev = &spi->dev; in tsc2046_adc_probe()
798 struct iio_trigger *trig; in tsc2046_adc_probe() local
801 if (spi->max_speed_hz > TI_TSC2046_MAX_CLK_FREQ) { in tsc2046_adc_probe()
803 spi->max_speed_hz, TI_TSC2046_MAX_CLK_FREQ); in tsc2046_adc_probe()
804 return -EINVAL; in tsc2046_adc_probe()
811 dcfg = (const struct tsc2046_adc_dcfg *)id->driver_data; in tsc2046_adc_probe()
814 return -EINVAL; in tsc2046_adc_probe()
816 spi->bits_per_word = 8; in tsc2046_adc_probe()
817 spi->mode &= ~SPI_MODE_X_MASK; in tsc2046_adc_probe()
818 spi->mode |= SPI_MODE_0; in tsc2046_adc_probe()
825 return -ENOMEM; in tsc2046_adc_probe()
828 priv->dcfg = dcfg; in tsc2046_adc_probe()
830 priv->spi = spi; in tsc2046_adc_probe()
832 indio_dev->name = TI_TSC2046_NAME; in tsc2046_adc_probe()
833 indio_dev->modes = INDIO_DIRECT_MODE; in tsc2046_adc_probe()
834 indio_dev->channels = dcfg->channels; in tsc2046_adc_probe()
835 indio_dev->num_channels = dcfg->num_channels; in tsc2046_adc_probe()
836 indio_dev->info = &tsc2046_adc_info; in tsc2046_adc_probe()
848 mutex_init(&priv->slock); in tsc2046_adc_probe()
850 ret = devm_request_irq(dev, spi->irq, &tsc2046_adc_irq, in tsc2046_adc_probe()
851 IRQF_NO_AUTOEN, indio_dev->name, indio_dev); in tsc2046_adc_probe()
855 trig = devm_iio_trigger_alloc(dev, "touchscreen-%s", indio_dev->name); in tsc2046_adc_probe()
856 if (!trig) in tsc2046_adc_probe()
857 return -ENOMEM; in tsc2046_adc_probe()
859 priv->trig = trig; in tsc2046_adc_probe()
860 iio_trigger_set_drvdata(trig, indio_dev); in tsc2046_adc_probe()
861 trig->ops = &tsc2046_adc_trigger_ops; in tsc2046_adc_probe()
863 spin_lock_init(&priv->state_lock); in tsc2046_adc_probe()
864 priv->state = TSC2046_STATE_SHUTDOWN; in tsc2046_adc_probe()
865 hrtimer_init(&priv->trig_timer, CLOCK_MONOTONIC, in tsc2046_adc_probe()
867 priv->trig_timer.function = tsc2046_adc_timer; in tsc2046_adc_probe()
869 ret = devm_iio_trigger_register(dev, trig); in tsc2046_adc_probe()
883 indio_dev->trig = iio_trigger_get(priv->trig); in tsc2046_adc_probe()
889 { .compatible = "ti,tsc2046e-adc", .data = &tsc2046_adc_dcfg_tsc2046e },
895 { "tsc2046e-adc", (unsigned long)&tsc2046_adc_dcfg_tsc2046e },