Lines Matching refs:MMA8452_INT_DRDY
91 #define MMA8452_INT_DRDY BIT(0) macro
1066 if (!(src & (data->chip_info->enabled_events | MMA8452_INT_DRDY))) in mma8452_interrupt()
1069 if (src & MMA8452_INT_DRDY) { in mma8452_interrupt()
1341 .all_events = MMA8452_INT_DRDY |
1358 .all_events = MMA8452_INT_DRDY |
1375 .all_events = MMA8452_INT_DRDY |
1387 .all_events = MMA8452_INT_DRDY |
1402 .all_events = MMA8452_INT_DRDY |
1417 .all_events = MMA8452_INT_DRDY |
1467 reg |= MMA8452_INT_DRDY; in mma8452_data_rdy_trigger_set_state()
1469 reg &= ~MMA8452_INT_DRDY; in mma8452_data_rdy_trigger_set_state()