Lines Matching full:i2c
2 /* linux/drivers/i2c/busses/i2c-s3c2410.c
7 * S3C2410 I2C Controller
13 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-s3c2410.h>
86 /* i2c controller state */
124 .name = "s3c2410-i2c",
127 .name = "s3c2440-i2c",
130 .name = "s3c2440-hdmiphy-i2c",
136 static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat);
140 { .compatible = "samsung,s3c2410-i2c", .data = (void *)0 },
141 { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 },
142 { .compatible = "samsung,s3c2440-hdmiphy-i2c",
144 { .compatible = "samsung,exynos5-sata-phy-i2c",
166 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret) in s3c24xx_i2c_master_complete() argument
168 dev_dbg(i2c->dev, "master_complete %d\n", ret); in s3c24xx_i2c_master_complete()
170 i2c->msg_ptr = 0; in s3c24xx_i2c_master_complete()
171 i2c->msg = NULL; in s3c24xx_i2c_master_complete()
172 i2c->msg_idx++; in s3c24xx_i2c_master_complete()
173 i2c->msg_num = 0; in s3c24xx_i2c_master_complete()
175 i2c->msg_idx = ret; in s3c24xx_i2c_master_complete()
177 if (!(i2c->quirks & QUIRK_POLL)) in s3c24xx_i2c_master_complete()
178 wake_up(&i2c->wait); in s3c24xx_i2c_master_complete()
181 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_disable_ack() argument
185 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_ack()
186 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_ack()
189 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_enable_ack() argument
193 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_ack()
194 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_ack()
198 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_disable_irq() argument
202 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_irq()
203 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_irq()
206 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_enable_irq() argument
210 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_irq()
211 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_irq()
214 static bool is_ack(struct s3c24xx_i2c *i2c) in is_ack() argument
219 if (readl(i2c->regs + S3C2410_IICCON) in is_ack()
221 if (!(readl(i2c->regs + S3C2410_IICSTAT) in is_ack()
227 dev_err(i2c->dev, "ack was not received\n"); in is_ack()
234 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c, in s3c24xx_i2c_message_start() argument
254 s3c24xx_i2c_enable_ack(i2c); in s3c24xx_i2c_message_start()
256 iiccon = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_message_start()
257 writel(stat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
259 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr); in s3c24xx_i2c_message_start()
260 writeb(addr, i2c->regs + S3C2410_IICDS); in s3c24xx_i2c_message_start()
266 ndelay(i2c->tx_setup); in s3c24xx_i2c_message_start()
268 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon); in s3c24xx_i2c_message_start()
269 writel(iiccon, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_message_start()
272 writel(stat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
274 if (i2c->quirks & QUIRK_POLL) { in s3c24xx_i2c_message_start()
275 while ((i2c->msg_num != 0) && is_ack(i2c)) { in s3c24xx_i2c_message_start()
276 i2c_s3c_irq_nextbyte(i2c, stat); in s3c24xx_i2c_message_start()
277 stat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
280 dev_err(i2c->dev, "deal with arbitration loss\n"); in s3c24xx_i2c_message_start()
285 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret) in s3c24xx_i2c_stop() argument
287 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_stop()
289 dev_dbg(i2c->dev, "STOP\n"); in s3c24xx_i2c_stop()
325 if (i2c->quirks & QUIRK_HDMIPHY) { in s3c24xx_i2c_stop()
326 /* Stop driving the I2C pins */ in s3c24xx_i2c_stop()
332 writel(iicstat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_stop()
334 i2c->state = STATE_STOP; in s3c24xx_i2c_stop()
336 s3c24xx_i2c_master_complete(i2c, ret); in s3c24xx_i2c_stop()
337 s3c24xx_i2c_disable_irq(i2c); in s3c24xx_i2c_stop()
348 static inline int is_lastmsg(struct s3c24xx_i2c *i2c) in is_lastmsg() argument
350 return i2c->msg_idx >= (i2c->msg_num - 1); in is_lastmsg()
356 static inline int is_msglast(struct s3c24xx_i2c *i2c) in is_msglast() argument
363 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1) in is_msglast()
366 return i2c->msg_ptr == i2c->msg->len-1; in is_msglast()
372 static inline int is_msgend(struct s3c24xx_i2c *i2c) in is_msgend() argument
374 return i2c->msg_ptr >= i2c->msg->len; in is_msgend()
380 static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) in i2c_s3c_irq_nextbyte() argument
386 switch (i2c->state) { in i2c_s3c_irq_nextbyte()
389 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__); in i2c_s3c_irq_nextbyte()
393 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__); in i2c_s3c_irq_nextbyte()
394 s3c24xx_i2c_disable_irq(i2c); in i2c_s3c_irq_nextbyte()
400 * bus, or started a new i2c message in i2c_s3c_irq_nextbyte()
403 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) { in i2c_s3c_irq_nextbyte()
405 dev_dbg(i2c->dev, "ack was not received\n"); in i2c_s3c_irq_nextbyte()
406 s3c24xx_i2c_stop(i2c, -ENXIO); in i2c_s3c_irq_nextbyte()
410 if (i2c->msg->flags & I2C_M_RD) in i2c_s3c_irq_nextbyte()
411 i2c->state = STATE_READ; in i2c_s3c_irq_nextbyte()
413 i2c->state = STATE_WRITE; in i2c_s3c_irq_nextbyte()
417 * as this is used by the i2c probe to find devices. in i2c_s3c_irq_nextbyte()
419 if (is_lastmsg(i2c) && i2c->msg->len == 0) { in i2c_s3c_irq_nextbyte()
420 s3c24xx_i2c_stop(i2c, 0); in i2c_s3c_irq_nextbyte()
424 if (i2c->state == STATE_READ) in i2c_s3c_irq_nextbyte()
437 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) { in i2c_s3c_irq_nextbyte()
439 dev_dbg(i2c->dev, "WRITE: No Ack\n"); in i2c_s3c_irq_nextbyte()
441 s3c24xx_i2c_stop(i2c, -ECONNREFUSED); in i2c_s3c_irq_nextbyte()
448 if (!is_msgend(i2c)) { in i2c_s3c_irq_nextbyte()
449 byte = i2c->msg->buf[i2c->msg_ptr++]; in i2c_s3c_irq_nextbyte()
450 writeb(byte, i2c->regs + S3C2410_IICDS); in i2c_s3c_irq_nextbyte()
459 ndelay(i2c->tx_setup); in i2c_s3c_irq_nextbyte()
461 } else if (!is_lastmsg(i2c)) { in i2c_s3c_irq_nextbyte()
462 /* we need to go to the next i2c message */ in i2c_s3c_irq_nextbyte()
464 dev_dbg(i2c->dev, "WRITE: Next Message\n"); in i2c_s3c_irq_nextbyte()
466 i2c->msg_ptr = 0; in i2c_s3c_irq_nextbyte()
467 i2c->msg_idx++; in i2c_s3c_irq_nextbyte()
468 i2c->msg++; in i2c_s3c_irq_nextbyte()
471 if (i2c->msg->flags & I2C_M_NOSTART) { in i2c_s3c_irq_nextbyte()
473 if (i2c->msg->flags & I2C_M_RD) { in i2c_s3c_irq_nextbyte()
479 dev_dbg(i2c->dev, in i2c_s3c_irq_nextbyte()
481 s3c24xx_i2c_stop(i2c, -EINVAL); in i2c_s3c_irq_nextbyte()
488 s3c24xx_i2c_message_start(i2c, i2c->msg); in i2c_s3c_irq_nextbyte()
489 i2c->state = STATE_START; in i2c_s3c_irq_nextbyte()
494 s3c24xx_i2c_stop(i2c, 0); in i2c_s3c_irq_nextbyte()
504 byte = readb(i2c->regs + S3C2410_IICDS); in i2c_s3c_irq_nextbyte()
505 i2c->msg->buf[i2c->msg_ptr++] = byte; in i2c_s3c_irq_nextbyte()
508 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1) in i2c_s3c_irq_nextbyte()
509 i2c->msg->len += byte; in i2c_s3c_irq_nextbyte()
511 if (is_msglast(i2c)) { in i2c_s3c_irq_nextbyte()
514 if (is_lastmsg(i2c)) in i2c_s3c_irq_nextbyte()
515 s3c24xx_i2c_disable_ack(i2c); in i2c_s3c_irq_nextbyte()
517 } else if (is_msgend(i2c)) { in i2c_s3c_irq_nextbyte()
522 if (is_lastmsg(i2c)) { in i2c_s3c_irq_nextbyte()
524 dev_dbg(i2c->dev, "READ: Send Stop\n"); in i2c_s3c_irq_nextbyte()
526 s3c24xx_i2c_stop(i2c, 0); in i2c_s3c_irq_nextbyte()
529 dev_dbg(i2c->dev, "READ: Next Transfer\n"); in i2c_s3c_irq_nextbyte()
531 i2c->msg_ptr = 0; in i2c_s3c_irq_nextbyte()
532 i2c->msg_idx++; in i2c_s3c_irq_nextbyte()
533 i2c->msg++; in i2c_s3c_irq_nextbyte()
543 tmp = readl(i2c->regs + S3C2410_IICCON); in i2c_s3c_irq_nextbyte()
545 writel(tmp, i2c->regs + S3C2410_IICCON); in i2c_s3c_irq_nextbyte()
555 struct s3c24xx_i2c *i2c = dev_id; in s3c24xx_i2c_irq() local
559 status = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_irq()
563 dev_err(i2c->dev, "deal with arbitration loss\n"); in s3c24xx_i2c_irq()
566 if (i2c->state == STATE_IDLE) { in s3c24xx_i2c_irq()
567 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n"); in s3c24xx_i2c_irq()
569 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_irq()
571 writel(tmp, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_irq()
579 i2c_s3c_irq_nextbyte(i2c, status); in s3c24xx_i2c_irq()
591 * kernel boot time, we may not notice the event and the I2C controller
592 * will lock the bus with the I2C clock line low indefinitely.
594 static inline void s3c24xx_i2c_disable_bus(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_disable_bus() argument
598 /* Stop driving the I2C pins */ in s3c24xx_i2c_disable_bus()
599 tmp = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_disable_bus()
601 writel(tmp, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_disable_bus()
604 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_bus()
607 writel(tmp, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_bus()
612 * get the i2c bus for a master transaction
614 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_set_master() argument
620 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_set_master()
632 * wait for the i2c bus to become idle.
634 static void s3c24xx_i2c_wait_idle(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_wait_idle() argument
643 dev_dbg(i2c->dev, "waiting for bus idle\n"); in s3c24xx_i2c_wait_idle()
649 * end of a transaction. However, really slow i2c devices can stretch in s3c24xx_i2c_wait_idle()
656 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
659 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
676 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
680 dev_warn(i2c->dev, "timeout waiting for bus idle\n"); in s3c24xx_i2c_wait_idle()
684 * this starts an i2c transfer
686 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, in s3c24xx_i2c_doxfer() argument
692 ret = s3c24xx_i2c_set_master(i2c); in s3c24xx_i2c_doxfer()
694 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret); in s3c24xx_i2c_doxfer()
699 i2c->msg = msgs; in s3c24xx_i2c_doxfer()
700 i2c->msg_num = num; in s3c24xx_i2c_doxfer()
701 i2c->msg_ptr = 0; in s3c24xx_i2c_doxfer()
702 i2c->msg_idx = 0; in s3c24xx_i2c_doxfer()
703 i2c->state = STATE_START; in s3c24xx_i2c_doxfer()
705 s3c24xx_i2c_enable_irq(i2c); in s3c24xx_i2c_doxfer()
706 s3c24xx_i2c_message_start(i2c, msgs); in s3c24xx_i2c_doxfer()
708 if (i2c->quirks & QUIRK_POLL) { in s3c24xx_i2c_doxfer()
709 ret = i2c->msg_idx; in s3c24xx_i2c_doxfer()
712 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); in s3c24xx_i2c_doxfer()
717 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5); in s3c24xx_i2c_doxfer()
719 ret = i2c->msg_idx; in s3c24xx_i2c_doxfer()
726 dev_dbg(i2c->dev, "timeout\n"); in s3c24xx_i2c_doxfer()
728 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); in s3c24xx_i2c_doxfer()
731 if (i2c->quirks & QUIRK_HDMIPHY) in s3c24xx_i2c_doxfer()
734 s3c24xx_i2c_wait_idle(i2c); in s3c24xx_i2c_doxfer()
736 s3c24xx_i2c_disable_bus(i2c); in s3c24xx_i2c_doxfer()
739 i2c->state = STATE_IDLE; in s3c24xx_i2c_doxfer()
745 * first port of call from the i2c bus code when an message needs
746 * transferring across the i2c bus.
751 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data; in s3c24xx_i2c_xfer() local
755 ret = clk_enable(i2c->clk); in s3c24xx_i2c_xfer()
761 ret = s3c24xx_i2c_doxfer(i2c, msgs, num); in s3c24xx_i2c_xfer()
764 clk_disable(i2c->clk); in s3c24xx_i2c_xfer()
768 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry); in s3c24xx_i2c_xfer()
773 clk_disable(i2c->clk); in s3c24xx_i2c_xfer()
777 /* declare our i2c functionality */
784 /* i2c bus registration info */
823 static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got) in s3c24xx_i2c_clockrate() argument
825 struct s3c2410_platform_i2c *pdata = i2c->pdata; in s3c24xx_i2c_clockrate()
826 unsigned long clkin = clk_get_rate(i2c->clk); in s3c24xx_i2c_clockrate()
832 i2c->clkrate = clkin; in s3c24xx_i2c_clockrate()
835 dev_dbg(i2c->dev, "pdata desired frequency %lu\n", pdata->frequency); in s3c24xx_i2c_clockrate()
844 dev_err(i2c->dev, in s3c24xx_i2c_clockrate()
852 iiccon = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_clockrate()
859 if (i2c->quirks & QUIRK_POLL) in s3c24xx_i2c_clockrate()
862 writel(iiccon, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_clockrate()
864 if (i2c->quirks & QUIRK_S3C2440) { in s3c24xx_i2c_clockrate()
877 dev_dbg(i2c->dev, "IICLC=%08lx\n", sda_delay); in s3c24xx_i2c_clockrate()
878 writel(sda_delay, i2c->regs + S3C2440_IICLC); in s3c24xx_i2c_clockrate()
885 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_parse_dt_gpio() argument
889 if (i2c->quirks & QUIRK_NO_GPIO) in s3c24xx_i2c_parse_dt_gpio()
893 i2c->gpios[i] = devm_gpiod_get_index(i2c->dev, NULL, in s3c24xx_i2c_parse_dt_gpio()
895 if (IS_ERR(i2c->gpios[i])) { in s3c24xx_i2c_parse_dt_gpio()
896 dev_err(i2c->dev, "i2c gpio invalid at index %d\n", i); in s3c24xx_i2c_parse_dt_gpio()
904 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_parse_dt_gpio() argument
913 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_init() argument
920 pdata = i2c->pdata; in s3c24xx_i2c_init()
924 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD); in s3c24xx_i2c_init()
926 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr); in s3c24xx_i2c_init()
928 writel(0, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_init()
929 writel(0, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_init()
933 if (s3c24xx_i2c_clockrate(i2c, &freq) != 0) { in s3c24xx_i2c_init()
934 dev_err(i2c->dev, "cannot meet bus frequency required\n"); in s3c24xx_i2c_init()
938 /* todo - check that the i2c lines aren't being dragged anywhere */ in s3c24xx_i2c_init()
940 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq); in s3c24xx_i2c_init()
941 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02x\n", in s3c24xx_i2c_init()
942 readl(i2c->regs + S3C2410_IICCON)); in s3c24xx_i2c_init()
952 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c) in s3c24xx_i2c_parse_dt() argument
954 struct s3c2410_platform_i2c *pdata = i2c->pdata; in s3c24xx_i2c_parse_dt()
960 pdata->bus_num = -1; /* i2c bus number is dynamically assigned */ in s3c24xx_i2c_parse_dt()
961 of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay); in s3c24xx_i2c_parse_dt()
962 of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr); in s3c24xx_i2c_parse_dt()
963 of_property_read_u32(np, "samsung,i2c-max-bus-freq", in s3c24xx_i2c_parse_dt()
966 * Exynos5's legacy i2c controller and new high speed i2c in s3c24xx_i2c_parse_dt()
968 * interrupts for 4-channel HS-I2C controller are enabled. in s3c24xx_i2c_parse_dt()
969 * If nodes for first four channels of legacy i2c controller in s3c24xx_i2c_parse_dt()
973 id = of_alias_get_id(np, "i2c"); in s3c24xx_i2c_parse_dt()
974 i2c->sysreg = syscon_regmap_lookup_by_phandle(np, in s3c24xx_i2c_parse_dt()
976 if (IS_ERR(i2c->sysreg)) in s3c24xx_i2c_parse_dt()
979 regmap_update_bits(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, BIT(id), 0); in s3c24xx_i2c_parse_dt()
983 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c) { } in s3c24xx_i2c_parse_dt() argument
988 struct s3c24xx_i2c *i2c; in s3c24xx_i2c_probe() local
1001 i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL); in s3c24xx_i2c_probe()
1002 if (!i2c) in s3c24xx_i2c_probe()
1005 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); in s3c24xx_i2c_probe()
1006 if (!i2c->pdata) in s3c24xx_i2c_probe()
1009 i2c->quirks = s3c24xx_get_device_quirks(pdev); in s3c24xx_i2c_probe()
1010 i2c->sysreg = ERR_PTR(-ENOENT); in s3c24xx_i2c_probe()
1012 memcpy(i2c->pdata, pdata, sizeof(*pdata)); in s3c24xx_i2c_probe()
1014 s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c); in s3c24xx_i2c_probe()
1016 strscpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name)); in s3c24xx_i2c_probe()
1017 i2c->adap.owner = THIS_MODULE; in s3c24xx_i2c_probe()
1018 i2c->adap.algo = &s3c24xx_i2c_algorithm; in s3c24xx_i2c_probe()
1019 i2c->adap.retries = 2; in s3c24xx_i2c_probe()
1020 i2c->adap.class = I2C_CLASS_DEPRECATED; in s3c24xx_i2c_probe()
1021 i2c->tx_setup = 50; in s3c24xx_i2c_probe()
1023 init_waitqueue_head(&i2c->wait); in s3c24xx_i2c_probe()
1026 i2c->dev = &pdev->dev; in s3c24xx_i2c_probe()
1027 i2c->clk = devm_clk_get(&pdev->dev, "i2c"); in s3c24xx_i2c_probe()
1028 if (IS_ERR(i2c->clk)) { in s3c24xx_i2c_probe()
1033 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk); in s3c24xx_i2c_probe()
1036 i2c->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in s3c24xx_i2c_probe()
1037 if (IS_ERR(i2c->regs)) in s3c24xx_i2c_probe()
1038 return PTR_ERR(i2c->regs); in s3c24xx_i2c_probe()
1041 i2c->regs, res); in s3c24xx_i2c_probe()
1043 /* setup info block for the i2c core */ in s3c24xx_i2c_probe()
1044 i2c->adap.algo_data = i2c; in s3c24xx_i2c_probe()
1045 i2c->adap.dev.parent = &pdev->dev; in s3c24xx_i2c_probe()
1046 i2c->pctrl = devm_pinctrl_get_select_default(i2c->dev); in s3c24xx_i2c_probe()
1048 /* inititalise the i2c gpio lines */ in s3c24xx_i2c_probe()
1049 if (i2c->pdata->cfg_gpio) in s3c24xx_i2c_probe()
1050 i2c->pdata->cfg_gpio(to_platform_device(i2c->dev)); in s3c24xx_i2c_probe()
1051 else if (IS_ERR(i2c->pctrl) && s3c24xx_i2c_parse_dt_gpio(i2c)) in s3c24xx_i2c_probe()
1054 /* initialise the i2c controller */ in s3c24xx_i2c_probe()
1055 ret = clk_prepare_enable(i2c->clk); in s3c24xx_i2c_probe()
1057 dev_err(&pdev->dev, "I2C clock enable failed\n"); in s3c24xx_i2c_probe()
1061 ret = s3c24xx_i2c_init(i2c); in s3c24xx_i2c_probe()
1062 clk_disable(i2c->clk); in s3c24xx_i2c_probe()
1064 dev_err(&pdev->dev, "I2C controller init failed\n"); in s3c24xx_i2c_probe()
1065 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1073 if (!(i2c->quirks & QUIRK_POLL)) { in s3c24xx_i2c_probe()
1074 i2c->irq = ret = platform_get_irq(pdev, 0); in s3c24xx_i2c_probe()
1076 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1080 ret = devm_request_irq(&pdev->dev, i2c->irq, s3c24xx_i2c_irq, in s3c24xx_i2c_probe()
1081 0, dev_name(&pdev->dev), i2c); in s3c24xx_i2c_probe()
1083 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq); in s3c24xx_i2c_probe()
1084 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1095 i2c->adap.nr = i2c->pdata->bus_num; in s3c24xx_i2c_probe()
1096 i2c->adap.dev.of_node = pdev->dev.of_node; in s3c24xx_i2c_probe()
1098 platform_set_drvdata(pdev, i2c); in s3c24xx_i2c_probe()
1102 ret = i2c_add_numbered_adapter(&i2c->adap); in s3c24xx_i2c_probe()
1105 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1109 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev)); in s3c24xx_i2c_probe()
1115 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev); in s3c24xx_i2c_remove() local
1117 clk_unprepare(i2c->clk); in s3c24xx_i2c_remove()
1121 i2c_del_adapter(&i2c->adap); in s3c24xx_i2c_remove()
1126 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev); in s3c24xx_i2c_suspend_noirq() local
1128 i2c_mark_adapter_suspended(&i2c->adap); in s3c24xx_i2c_suspend_noirq()
1130 if (!IS_ERR(i2c->sysreg)) in s3c24xx_i2c_suspend_noirq()
1131 regmap_read(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, &i2c->sys_i2c_cfg); in s3c24xx_i2c_suspend_noirq()
1138 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev); in s3c24xx_i2c_resume_noirq() local
1141 if (!IS_ERR(i2c->sysreg)) in s3c24xx_i2c_resume_noirq()
1142 regmap_write(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, i2c->sys_i2c_cfg); in s3c24xx_i2c_resume_noirq()
1144 ret = clk_enable(i2c->clk); in s3c24xx_i2c_resume_noirq()
1147 s3c24xx_i2c_init(i2c); in s3c24xx_i2c_resume_noirq()
1148 clk_disable(i2c->clk); in s3c24xx_i2c_resume_noirq()
1149 i2c_mark_adapter_resumed(&i2c->adap); in s3c24xx_i2c_resume_noirq()
1164 .name = "s3c-i2c",
1182 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");