Lines Matching +full:rk3188 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for I2C adapter in Rockchip RK3xxx SoC
11 #include <linux/i2c.h>
83 * struct i2c_spec_values - I2C specification values for various modes
87 * @min_setup_start_ns: min set-up time for a repeated START conditio
89 * @min_data_setup_ns: min data set-up time
90 * @min_setup_stop_ns: min set-up time for STOP condition
139 * struct rk3x_i2c_calced_timings - calculated V1 timings
162 * struct rk3x_i2c_soc_data - SOC-specific data
163 * @grf_offset: offset inside the grf regmap for setting the i2c type
164 * @calc_timings: Callback function for i2c timing information calculated
173 * struct rk3x_i2c - private data of the controller
174 * @adap: corresponding I2C adapter
180 * @clk_rate_nb: i2c clk rate change notify
181 * @t: I2C known timing information
182 * @lock: spinlock for the i2c bus
183 * @wait: the waitqueue to wait for i2c transfer
185 * @msg: current i2c message
186 * @addr: addr of i2c slave device
187 * @mode: mode of i2c transfer
189 * @state: state of i2c transfer
191 * @error: error code for i2c transfer
218 /* I2C state machine */
224 static inline void i2c_writel(struct rk3x_i2c *i2c, u32 value, in i2c_writel() argument
227 writel(value, i2c->regs + offset); in i2c_writel()
230 static inline u32 i2c_readl(struct rk3x_i2c *i2c, unsigned int offset) in i2c_readl() argument
232 return readl(i2c->regs + offset); in i2c_readl()
236 static inline void rk3x_i2c_clean_ipd(struct rk3x_i2c *i2c) in rk3x_i2c_clean_ipd() argument
238 i2c_writel(i2c, REG_INT_ALL, REG_IPD); in rk3x_i2c_clean_ipd()
242 * rk3x_i2c_start - Generate a START condition, which triggers a REG_INT_START interrupt.
243 * @i2c: target controller data
245 static void rk3x_i2c_start(struct rk3x_i2c *i2c) in rk3x_i2c_start() argument
247 u32 val = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK; in rk3x_i2c_start()
249 i2c_writel(i2c, REG_INT_START, REG_IEN); in rk3x_i2c_start()
252 val |= REG_CON_EN | REG_CON_MOD(i2c->mode) | REG_CON_START; in rk3x_i2c_start()
255 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) in rk3x_i2c_start()
258 i2c_writel(i2c, val, REG_CON); in rk3x_i2c_start()
262 * rk3x_i2c_stop - Generate a STOP condition, which triggers a REG_INT_STOP interrupt.
263 * @i2c: target controller data
266 static void rk3x_i2c_stop(struct rk3x_i2c *i2c, int error) in rk3x_i2c_stop() argument
270 i2c->processed = 0; in rk3x_i2c_stop()
271 i2c->msg = NULL; in rk3x_i2c_stop()
272 i2c->error = error; in rk3x_i2c_stop()
274 if (i2c->is_last_msg) { in rk3x_i2c_stop()
276 i2c_writel(i2c, REG_INT_STOP, REG_IEN); in rk3x_i2c_stop()
278 i2c->state = STATE_STOP; in rk3x_i2c_stop()
280 ctrl = i2c_readl(i2c, REG_CON); in rk3x_i2c_stop()
282 i2c_writel(i2c, ctrl, REG_CON); in rk3x_i2c_stop()
285 i2c->busy = false; in rk3x_i2c_stop()
286 i2c->state = STATE_IDLE; in rk3x_i2c_stop()
293 ctrl = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK; in rk3x_i2c_stop()
294 i2c_writel(i2c, ctrl, REG_CON); in rk3x_i2c_stop()
297 wake_up(&i2c->wait); in rk3x_i2c_stop()
302 * rk3x_i2c_prepare_read - Setup a read according to i2c->msg
303 * @i2c: target controller data
305 static void rk3x_i2c_prepare_read(struct rk3x_i2c *i2c) in rk3x_i2c_prepare_read() argument
307 unsigned int len = i2c->msg->len - i2c->processed; in rk3x_i2c_prepare_read()
310 con = i2c_readl(i2c, REG_CON); in rk3x_i2c_prepare_read()
324 if (i2c->processed != 0) { in rk3x_i2c_prepare_read()
329 i2c_writel(i2c, con, REG_CON); in rk3x_i2c_prepare_read()
330 i2c_writel(i2c, len, REG_MRXCNT); in rk3x_i2c_prepare_read()
334 * rk3x_i2c_fill_transmit_buf - Fill the transmit buffer with data from i2c->msg
335 * @i2c: target controller data
337 static void rk3x_i2c_fill_transmit_buf(struct rk3x_i2c *i2c) in rk3x_i2c_fill_transmit_buf() argument
347 if ((i2c->processed == i2c->msg->len) && (cnt != 0)) in rk3x_i2c_fill_transmit_buf()
350 if (i2c->processed == 0 && cnt == 0) in rk3x_i2c_fill_transmit_buf()
351 byte = (i2c->addr & 0x7f) << 1; in rk3x_i2c_fill_transmit_buf()
353 byte = i2c->msg->buf[i2c->processed++]; in rk3x_i2c_fill_transmit_buf()
359 i2c_writel(i2c, val, TXBUFFER_BASE + 4 * i); in rk3x_i2c_fill_transmit_buf()
361 if (i2c->processed == i2c->msg->len) in rk3x_i2c_fill_transmit_buf()
365 i2c_writel(i2c, cnt, REG_MTXCNT); in rk3x_i2c_fill_transmit_buf()
371 static void rk3x_i2c_handle_start(struct rk3x_i2c *i2c, unsigned int ipd) in rk3x_i2c_handle_start() argument
374 rk3x_i2c_stop(i2c, -EIO); in rk3x_i2c_handle_start()
375 dev_warn(i2c->dev, "unexpected irq in START: 0x%x\n", ipd); in rk3x_i2c_handle_start()
376 rk3x_i2c_clean_ipd(i2c); in rk3x_i2c_handle_start()
381 i2c_writel(i2c, REG_INT_START, REG_IPD); in rk3x_i2c_handle_start()
384 i2c_writel(i2c, i2c_readl(i2c, REG_CON) & ~REG_CON_START, REG_CON); in rk3x_i2c_handle_start()
387 if (i2c->mode == REG_CON_MOD_TX) { in rk3x_i2c_handle_start()
388 i2c_writel(i2c, REG_INT_MBTF | REG_INT_NAKRCV, REG_IEN); in rk3x_i2c_handle_start()
389 i2c->state = STATE_WRITE; in rk3x_i2c_handle_start()
390 rk3x_i2c_fill_transmit_buf(i2c); in rk3x_i2c_handle_start()
393 i2c_writel(i2c, REG_INT_MBRF | REG_INT_NAKRCV, REG_IEN); in rk3x_i2c_handle_start()
394 i2c->state = STATE_READ; in rk3x_i2c_handle_start()
395 rk3x_i2c_prepare_read(i2c); in rk3x_i2c_handle_start()
399 static void rk3x_i2c_handle_write(struct rk3x_i2c *i2c, unsigned int ipd) in rk3x_i2c_handle_write() argument
402 rk3x_i2c_stop(i2c, -EIO); in rk3x_i2c_handle_write()
403 dev_err(i2c->dev, "unexpected irq in WRITE: 0x%x\n", ipd); in rk3x_i2c_handle_write()
404 rk3x_i2c_clean_ipd(i2c); in rk3x_i2c_handle_write()
409 i2c_writel(i2c, REG_INT_MBTF, REG_IPD); in rk3x_i2c_handle_write()
412 if (i2c->processed == i2c->msg->len) in rk3x_i2c_handle_write()
413 rk3x_i2c_stop(i2c, i2c->error); in rk3x_i2c_handle_write()
415 rk3x_i2c_fill_transmit_buf(i2c); in rk3x_i2c_handle_write()
418 static void rk3x_i2c_handle_read(struct rk3x_i2c *i2c, unsigned int ipd) in rk3x_i2c_handle_read() argument
421 unsigned int len = i2c->msg->len - i2c->processed; in rk3x_i2c_handle_read()
430 i2c_writel(i2c, REG_INT_MBRF | REG_INT_START, REG_IPD); in rk3x_i2c_handle_read()
439 val = i2c_readl(i2c, RXBUFFER_BASE + (i / 4) * 4); in rk3x_i2c_handle_read()
442 i2c->msg->buf[i2c->processed++] = byte; in rk3x_i2c_handle_read()
446 if (i2c->processed == i2c->msg->len) in rk3x_i2c_handle_read()
447 rk3x_i2c_stop(i2c, i2c->error); in rk3x_i2c_handle_read()
449 rk3x_i2c_prepare_read(i2c); in rk3x_i2c_handle_read()
452 static void rk3x_i2c_handle_stop(struct rk3x_i2c *i2c, unsigned int ipd) in rk3x_i2c_handle_stop() argument
457 rk3x_i2c_stop(i2c, -EIO); in rk3x_i2c_handle_stop()
458 dev_err(i2c->dev, "unexpected irq in STOP: 0x%x\n", ipd); in rk3x_i2c_handle_stop()
459 rk3x_i2c_clean_ipd(i2c); in rk3x_i2c_handle_stop()
464 i2c_writel(i2c, REG_INT_STOP, REG_IPD); in rk3x_i2c_handle_stop()
467 con = i2c_readl(i2c, REG_CON); in rk3x_i2c_handle_stop()
469 i2c_writel(i2c, con, REG_CON); in rk3x_i2c_handle_stop()
471 i2c->busy = false; in rk3x_i2c_handle_stop()
472 i2c->state = STATE_IDLE; in rk3x_i2c_handle_stop()
475 wake_up(&i2c->wait); in rk3x_i2c_handle_stop()
480 struct rk3x_i2c *i2c = dev_id; in rk3x_i2c_irq() local
483 spin_lock(&i2c->lock); in rk3x_i2c_irq()
485 ipd = i2c_readl(i2c, REG_IPD); in rk3x_i2c_irq()
486 if (i2c->state == STATE_IDLE) { in rk3x_i2c_irq()
487 dev_warn(i2c->dev, "irq in STATE_IDLE, ipd = 0x%x\n", ipd); in rk3x_i2c_irq()
488 rk3x_i2c_clean_ipd(i2c); in rk3x_i2c_irq()
492 dev_dbg(i2c->dev, "IRQ: state %d, ipd: %x\n", i2c->state, ipd); in rk3x_i2c_irq()
503 i2c_writel(i2c, REG_INT_NAKRCV, REG_IPD); in rk3x_i2c_irq()
507 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) in rk3x_i2c_irq()
508 rk3x_i2c_stop(i2c, -ENXIO); in rk3x_i2c_irq()
515 switch (i2c->state) { in rk3x_i2c_irq()
517 rk3x_i2c_handle_start(i2c, ipd); in rk3x_i2c_irq()
520 rk3x_i2c_handle_write(i2c, ipd); in rk3x_i2c_irq()
523 rk3x_i2c_handle_read(i2c, ipd); in rk3x_i2c_irq()
526 rk3x_i2c_handle_stop(i2c, ipd); in rk3x_i2c_irq()
533 spin_unlock(&i2c->lock); in rk3x_i2c_irq()
538 * rk3x_i2c_get_spec - Get timing values of I2C specification
554 * rk3x_i2c_v0_calc_timings - Calculate divider values for desired SCL frequency
555 * @clk_rate: I2C input clock rate
556 * @t: Known I2C timing information
559 * Return: %0 on success, -%EINVAL if the goal SCL rate is too slow. In that case
560 * a best-effort divider value is returned in divs. If the target rate is
582 /* Only support standard-mode and fast-mode */ in rk3x_i2c_v0_calc_timings()
583 if (WARN_ON(t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ)) in rk3x_i2c_v0_calc_timings()
584 t->bus_freq_hz = I2C_MAX_FAST_MODE_FREQ; in rk3x_i2c_v0_calc_timings()
587 if (WARN_ON(t->bus_freq_hz < 1000)) in rk3x_i2c_v0_calc_timings()
588 t->bus_freq_hz = 1000; in rk3x_i2c_v0_calc_timings()
592 * meet I2C specification, should include fall time. in rk3x_i2c_v0_calc_timings()
594 * meet I2C specification, should include rise time. in rk3x_i2c_v0_calc_timings()
596 * I2C specification. in rk3x_i2c_v0_calc_timings()
598 * Note: max_low_ns should be (maximum data hold time * 2 - buffer) in rk3x_i2c_v0_calc_timings()
599 * This is because the i2c host on Rockchip holds the data line in rk3x_i2c_v0_calc_timings()
602 spec = rk3x_i2c_get_spec(t->bus_freq_hz); in rk3x_i2c_v0_calc_timings()
603 min_high_ns = t->scl_rise_ns + spec->min_high_ns; in rk3x_i2c_v0_calc_timings()
607 * - controller appears to drop SDA at .875x (7/8) programmed clk high. in rk3x_i2c_v0_calc_timings()
608 * - controller appears to keep SCL high for 2x programmed clk high. in rk3x_i2c_v0_calc_timings()
614 (t->scl_rise_ns + spec->min_setup_start_ns) * 1000, 875)); in rk3x_i2c_v0_calc_timings()
616 (t->scl_rise_ns + spec->min_setup_start_ns + t->sda_fall_ns + in rk3x_i2c_v0_calc_timings()
617 spec->min_high_ns), 2)); in rk3x_i2c_v0_calc_timings()
619 min_low_ns = t->scl_fall_ns + spec->min_low_ns; in rk3x_i2c_v0_calc_timings()
620 max_low_ns = spec->max_data_hold_ns * 2 - data_hold_buffer_ns; in rk3x_i2c_v0_calc_timings()
625 scl_rate_khz = t->bus_freq_hz / 1000; in rk3x_i2c_v0_calc_timings()
656 t_calc->div_low = min_low_div; in rk3x_i2c_v0_calc_timings()
657 t_calc->div_high = min_high_div; in rk3x_i2c_v0_calc_timings()
663 extra_div = min_total_div - min_div_for_hold; in rk3x_i2c_v0_calc_timings()
685 extra_low_div = ideal_low_div - min_low_div; in rk3x_i2c_v0_calc_timings()
686 t_calc->div_low = ideal_low_div; in rk3x_i2c_v0_calc_timings()
687 t_calc->div_high = min_high_div + (extra_div - extra_low_div); in rk3x_i2c_v0_calc_timings()
694 t_calc->div_low--; in rk3x_i2c_v0_calc_timings()
695 t_calc->div_high--; in rk3x_i2c_v0_calc_timings()
698 t_calc->tuning = 0; in rk3x_i2c_v0_calc_timings()
700 if (t_calc->div_low > 0xffff) { in rk3x_i2c_v0_calc_timings()
701 t_calc->div_low = 0xffff; in rk3x_i2c_v0_calc_timings()
702 ret = -EINVAL; in rk3x_i2c_v0_calc_timings()
705 if (t_calc->div_high > 0xffff) { in rk3x_i2c_v0_calc_timings()
706 t_calc->div_high = 0xffff; in rk3x_i2c_v0_calc_timings()
707 ret = -EINVAL; in rk3x_i2c_v0_calc_timings()
714 * rk3x_i2c_v1_calc_timings - Calculate timing values for desired SCL frequency
715 * @clk_rate: I2C input clock rate
716 * @t: Known I2C timing information
719 * Return: %0 on success, -%EINVAL if the goal SCL rate is too slow. In that case
720 * a best-effort divider value is returned in divs. If the target rate is
735 * tSU;sda = [(8 - s) * l + 1] * T;
739 * tHD;sta = [8h * (u + 1) - 1] * T;
761 /* Support standard-mode, fast-mode and fast-mode plus */ in rk3x_i2c_v1_calc_timings()
762 if (WARN_ON(t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ)) in rk3x_i2c_v1_calc_timings()
763 t->bus_freq_hz = I2C_MAX_FAST_MODE_PLUS_FREQ; in rk3x_i2c_v1_calc_timings()
766 if (WARN_ON(t->bus_freq_hz < 1000)) in rk3x_i2c_v1_calc_timings()
767 t->bus_freq_hz = 1000; in rk3x_i2c_v1_calc_timings()
771 * meet I2C specification, should include fall time. in rk3x_i2c_v1_calc_timings()
773 * meet I2C specification, should include rise time. in rk3x_i2c_v1_calc_timings()
775 spec = rk3x_i2c_get_spec(t->bus_freq_hz); in rk3x_i2c_v1_calc_timings()
777 /* calculate min-divh and min-divl */ in rk3x_i2c_v1_calc_timings()
779 scl_rate_khz = t->bus_freq_hz / 1000; in rk3x_i2c_v1_calc_timings()
782 min_high_ns = t->scl_rise_ns + spec->min_high_ns; in rk3x_i2c_v1_calc_timings()
785 min_low_ns = t->scl_fall_ns + spec->min_low_ns; in rk3x_i2c_v1_calc_timings()
790 * hardware would not output the i2c clk. in rk3x_i2c_v1_calc_timings()
807 t_calc->div_low = min_low_div; in rk3x_i2c_v1_calc_timings()
808 t_calc->div_high = min_high_div; in rk3x_i2c_v1_calc_timings()
817 extra_div = min_total_div - min_div_for_hold; in rk3x_i2c_v1_calc_timings()
821 t_calc->div_low = min_low_div + extra_low_div; in rk3x_i2c_v1_calc_timings()
822 t_calc->div_high = min_high_div + (extra_div - extra_low_div); in rk3x_i2c_v1_calc_timings()
829 for (sda_update_cfg = 3; sda_update_cfg > 0; sda_update_cfg--) { in rk3x_i2c_v1_calc_timings()
831 * (t_calc->div_low) + 1) in rk3x_i2c_v1_calc_timings()
833 min_setup_data_ns = DIV_ROUND_UP(((8 - sda_update_cfg) in rk3x_i2c_v1_calc_timings()
834 * (t_calc->div_low) + 1) in rk3x_i2c_v1_calc_timings()
836 if ((max_hold_data_ns < spec->max_data_hold_ns) && in rk3x_i2c_v1_calc_timings()
837 (min_setup_data_ns > spec->min_data_setup_ns)) in rk3x_i2c_v1_calc_timings()
842 min_setup_start_ns = t->scl_rise_ns + spec->min_setup_start_ns; in rk3x_i2c_v1_calc_timings()
844 - 1000000, 8 * 1000000 * (t_calc->div_high)); in rk3x_i2c_v1_calc_timings()
847 min_setup_stop_ns = t->scl_rise_ns + spec->min_setup_stop_ns; in rk3x_i2c_v1_calc_timings()
849 - 1000000, 8 * 1000000 * (t_calc->div_high)); in rk3x_i2c_v1_calc_timings()
851 t_calc->tuning = REG_CON_SDA_CFG(--sda_update_cfg) | in rk3x_i2c_v1_calc_timings()
852 REG_CON_STA_CFG(--stp_sta_cfg) | in rk3x_i2c_v1_calc_timings()
853 REG_CON_STO_CFG(--stp_sto_cfg); in rk3x_i2c_v1_calc_timings()
855 t_calc->div_low--; in rk3x_i2c_v1_calc_timings()
856 t_calc->div_high--; in rk3x_i2c_v1_calc_timings()
859 if (t_calc->div_low > 0xffff) { in rk3x_i2c_v1_calc_timings()
860 t_calc->div_low = 0xffff; in rk3x_i2c_v1_calc_timings()
861 ret = -EINVAL; in rk3x_i2c_v1_calc_timings()
864 if (t_calc->div_high > 0xffff) { in rk3x_i2c_v1_calc_timings()
865 t_calc->div_high = 0xffff; in rk3x_i2c_v1_calc_timings()
866 ret = -EINVAL; in rk3x_i2c_v1_calc_timings()
872 static void rk3x_i2c_adapt_div(struct rk3x_i2c *i2c, unsigned long clk_rate) in rk3x_i2c_adapt_div() argument
874 struct i2c_timings *t = &i2c->t; in rk3x_i2c_adapt_div()
881 ret = i2c->soc_data->calc_timings(clk_rate, t, &calc); in rk3x_i2c_adapt_div()
882 WARN_ONCE(ret != 0, "Could not reach SCL freq %u", t->bus_freq_hz); in rk3x_i2c_adapt_div()
884 clk_enable(i2c->pclk); in rk3x_i2c_adapt_div()
886 spin_lock_irqsave(&i2c->lock, flags); in rk3x_i2c_adapt_div()
887 val = i2c_readl(i2c, REG_CON); in rk3x_i2c_adapt_div()
890 i2c_writel(i2c, val, REG_CON); in rk3x_i2c_adapt_div()
891 i2c_writel(i2c, (calc.div_high << 16) | (calc.div_low & 0xffff), in rk3x_i2c_adapt_div()
893 spin_unlock_irqrestore(&i2c->lock, flags); in rk3x_i2c_adapt_div()
895 clk_disable(i2c->pclk); in rk3x_i2c_adapt_div()
900 dev_dbg(i2c->dev, in rk3x_i2c_adapt_div()
903 1000000000 / t->bus_freq_hz, in rk3x_i2c_adapt_div()
908 * rk3x_i2c_clk_notifier_cb - Clock rate change callback
915 * New dividers are written to the HW in the pre- or post change notification
918 * Code adapted from i2c-cadence.c.
928 struct rk3x_i2c *i2c = container_of(nb, struct rk3x_i2c, clk_rate_nb); in rk3x_i2c_clk_notifier_cb() local
938 if (i2c->soc_data->calc_timings(ndata->new_rate, &i2c->t, in rk3x_i2c_clk_notifier_cb()
943 if (ndata->new_rate > ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
944 rk3x_i2c_adapt_div(i2c, ndata->new_rate); in rk3x_i2c_clk_notifier_cb()
949 if (ndata->new_rate < ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
950 rk3x_i2c_adapt_div(i2c, ndata->new_rate); in rk3x_i2c_clk_notifier_cb()
954 if (ndata->new_rate > ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
955 rk3x_i2c_adapt_div(i2c, ndata->old_rate); in rk3x_i2c_clk_notifier_cb()
963 * rk3x_i2c_setup - Setup I2C registers for an I2C operation specified by msgs, num.
964 * @i2c: target controller data
965 * @msgs: I2C msgs to process
968 * Must be called with i2c->lock held.
970 * Return: Number of I2C msgs processed or negative in case of error
972 static int rk3x_i2c_setup(struct rk3x_i2c *i2c, struct i2c_msg *msgs, int num) in rk3x_i2c_setup() argument
978 * The I2C adapter can issue a small (len < 4) write packet before in rk3x_i2c_setup()
979 * reading. This speeds up SMBus-style register reads. in rk3x_i2c_setup()
989 dev_dbg(i2c->dev, "Combined write/read from addr 0x%x\n", in rk3x_i2c_setup()
999 i2c->msg = &msgs[1]; in rk3x_i2c_setup()
1001 i2c->mode = REG_CON_MOD_REGISTER_TX; in rk3x_i2c_setup()
1003 i2c_writel(i2c, addr | REG_MRXADDR_VALID(0), REG_MRXADDR); in rk3x_i2c_setup()
1004 i2c_writel(i2c, reg_addr, REG_MRXRADDR); in rk3x_i2c_setup()
1010 * one-by-one. in rk3x_i2c_setup()
1020 i2c->mode = REG_CON_MOD_REGISTER_TX; in rk3x_i2c_setup()
1021 i2c_writel(i2c, addr | REG_MRXADDR_VALID(0), in rk3x_i2c_setup()
1023 i2c_writel(i2c, 0, REG_MRXRADDR); in rk3x_i2c_setup()
1025 i2c->mode = REG_CON_MOD_TX; in rk3x_i2c_setup()
1028 i2c->msg = &msgs[0]; in rk3x_i2c_setup()
1033 i2c->addr = msgs[0].addr; in rk3x_i2c_setup()
1034 i2c->busy = true; in rk3x_i2c_setup()
1035 i2c->state = STATE_START; in rk3x_i2c_setup()
1036 i2c->processed = 0; in rk3x_i2c_setup()
1037 i2c->error = 0; in rk3x_i2c_setup()
1039 rk3x_i2c_clean_ipd(i2c); in rk3x_i2c_setup()
1044 static int rk3x_i2c_wait_xfer_poll(struct rk3x_i2c *i2c) in rk3x_i2c_wait_xfer_poll() argument
1048 while (READ_ONCE(i2c->busy) && in rk3x_i2c_wait_xfer_poll()
1051 rk3x_i2c_irq(0, i2c); in rk3x_i2c_wait_xfer_poll()
1054 return !i2c->busy; in rk3x_i2c_wait_xfer_poll()
1060 struct rk3x_i2c *i2c = (struct rk3x_i2c *)adap->algo_data; in rk3x_i2c_xfer_common() local
1066 spin_lock_irqsave(&i2c->lock, flags); in rk3x_i2c_xfer_common()
1068 clk_enable(i2c->clk); in rk3x_i2c_xfer_common()
1069 clk_enable(i2c->pclk); in rk3x_i2c_xfer_common()
1071 i2c->is_last_msg = false; in rk3x_i2c_xfer_common()
1078 ret = rk3x_i2c_setup(i2c, msgs + i, num - i); in rk3x_i2c_xfer_common()
1081 dev_err(i2c->dev, "rk3x_i2c_setup() failed\n"); in rk3x_i2c_xfer_common()
1086 i2c->is_last_msg = true; in rk3x_i2c_xfer_common()
1088 spin_unlock_irqrestore(&i2c->lock, flags); in rk3x_i2c_xfer_common()
1090 rk3x_i2c_start(i2c); in rk3x_i2c_xfer_common()
1093 timeout = wait_event_timeout(i2c->wait, !i2c->busy, in rk3x_i2c_xfer_common()
1096 timeout = rk3x_i2c_wait_xfer_poll(i2c); in rk3x_i2c_xfer_common()
1099 spin_lock_irqsave(&i2c->lock, flags); in rk3x_i2c_xfer_common()
1102 dev_err(i2c->dev, "timeout, ipd: 0x%02x, state: %d\n", in rk3x_i2c_xfer_common()
1103 i2c_readl(i2c, REG_IPD), i2c->state); in rk3x_i2c_xfer_common()
1106 i2c_writel(i2c, 0, REG_IEN); in rk3x_i2c_xfer_common()
1107 val = i2c_readl(i2c, REG_CON) & REG_CON_TUNING_MASK; in rk3x_i2c_xfer_common()
1109 i2c_writel(i2c, val, REG_CON); in rk3x_i2c_xfer_common()
1111 i2c->state = STATE_IDLE; in rk3x_i2c_xfer_common()
1113 ret = -ETIMEDOUT; in rk3x_i2c_xfer_common()
1117 if (i2c->error) { in rk3x_i2c_xfer_common()
1118 ret = i2c->error; in rk3x_i2c_xfer_common()
1123 clk_disable(i2c->pclk); in rk3x_i2c_xfer_common()
1124 clk_disable(i2c->clk); in rk3x_i2c_xfer_common()
1126 spin_unlock_irqrestore(&i2c->lock, flags); in rk3x_i2c_xfer_common()
1145 struct rk3x_i2c *i2c = dev_get_drvdata(dev); in rk3x_i2c_resume() local
1147 rk3x_i2c_adapt_div(i2c, clk_get_rate(i2c->clk)); in rk3x_i2c_resume()
1164 .grf_offset = -1,
1184 .grf_offset = -1,
1189 .grf_offset = -1,
1194 .grf_offset = -1,
1200 .compatible = "rockchip,rv1108-i2c",
1204 .compatible = "rockchip,rv1126-i2c",
1208 .compatible = "rockchip,rk3066-i2c",
1212 .compatible = "rockchip,rk3188-i2c",
1216 .compatible = "rockchip,rk3228-i2c",
1220 .compatible = "rockchip,rk3288-i2c",
1224 .compatible = "rockchip,rk3399-i2c",
1233 struct device_node *np = pdev->dev.of_node; in rk3x_i2c_probe()
1235 struct rk3x_i2c *i2c; in rk3x_i2c_probe() local
1242 i2c = devm_kzalloc(&pdev->dev, sizeof(struct rk3x_i2c), GFP_KERNEL); in rk3x_i2c_probe()
1243 if (!i2c) in rk3x_i2c_probe()
1244 return -ENOMEM; in rk3x_i2c_probe()
1247 i2c->soc_data = match->data; in rk3x_i2c_probe()
1249 /* use common interface to get I2C timing properties */ in rk3x_i2c_probe()
1250 i2c_parse_fw_timings(&pdev->dev, &i2c->t, true); in rk3x_i2c_probe()
1252 strscpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name)); in rk3x_i2c_probe()
1253 i2c->adap.owner = THIS_MODULE; in rk3x_i2c_probe()
1254 i2c->adap.algo = &rk3x_i2c_algorithm; in rk3x_i2c_probe()
1255 i2c->adap.retries = 3; in rk3x_i2c_probe()
1256 i2c->adap.dev.of_node = np; in rk3x_i2c_probe()
1257 i2c->adap.algo_data = i2c; in rk3x_i2c_probe()
1258 i2c->adap.dev.parent = &pdev->dev; in rk3x_i2c_probe()
1260 i2c->dev = &pdev->dev; in rk3x_i2c_probe()
1262 spin_lock_init(&i2c->lock); in rk3x_i2c_probe()
1263 init_waitqueue_head(&i2c->wait); in rk3x_i2c_probe()
1265 i2c->regs = devm_platform_ioremap_resource(pdev, 0); in rk3x_i2c_probe()
1266 if (IS_ERR(i2c->regs)) in rk3x_i2c_probe()
1267 return PTR_ERR(i2c->regs); in rk3x_i2c_probe()
1269 /* Try to set the I2C adapter number from dt */ in rk3x_i2c_probe()
1270 bus_nr = of_alias_get_id(np, "i2c"); in rk3x_i2c_probe()
1276 if (i2c->soc_data->grf_offset >= 0) { in rk3x_i2c_probe()
1281 dev_err(&pdev->dev, in rk3x_i2c_probe()
1282 "rk3x-i2c needs 'rockchip,grf' property\n"); in rk3x_i2c_probe()
1287 dev_err(&pdev->dev, "rk3x-i2c needs i2cX alias"); in rk3x_i2c_probe()
1288 return -EINVAL; in rk3x_i2c_probe()
1294 ret = regmap_write(grf, i2c->soc_data->grf_offset, value); in rk3x_i2c_probe()
1296 dev_err(i2c->dev, "Could not write to GRF: %d\n", ret); in rk3x_i2c_probe()
1306 ret = devm_request_irq(&pdev->dev, irq, rk3x_i2c_irq, in rk3x_i2c_probe()
1307 0, dev_name(&pdev->dev), i2c); in rk3x_i2c_probe()
1309 dev_err(&pdev->dev, "cannot request IRQ\n"); in rk3x_i2c_probe()
1313 platform_set_drvdata(pdev, i2c); in rk3x_i2c_probe()
1315 if (i2c->soc_data->calc_timings == rk3x_i2c_v0_calc_timings) { in rk3x_i2c_probe()
1317 i2c->clk = devm_clk_get(&pdev->dev, NULL); in rk3x_i2c_probe()
1318 i2c->pclk = i2c->clk; in rk3x_i2c_probe()
1320 i2c->clk = devm_clk_get(&pdev->dev, "i2c"); in rk3x_i2c_probe()
1321 i2c->pclk = devm_clk_get(&pdev->dev, "pclk"); in rk3x_i2c_probe()
1324 if (IS_ERR(i2c->clk)) in rk3x_i2c_probe()
1325 return dev_err_probe(&pdev->dev, PTR_ERR(i2c->clk), in rk3x_i2c_probe()
1328 if (IS_ERR(i2c->pclk)) in rk3x_i2c_probe()
1329 return dev_err_probe(&pdev->dev, PTR_ERR(i2c->pclk), in rk3x_i2c_probe()
1332 ret = clk_prepare(i2c->clk); in rk3x_i2c_probe()
1334 dev_err(&pdev->dev, "Can't prepare bus clk: %d\n", ret); in rk3x_i2c_probe()
1337 ret = clk_prepare(i2c->pclk); in rk3x_i2c_probe()
1339 dev_err(&pdev->dev, "Can't prepare periph clock: %d\n", ret); in rk3x_i2c_probe()
1343 i2c->clk_rate_nb.notifier_call = rk3x_i2c_clk_notifier_cb; in rk3x_i2c_probe()
1344 ret = clk_notifier_register(i2c->clk, &i2c->clk_rate_nb); in rk3x_i2c_probe()
1346 dev_err(&pdev->dev, "Unable to register clock notifier\n"); in rk3x_i2c_probe()
1350 ret = clk_enable(i2c->clk); in rk3x_i2c_probe()
1352 dev_err(&pdev->dev, "Can't enable bus clk: %d\n", ret); in rk3x_i2c_probe()
1356 clk_rate = clk_get_rate(i2c->clk); in rk3x_i2c_probe()
1357 rk3x_i2c_adapt_div(i2c, clk_rate); in rk3x_i2c_probe()
1358 clk_disable(i2c->clk); in rk3x_i2c_probe()
1360 ret = i2c_add_adapter(&i2c->adap); in rk3x_i2c_probe()
1367 clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb); in rk3x_i2c_probe()
1369 clk_unprepare(i2c->pclk); in rk3x_i2c_probe()
1371 clk_unprepare(i2c->clk); in rk3x_i2c_probe()
1377 struct rk3x_i2c *i2c = platform_get_drvdata(pdev); in rk3x_i2c_remove() local
1379 i2c_del_adapter(&i2c->adap); in rk3x_i2c_remove()
1381 clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb); in rk3x_i2c_remove()
1382 clk_unprepare(i2c->pclk); in rk3x_i2c_remove()
1383 clk_unprepare(i2c->clk); in rk3x_i2c_remove()
1392 .name = "rk3x-i2c",
1400 MODULE_DESCRIPTION("Rockchip RK3xxx I2C Bus driver");