Lines Matching refs:dev
31 static void i2c_dw_configure_fifo_master(struct dw_i2c_dev *dev) in i2c_dw_configure_fifo_master() argument
34 regmap_write(dev->map, DW_IC_TX_TL, dev->tx_fifo_depth / 2); in i2c_dw_configure_fifo_master()
35 regmap_write(dev->map, DW_IC_RX_TL, 0); in i2c_dw_configure_fifo_master()
38 regmap_write(dev->map, DW_IC_CON, dev->master_cfg); in i2c_dw_configure_fifo_master()
41 static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev) in i2c_dw_set_timings_master() argument
45 struct i2c_timings *t = &dev->timings; in i2c_dw_set_timings_master()
50 ret = i2c_dw_acquire_lock(dev); in i2c_dw_set_timings_master()
54 ret = regmap_read(dev->map, DW_IC_COMP_PARAM_1, &comp_param1); in i2c_dw_set_timings_master()
55 i2c_dw_release_lock(dev); in i2c_dw_set_timings_master()
64 if (!dev->ss_hcnt || !dev->ss_lcnt) { in i2c_dw_set_timings_master()
65 ic_clk = i2c_dw_clk_rate(dev); in i2c_dw_set_timings_master()
66 dev->ss_hcnt = in i2c_dw_set_timings_master()
72 dev->ss_lcnt = in i2c_dw_set_timings_master()
78 dev_dbg(dev->dev, "Standard Mode HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
79 dev->ss_hcnt, dev->ss_lcnt); in i2c_dw_set_timings_master()
91 if (dev->fp_hcnt && dev->fp_lcnt) { in i2c_dw_set_timings_master()
92 dev->fs_hcnt = dev->fp_hcnt; in i2c_dw_set_timings_master()
93 dev->fs_lcnt = dev->fp_lcnt; in i2c_dw_set_timings_master()
95 ic_clk = i2c_dw_clk_rate(dev); in i2c_dw_set_timings_master()
96 dev->fs_hcnt = in i2c_dw_set_timings_master()
102 dev->fs_lcnt = in i2c_dw_set_timings_master()
114 if (!dev->fs_hcnt || !dev->fs_lcnt) { in i2c_dw_set_timings_master()
115 ic_clk = i2c_dw_clk_rate(dev); in i2c_dw_set_timings_master()
116 dev->fs_hcnt = in i2c_dw_set_timings_master()
122 dev->fs_lcnt = in i2c_dw_set_timings_master()
128 dev_dbg(dev->dev, "Fast Mode%s HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
129 fp_str, dev->fs_hcnt, dev->fs_lcnt); in i2c_dw_set_timings_master()
132 if ((dev->master_cfg & DW_IC_CON_SPEED_MASK) == in i2c_dw_set_timings_master()
136 dev_err(dev->dev, "High Speed not supported!\n"); in i2c_dw_set_timings_master()
138 dev->master_cfg &= ~DW_IC_CON_SPEED_MASK; in i2c_dw_set_timings_master()
139 dev->master_cfg |= DW_IC_CON_SPEED_FAST; in i2c_dw_set_timings_master()
140 dev->hs_hcnt = 0; in i2c_dw_set_timings_master()
141 dev->hs_lcnt = 0; in i2c_dw_set_timings_master()
142 } else if (!dev->hs_hcnt || !dev->hs_lcnt) { in i2c_dw_set_timings_master()
143 ic_clk = i2c_dw_clk_rate(dev); in i2c_dw_set_timings_master()
144 dev->hs_hcnt = in i2c_dw_set_timings_master()
150 dev->hs_lcnt = in i2c_dw_set_timings_master()
156 dev_dbg(dev->dev, "High Speed Mode HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
157 dev->hs_hcnt, dev->hs_lcnt); in i2c_dw_set_timings_master()
160 ret = i2c_dw_set_sda_hold(dev); in i2c_dw_set_timings_master()
164 dev_dbg(dev->dev, "Bus speed: %s\n", i2c_freq_mode_string(t->bus_freq_hz)); in i2c_dw_set_timings_master()
176 static int i2c_dw_init_master(struct dw_i2c_dev *dev) in i2c_dw_init_master() argument
180 ret = i2c_dw_acquire_lock(dev); in i2c_dw_init_master()
185 __i2c_dw_disable(dev); in i2c_dw_init_master()
188 regmap_write(dev->map, DW_IC_SS_SCL_HCNT, dev->ss_hcnt); in i2c_dw_init_master()
189 regmap_write(dev->map, DW_IC_SS_SCL_LCNT, dev->ss_lcnt); in i2c_dw_init_master()
192 regmap_write(dev->map, DW_IC_FS_SCL_HCNT, dev->fs_hcnt); in i2c_dw_init_master()
193 regmap_write(dev->map, DW_IC_FS_SCL_LCNT, dev->fs_lcnt); in i2c_dw_init_master()
196 if (dev->hs_hcnt && dev->hs_lcnt) { in i2c_dw_init_master()
197 regmap_write(dev->map, DW_IC_HS_SCL_HCNT, dev->hs_hcnt); in i2c_dw_init_master()
198 regmap_write(dev->map, DW_IC_HS_SCL_LCNT, dev->hs_lcnt); in i2c_dw_init_master()
202 if (dev->sda_hold_time) in i2c_dw_init_master()
203 regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time); in i2c_dw_init_master()
205 i2c_dw_configure_fifo_master(dev); in i2c_dw_init_master()
206 i2c_dw_release_lock(dev); in i2c_dw_init_master()
211 static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) in i2c_dw_xfer_init() argument
213 struct i2c_msg *msgs = dev->msgs; in i2c_dw_xfer_init()
218 __i2c_dw_disable(dev); in i2c_dw_xfer_init()
221 if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) { in i2c_dw_xfer_init()
232 regmap_update_bits(dev->map, DW_IC_CON, DW_IC_CON_10BITADDR_MASTER, in i2c_dw_xfer_init()
239 regmap_write(dev->map, DW_IC_TAR, in i2c_dw_xfer_init()
240 msgs[dev->msg_write_idx].addr | ic_tar); in i2c_dw_xfer_init()
243 regmap_write(dev->map, DW_IC_INTR_MASK, 0); in i2c_dw_xfer_init()
246 __i2c_dw_enable(dev); in i2c_dw_xfer_init()
249 regmap_read(dev->map, DW_IC_ENABLE_STATUS, &dummy); in i2c_dw_xfer_init()
252 regmap_read(dev->map, DW_IC_CLR_INTR, &dummy); in i2c_dw_xfer_init()
253 regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_MASTER_MASK); in i2c_dw_xfer_init()
256 static int i2c_dw_check_stopbit(struct dw_i2c_dev *dev) in i2c_dw_check_stopbit() argument
261 ret = regmap_read_poll_timeout(dev->map, DW_IC_INTR_STAT, val, in i2c_dw_check_stopbit()
265 dev_err(dev->dev, "i2c timeout error %d\n", ret); in i2c_dw_check_stopbit()
270 static int i2c_dw_status(struct dw_i2c_dev *dev) in i2c_dw_status() argument
274 status = i2c_dw_wait_bus_not_busy(dev); in i2c_dw_status()
278 return i2c_dw_check_stopbit(dev); in i2c_dw_status()
287 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in amd_i2c_dw_xfer_quirk() local
298 regmap_write(dev->map, AMD_UCSI_INTR_REG, AMD_UCSI_INTR_EN); in amd_i2c_dw_xfer_quirk()
300 dev->msgs = msgs; in amd_i2c_dw_xfer_quirk()
301 dev->msgs_num = num_msgs; in amd_i2c_dw_xfer_quirk()
302 i2c_dw_xfer_init(dev); in amd_i2c_dw_xfer_quirk()
303 regmap_write(dev->map, DW_IC_INTR_MASK, 0); in amd_i2c_dw_xfer_quirk()
311 regmap_write(dev->map, DW_IC_TX_TL, buf_len - 1); in amd_i2c_dw_xfer_quirk()
323 regmap_write(dev->map, DW_IC_DATA_CMD, 0x100); in amd_i2c_dw_xfer_quirk()
324 regmap_write(dev->map, DW_IC_DATA_CMD, 0x100 | cmd); in amd_i2c_dw_xfer_quirk()
326 regmap_write(dev->map, DW_IC_TX_TL, 2 * (buf_len - 1)); in amd_i2c_dw_xfer_quirk()
327 regmap_write(dev->map, DW_IC_RX_TL, 2 * (buf_len - 1)); in amd_i2c_dw_xfer_quirk()
333 status = i2c_dw_status(dev); in amd_i2c_dw_xfer_quirk()
338 regmap_read(dev->map, DW_IC_DATA_CMD, &val); in amd_i2c_dw_xfer_quirk()
341 status = i2c_dw_check_stopbit(dev); in amd_i2c_dw_xfer_quirk()
346 regmap_write(dev->map, DW_IC_DATA_CMD, *tx_buf++ | cmd); in amd_i2c_dw_xfer_quirk()
350 status = i2c_dw_check_stopbit(dev); in amd_i2c_dw_xfer_quirk()
358 static int i2c_dw_poll_tx_empty(struct dw_i2c_dev *dev) in i2c_dw_poll_tx_empty() argument
362 return regmap_read_poll_timeout(dev->map, DW_IC_RAW_INTR_STAT, val, in i2c_dw_poll_tx_empty()
367 static int i2c_dw_poll_rx_full(struct dw_i2c_dev *dev) in i2c_dw_poll_rx_full() argument
371 return regmap_read_poll_timeout(dev->map, DW_IC_RAW_INTR_STAT, val, in i2c_dw_poll_rx_full()
379 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in txgbe_i2c_dw_xfer_quirk() local
384 dev->msgs = msgs; in txgbe_i2c_dw_xfer_quirk()
385 dev->msgs_num = num_msgs; in txgbe_i2c_dw_xfer_quirk()
386 i2c_dw_xfer_init(dev); in txgbe_i2c_dw_xfer_quirk()
387 regmap_write(dev->map, DW_IC_INTR_MASK, 0); in txgbe_i2c_dw_xfer_quirk()
398 regmap_write(dev->map, DW_IC_DATA_CMD, 0x100 | stop); in txgbe_i2c_dw_xfer_quirk()
400 ret = i2c_dw_poll_rx_full(dev); in txgbe_i2c_dw_xfer_quirk()
404 regmap_read(dev->map, DW_IC_DATA_CMD, &val); in txgbe_i2c_dw_xfer_quirk()
407 ret = i2c_dw_poll_tx_empty(dev); in txgbe_i2c_dw_xfer_quirk()
411 regmap_write(dev->map, DW_IC_DATA_CMD, in txgbe_i2c_dw_xfer_quirk()
427 i2c_dw_xfer_msg(struct dw_i2c_dev *dev) in i2c_dw_xfer_msg() argument
429 struct i2c_msg *msgs = dev->msgs; in i2c_dw_xfer_msg()
432 u32 addr = msgs[dev->msg_write_idx].addr; in i2c_dw_xfer_msg()
433 u32 buf_len = dev->tx_buf_len; in i2c_dw_xfer_msg()
434 u8 *buf = dev->tx_buf; in i2c_dw_xfer_msg()
440 for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) { in i2c_dw_xfer_msg()
441 u32 flags = msgs[dev->msg_write_idx].flags; in i2c_dw_xfer_msg()
448 if (msgs[dev->msg_write_idx].addr != addr) { in i2c_dw_xfer_msg()
449 dev_err(dev->dev, in i2c_dw_xfer_msg()
451 dev->msg_err = -EINVAL; in i2c_dw_xfer_msg()
455 if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { in i2c_dw_xfer_msg()
457 buf = msgs[dev->msg_write_idx].buf; in i2c_dw_xfer_msg()
458 buf_len = msgs[dev->msg_write_idx].len; in i2c_dw_xfer_msg()
464 if ((dev->master_cfg & DW_IC_CON_RESTART_EN) && in i2c_dw_xfer_msg()
465 (dev->msg_write_idx > 0)) in i2c_dw_xfer_msg()
469 regmap_read(dev->map, DW_IC_TXFLR, &flr); in i2c_dw_xfer_msg()
470 tx_limit = dev->tx_fifo_depth - flr; in i2c_dw_xfer_msg()
472 regmap_read(dev->map, DW_IC_RXFLR, &flr); in i2c_dw_xfer_msg()
473 rx_limit = dev->rx_fifo_depth - flr; in i2c_dw_xfer_msg()
491 if (dev->msg_write_idx == dev->msgs_num - 1 && in i2c_dw_xfer_msg()
500 if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { in i2c_dw_xfer_msg()
503 if (dev->rx_outstanding >= dev->rx_fifo_depth) in i2c_dw_xfer_msg()
506 regmap_write(dev->map, DW_IC_DATA_CMD, in i2c_dw_xfer_msg()
509 dev->rx_outstanding++; in i2c_dw_xfer_msg()
511 regmap_write(dev->map, DW_IC_DATA_CMD, in i2c_dw_xfer_msg()
517 dev->tx_buf = buf; in i2c_dw_xfer_msg()
518 dev->tx_buf_len = buf_len; in i2c_dw_xfer_msg()
527 dev->status |= STATUS_WRITE_IN_PROGRESS; in i2c_dw_xfer_msg()
530 dev->status &= ~STATUS_WRITE_IN_PROGRESS; in i2c_dw_xfer_msg()
537 if (dev->msg_write_idx == dev->msgs_num) in i2c_dw_xfer_msg()
540 if (dev->msg_err) in i2c_dw_xfer_msg()
543 regmap_write(dev->map, DW_IC_INTR_MASK, intr_mask); in i2c_dw_xfer_msg()
547 i2c_dw_recv_len(struct dw_i2c_dev *dev, u8 len) in i2c_dw_recv_len() argument
549 struct i2c_msg *msgs = dev->msgs; in i2c_dw_recv_len()
550 u32 flags = msgs[dev->msg_read_idx].flags; in i2c_dw_recv_len()
557 dev->tx_buf_len = len - min_t(u8, len, dev->rx_outstanding); in i2c_dw_recv_len()
558 msgs[dev->msg_read_idx].len = len; in i2c_dw_recv_len()
559 msgs[dev->msg_read_idx].flags &= ~I2C_M_RECV_LEN; in i2c_dw_recv_len()
565 i2c_dw_read(struct dw_i2c_dev *dev) in i2c_dw_read() argument
567 struct i2c_msg *msgs = dev->msgs; in i2c_dw_read()
570 for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { in i2c_dw_read()
575 if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD)) in i2c_dw_read()
578 if (!(dev->status & STATUS_READ_IN_PROGRESS)) { in i2c_dw_read()
579 len = msgs[dev->msg_read_idx].len; in i2c_dw_read()
580 buf = msgs[dev->msg_read_idx].buf; in i2c_dw_read()
582 len = dev->rx_buf_len; in i2c_dw_read()
583 buf = dev->rx_buf; in i2c_dw_read()
586 regmap_read(dev->map, DW_IC_RXFLR, &rx_valid); in i2c_dw_read()
589 u32 flags = msgs[dev->msg_read_idx].flags; in i2c_dw_read()
591 regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); in i2c_dw_read()
607 len = i2c_dw_recv_len(dev, tmp); in i2c_dw_read()
610 dev->rx_outstanding--; in i2c_dw_read()
614 dev->status |= STATUS_READ_IN_PROGRESS; in i2c_dw_read()
615 dev->rx_buf_len = len; in i2c_dw_read()
616 dev->rx_buf = buf; in i2c_dw_read()
619 dev->status &= ~STATUS_READ_IN_PROGRESS; in i2c_dw_read()
629 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in i2c_dw_xfer() local
632 dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); in i2c_dw_xfer()
634 pm_runtime_get_sync(dev->dev); in i2c_dw_xfer()
641 switch (dev->flags & MODEL_MASK) { in i2c_dw_xfer()
652 reinit_completion(&dev->cmd_complete); in i2c_dw_xfer()
653 dev->msgs = msgs; in i2c_dw_xfer()
654 dev->msgs_num = num; in i2c_dw_xfer()
655 dev->cmd_err = 0; in i2c_dw_xfer()
656 dev->msg_write_idx = 0; in i2c_dw_xfer()
657 dev->msg_read_idx = 0; in i2c_dw_xfer()
658 dev->msg_err = 0; in i2c_dw_xfer()
659 dev->status = 0; in i2c_dw_xfer()
660 dev->abort_source = 0; in i2c_dw_xfer()
661 dev->rx_outstanding = 0; in i2c_dw_xfer()
663 ret = i2c_dw_acquire_lock(dev); in i2c_dw_xfer()
667 ret = i2c_dw_wait_bus_not_busy(dev); in i2c_dw_xfer()
672 i2c_dw_xfer_init(dev); in i2c_dw_xfer()
675 if (!wait_for_completion_timeout(&dev->cmd_complete, adap->timeout)) { in i2c_dw_xfer()
676 dev_err(dev->dev, "controller timed out\n"); in i2c_dw_xfer()
678 i2c_recover_bus(&dev->adapter); in i2c_dw_xfer()
679 i2c_dw_init_master(dev); in i2c_dw_xfer()
692 __i2c_dw_disable_nowait(dev); in i2c_dw_xfer()
694 if (dev->msg_err) { in i2c_dw_xfer()
695 ret = dev->msg_err; in i2c_dw_xfer()
700 if (likely(!dev->cmd_err && !dev->status)) { in i2c_dw_xfer()
706 if (dev->cmd_err == DW_IC_ERR_TX_ABRT) { in i2c_dw_xfer()
707 ret = i2c_dw_handle_tx_abort(dev); in i2c_dw_xfer()
711 if (dev->status) in i2c_dw_xfer()
712 dev_err(dev->dev, in i2c_dw_xfer()
718 i2c_dw_release_lock(dev); in i2c_dw_xfer()
721 pm_runtime_mark_last_busy(dev->dev); in i2c_dw_xfer()
722 pm_runtime_put_autosuspend(dev->dev); in i2c_dw_xfer()
736 static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) in i2c_dw_read_clear_intrbits() argument
752 regmap_read(dev->map, DW_IC_INTR_STAT, &stat); in i2c_dw_read_clear_intrbits()
762 regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &dummy); in i2c_dw_read_clear_intrbits()
764 regmap_read(dev->map, DW_IC_CLR_RX_OVER, &dummy); in i2c_dw_read_clear_intrbits()
766 regmap_read(dev->map, DW_IC_CLR_TX_OVER, &dummy); in i2c_dw_read_clear_intrbits()
768 regmap_read(dev->map, DW_IC_CLR_RD_REQ, &dummy); in i2c_dw_read_clear_intrbits()
774 regmap_read(dev->map, DW_IC_TX_ABRT_SOURCE, &dev->abort_source); in i2c_dw_read_clear_intrbits()
775 regmap_read(dev->map, DW_IC_CLR_TX_ABRT, &dummy); in i2c_dw_read_clear_intrbits()
778 regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy); in i2c_dw_read_clear_intrbits()
780 regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy); in i2c_dw_read_clear_intrbits()
782 ((dev->rx_outstanding == 0) || (stat & DW_IC_INTR_RX_FULL))) in i2c_dw_read_clear_intrbits()
783 regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy); in i2c_dw_read_clear_intrbits()
785 regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy); in i2c_dw_read_clear_intrbits()
787 regmap_read(dev->map, DW_IC_CLR_GEN_CALL, &dummy); in i2c_dw_read_clear_intrbits()
798 struct dw_i2c_dev *dev = dev_id; in i2c_dw_isr() local
801 regmap_read(dev->map, DW_IC_ENABLE, &enabled); in i2c_dw_isr()
802 regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &stat); in i2c_dw_isr()
805 if (pm_runtime_suspended(dev->dev) || stat == GENMASK(31, 0)) in i2c_dw_isr()
807 dev_dbg(dev->dev, "enabled=%#x stat=%#x\n", enabled, stat); in i2c_dw_isr()
809 stat = i2c_dw_read_clear_intrbits(dev); in i2c_dw_isr()
811 if (!(dev->status & STATUS_ACTIVE)) { in i2c_dw_isr()
819 regmap_write(dev->map, DW_IC_INTR_MASK, 0); in i2c_dw_isr()
824 dev->cmd_err |= DW_IC_ERR_TX_ABRT; in i2c_dw_isr()
825 dev->status &= ~STATUS_MASK; in i2c_dw_isr()
826 dev->rx_outstanding = 0; in i2c_dw_isr()
832 regmap_write(dev->map, DW_IC_INTR_MASK, 0); in i2c_dw_isr()
837 i2c_dw_read(dev); in i2c_dw_isr()
840 i2c_dw_xfer_msg(dev); in i2c_dw_isr()
849 if (((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) && in i2c_dw_isr()
850 (dev->rx_outstanding == 0)) in i2c_dw_isr()
851 complete(&dev->cmd_complete); in i2c_dw_isr()
852 else if (unlikely(dev->flags & ACCESS_INTR_MASK)) { in i2c_dw_isr()
854 regmap_read(dev->map, DW_IC_INTR_MASK, &stat); in i2c_dw_isr()
855 regmap_write(dev->map, DW_IC_INTR_MASK, 0); in i2c_dw_isr()
856 regmap_write(dev->map, DW_IC_INTR_MASK, stat); in i2c_dw_isr()
862 void i2c_dw_configure_master(struct dw_i2c_dev *dev) in i2c_dw_configure_master() argument
864 struct i2c_timings *t = &dev->timings; in i2c_dw_configure_master()
866 dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY; in i2c_dw_configure_master()
868 dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | in i2c_dw_configure_master()
871 dev->mode = DW_IC_MASTER; in i2c_dw_configure_master()
875 dev->master_cfg |= DW_IC_CON_SPEED_STD; in i2c_dw_configure_master()
878 dev->master_cfg |= DW_IC_CON_SPEED_HIGH; in i2c_dw_configure_master()
881 dev->master_cfg |= DW_IC_CON_SPEED_FAST; in i2c_dw_configure_master()
888 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in i2c_dw_prepare_recovery() local
890 i2c_dw_disable(dev); in i2c_dw_prepare_recovery()
891 reset_control_assert(dev->rst); in i2c_dw_prepare_recovery()
892 i2c_dw_prepare_clk(dev, false); in i2c_dw_prepare_recovery()
897 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in i2c_dw_unprepare_recovery() local
899 i2c_dw_prepare_clk(dev, true); in i2c_dw_unprepare_recovery()
900 reset_control_deassert(dev->rst); in i2c_dw_unprepare_recovery()
901 i2c_dw_init_master(dev); in i2c_dw_unprepare_recovery()
904 static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev) in i2c_dw_init_recovery_info() argument
906 struct i2c_bus_recovery_info *rinfo = &dev->rinfo; in i2c_dw_init_recovery_info()
907 struct i2c_adapter *adap = &dev->adapter; in i2c_dw_init_recovery_info()
910 gpio = devm_gpiod_get_optional(dev->dev, "scl", GPIOD_OUT_HIGH); in i2c_dw_init_recovery_info()
916 gpio = devm_gpiod_get_optional(dev->dev, "sda", GPIOD_IN); in i2c_dw_init_recovery_info()
921 rinfo->pinctrl = devm_pinctrl_get(dev->dev); in i2c_dw_init_recovery_info()
927 dev_err(dev->dev, "getting pinctrl info failed: bus recovery might not work\n"); in i2c_dw_init_recovery_info()
929 dev_dbg(dev->dev, "pinctrl is disabled, bus recovery might not work\n"); in i2c_dw_init_recovery_info()
937 dev_info(dev->dev, "running with gpio recovery mode! scl%s", in i2c_dw_init_recovery_info()
943 static int i2c_dw_poll_adap_quirk(struct dw_i2c_dev *dev) in i2c_dw_poll_adap_quirk() argument
945 struct i2c_adapter *adap = &dev->adapter; in i2c_dw_poll_adap_quirk()
948 pm_runtime_get_noresume(dev->dev); in i2c_dw_poll_adap_quirk()
951 dev_err(dev->dev, "Failed to add adapter: %d\n", ret); in i2c_dw_poll_adap_quirk()
952 pm_runtime_put_noidle(dev->dev); in i2c_dw_poll_adap_quirk()
957 static bool i2c_dw_is_model_poll(struct dw_i2c_dev *dev) in i2c_dw_is_model_poll() argument
959 switch (dev->flags & MODEL_MASK) { in i2c_dw_is_model_poll()
968 int i2c_dw_probe_master(struct dw_i2c_dev *dev) in i2c_dw_probe_master() argument
970 struct i2c_adapter *adap = &dev->adapter; in i2c_dw_probe_master()
975 init_completion(&dev->cmd_complete); in i2c_dw_probe_master()
977 dev->init = i2c_dw_init_master; in i2c_dw_probe_master()
978 dev->disable = i2c_dw_disable; in i2c_dw_probe_master()
980 ret = i2c_dw_init_regmap(dev); in i2c_dw_probe_master()
984 ret = i2c_dw_set_timings_master(dev); in i2c_dw_probe_master()
988 ret = i2c_dw_set_fifo_size(dev); in i2c_dw_probe_master()
993 ret = i2c_dw_acquire_lock(dev); in i2c_dw_probe_master()
1003 ret = regmap_read(dev->map, DW_IC_CON, &ic_con); in i2c_dw_probe_master()
1004 i2c_dw_release_lock(dev); in i2c_dw_probe_master()
1009 dev->master_cfg |= DW_IC_CON_BUS_CLEAR_CTRL; in i2c_dw_probe_master()
1011 ret = dev->init(dev); in i2c_dw_probe_master()
1020 adap->dev.parent = dev->dev; in i2c_dw_probe_master()
1021 i2c_set_adapdata(adap, dev); in i2c_dw_probe_master()
1023 if (i2c_dw_is_model_poll(dev)) in i2c_dw_probe_master()
1024 return i2c_dw_poll_adap_quirk(dev); in i2c_dw_probe_master()
1026 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) { in i2c_dw_probe_master()
1032 ret = i2c_dw_acquire_lock(dev); in i2c_dw_probe_master()
1036 regmap_write(dev->map, DW_IC_INTR_MASK, 0); in i2c_dw_probe_master()
1037 i2c_dw_release_lock(dev); in i2c_dw_probe_master()
1039 ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr, irq_flags, in i2c_dw_probe_master()
1040 dev_name(dev->dev), dev); in i2c_dw_probe_master()
1042 dev_err(dev->dev, "failure requesting irq %i: %d\n", in i2c_dw_probe_master()
1043 dev->irq, ret); in i2c_dw_probe_master()
1047 ret = i2c_dw_init_recovery_info(dev); in i2c_dw_probe_master()
1057 pm_runtime_get_noresume(dev->dev); in i2c_dw_probe_master()
1060 dev_err(dev->dev, "failure adding adapter: %d\n", ret); in i2c_dw_probe_master()
1061 pm_runtime_put_noidle(dev->dev); in i2c_dw_probe_master()