Lines Matching +full:0 +full:x0007ffff
22 #define TPIU_SUPP_PORTSZ 0x000
23 #define TPIU_CURR_PORTSZ 0x004
24 #define TPIU_SUPP_TRIGMODES 0x100
25 #define TPIU_TRIG_CNTRVAL 0x104
26 #define TPIU_TRIG_MULT 0x108
27 #define TPIU_SUPP_TESTPATM 0x200
28 #define TPIU_CURR_TESTPATM 0x204
29 #define TPIU_TEST_PATREPCNTR 0x208
30 #define TPIU_FFSR 0x300
31 #define TPIU_FFCR 0x304
32 #define TPIU_FSYNC_CNTR 0x308
33 #define TPIU_EXTCTL_INPORT 0x400
34 #define TPIU_EXTCTL_OUTPORT 0x404
35 #define TPIU_ITTRFLINACK 0xee4
36 #define TPIU_ITTRFLIN 0xee8
37 #define TPIU_ITATBDATA0 0xeec
38 #define TPIU_ITATBCTR2 0xef0
39 #define TPIU_ITATBCTR1 0xef4
40 #define TPIU_ITATBCTR0 0xef8
43 /* FFSR - 0x300 */
45 /* FFCR - 0x304 */
78 return 0; in tpiu_enable()
90 coresight_timeout(csa, TPIU_FFCR, FFCR_FON_MAN_BIT, 0); in tpiu_disable_hw()
105 return 0; in tpiu_disable()
125 struct coresight_desc desc = { 0 }; in tpiu_probe()
168 return 0; in tpiu_probe()
189 return 0; in tpiu_runtime_suspend()
199 return 0; in tpiu_runtime_resume()
209 .id = 0x000bb912,
210 .mask = 0x000fffff,
213 .id = 0x0004b912,
214 .mask = 0x0007ffff,
218 .id = 0x000bb9e7,
219 .mask = 0x000fffff,
221 { 0, 0},