776 bool vmwgfx_supported(struct vmw_private *vmw);
857 int vmw_gem_object_create(struct vmw_private *vmw,
888 extern bool vmw_cmd_supported(struct vmw_private *vmw);
1455 static inline u32 vmw_fifo_mem_read(struct vmw_private *vmw, uint32 fifo_reg)  in vmw_fifo_mem_read()  argument
1457 	BUG_ON(vmw_is_svga_v3(vmw));  in vmw_fifo_mem_read()
1458 	return READ_ONCE(*(vmw->fifo_mem + fifo_reg));  in vmw_fifo_mem_read()
1469 static inline void vmw_fifo_mem_write(struct vmw_private *vmw, u32 fifo_reg,  in vmw_fifo_mem_write()  argument
1472 	BUG_ON(vmw_is_svga_v3(vmw));  in vmw_fifo_mem_write()
1473 	WRITE_ONCE(*(vmw->fifo_mem + fifo_reg), value);  in vmw_fifo_mem_write()
1493 static inline u32 vmw_irq_status_read(struct vmw_private *vmw)  in vmw_irq_status_read()  argument
1496 	if (vmw_is_svga_v3(vmw))  in vmw_irq_status_read()
1497 		status = vmw_read(vmw, SVGA_REG_IRQ_STATUS);  in vmw_irq_status_read()
1499 		status = inl(vmw->io_start + SVGA_IRQSTATUS_PORT);  in vmw_irq_status_read()
1503 static inline void vmw_irq_status_write(struct vmw_private *vmw,  in vmw_irq_status_write()  argument
1506 	if (vmw_is_svga_v3(vmw))  in vmw_irq_status_write()
1507 		vmw_write(vmw, SVGA_REG_IRQ_STATUS, status);  in vmw_irq_status_write()
1509 		outl(status, vmw->io_start + SVGA_IRQSTATUS_PORT);  in vmw_irq_status_write()
1512 static inline bool vmw_has_fences(struct vmw_private *vmw)  in vmw_has_fences()  argument
1514 	if ((vmw->capabilities & (SVGA_CAP_COMMAND_BUFFERS |  in vmw_has_fences()
1517 	return (vmw_fifo_caps(vmw) & SVGA_FIFO_CAP_FENCE) != 0;  in vmw_has_fences()