60 #define LAY_OFS	(ldev->caps.layer_ofs)
86 #define LTDC_L1C0R	(ldev->caps.layer_regs[0])	/* L1 configuration 0 */
87 #define LTDC_L1C1R	(ldev->caps.layer_regs[1])	/* L1 configuration 1 */
88 #define LTDC_L1RCR	(ldev->caps.layer_regs[2])	/* L1 reload control */
89 #define LTDC_L1CR	(ldev->caps.layer_regs[3])	/* L1 control register */
90 #define LTDC_L1WHPCR	(ldev->caps.layer_regs[4])	/* L1 window horizontal position configuration */
91 #define LTDC_L1WVPCR	(ldev->caps.layer_regs[5])	/* L1 window vertical position configuration */
92 #define LTDC_L1CKCR	(ldev->caps.layer_regs[6])	/* L1 color keying configuration */
93 #define LTDC_L1PFCR	(ldev->caps.layer_regs[7])	/* L1 pixel format configuration */
94 #define LTDC_L1CACR	(ldev->caps.layer_regs[8])	/* L1 constant alpha configuration */
95 #define LTDC_L1DCCR	(ldev->caps.layer_regs[9])	/* L1 default color configuration */
96 #define LTDC_L1BFCR	(ldev->caps.layer_regs[10])	/* L1 blending factors configuration */
97 #define LTDC_L1BLCR	(ldev->caps.layer_regs[11])	/* L1 burst length configuration */
98 #define LTDC_L1PCR	(ldev->caps.layer_regs[12])	/* L1 planar configuration */
99 #define LTDC_L1CFBAR	(ldev->caps.layer_regs[13])	/* L1 color frame buffer address */
100 #define LTDC_L1CFBLR	(ldev->caps.layer_regs[14])	/* L1 color frame buffer length */
101 #define LTDC_L1CFBLNR	(ldev->caps.layer_regs[15])	/* L1 color frame buffer line number */
102 #define LTDC_L1AFBA0R	(ldev->caps.layer_regs[16])	/* L1 auxiliary frame buffer address 0 */
103 #define LTDC_L1AFBA1R	(ldev->caps.layer_regs[17])	/* L1 auxiliary frame buffer address 1 */
104 #define LTDC_L1AFBLR	(ldev->caps.layer_regs[18])	/* L1 auxiliary frame buffer length */
105 #define LTDC_L1AFBLNR	(ldev->caps.layer_regs[19])	/* L1 auxiliary frame buffer line number */
106 #define LTDC_L1CLUTWR	(ldev->caps.layer_regs[20])	/* L1 CLUT write */
107 #define LTDC_L1CYR0R	(ldev->caps.layer_regs[21])	/* L1 Conversion YCbCr RGB 0 */
108 #define LTDC_L1CYR1R	(ldev->caps.layer_regs[22])	/* L1 Conversion YCbCr RGB 1 */
109 #define LTDC_L1FPF0R	(ldev->caps.layer_regs[23])	/* L1 Flexible Pixel Format 0 */
110 #define LTDC_L1FPF1R	(ldev->caps.layer_regs[24])	/* L1 Flexible Pixel Format 1 */
554 	struct ltdc_device *ldev = plane_to_ltdc(plane);  in ltdc_set_flexible_pixel_format()  local
595 		regmap_write(ldev->regmap, LTDC_L1FPF0R + lofs,  in ltdc_set_flexible_pixel_format()
598 		regmap_write(ldev->regmap, LTDC_L1FPF1R + lofs,  in ltdc_set_flexible_pixel_format()
616 	struct ltdc_device *ldev = plane_to_ltdc(plane);  in ltdc_set_ycbcr_config()  local
657 	regmap_write(ldev->regmap, LTDC_L1PCR + lofs, val);  in ltdc_set_ycbcr_config()
662 	struct ltdc_device *ldev = plane_to_ltdc(plane);  in ltdc_set_ycbcr_coeffs()  local
681 	regmap_write(ldev->regmap, LTDC_L1CYR0R + lofs,  in ltdc_set_ycbcr_coeffs()
683 	regmap_write(ldev->regmap, LTDC_L1CYR1R + lofs,  in ltdc_set_ycbcr_coeffs()
687 static inline void ltdc_irq_crc_handle(struct ltdc_device *ldev,  in ltdc_irq_crc_handle()  argument
693 	if (ldev->crc_skip_count < CRC_SKIP_FRAMES) {  in ltdc_irq_crc_handle()
694 		ldev->crc_skip_count++;  in ltdc_irq_crc_handle()
699 	ret = regmap_read(ldev->regmap, LTDC_CCRCR, &crc);  in ltdc_irq_crc_handle()
710 	struct ltdc_device *ldev = ddev->dev_private;  in ltdc_irq_thread()  local
714 	if (ldev->irq_status & ISR_LIF) {  in ltdc_irq_thread()
718 		if (ldev->crc_active)  in ltdc_irq_thread()
719 			ltdc_irq_crc_handle(ldev, crtc);  in ltdc_irq_thread()
722 	mutex_lock(&ldev->err_lock);  in ltdc_irq_thread()
723 	if (ldev->irq_status & ISR_TERRIF)  in ltdc_irq_thread()
724 		ldev->transfer_err++;  in ltdc_irq_thread()
725 	if (ldev->irq_status & ISR_FUEIF)  in ltdc_irq_thread()
726 		ldev->fifo_err++;  in ltdc_irq_thread()
727 	if (ldev->irq_status & ISR_FUWIF)  in ltdc_irq_thread()
728 		ldev->fifo_warn++;  in ltdc_irq_thread()
729 	mutex_unlock(&ldev->err_lock);  in ltdc_irq_thread()
737 	struct ltdc_device *ldev = ddev->dev_private;  in ltdc_irq()  local
744 	ldev->irq_status = readl_relaxed(ldev->regs + LTDC_ISR);  in ltdc_irq()
745 	writel_relaxed(ldev->irq_status, ldev->regs + LTDC_ICR);  in ltdc_irq()
756 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);  in ltdc_crtc_update_clut()  local
769 		regmap_write(ldev->regmap, LTDC_L1CLUTWR, val);  in ltdc_crtc_update_clut()
776 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);  in ltdc_crtc_atomic_enable()  local
784 	regmap_write(ldev->regmap, LTDC_BCCR, BCCR_BCBLACK);  in ltdc_crtc_atomic_enable()
787 	regmap_set_bits(ldev->regmap, LTDC_IER, IER_FUWIE | IER_FUEIE | IER_RRIE | IER_TERRIE);  in ltdc_crtc_atomic_enable()
790 	if (!ldev->caps.plane_reg_shadow)  in ltdc_crtc_atomic_enable()
791 		regmap_set_bits(ldev->regmap, LTDC_SRCR, SRCR_VBR);  in ltdc_crtc_atomic_enable()
799 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);  in ltdc_crtc_atomic_disable()  local
808 	for (layer_index = 0; layer_index < ldev->caps.nb_layers; layer_index++)  in ltdc_crtc_atomic_disable()
809 		regmap_write_bits(ldev->regmap, LTDC_L1CR + layer_index * LAY_OFS,  in ltdc_crtc_atomic_disable()
813 	regmap_clear_bits(ldev->regmap, LTDC_IER, IER_FUWIE | IER_FUEIE | IER_RRIE | IER_TERRIE);  in ltdc_crtc_atomic_disable()
816 	if (!ldev->caps.plane_reg_shadow)  in ltdc_crtc_atomic_disable()
817 		regmap_set_bits(ldev->regmap, LTDC_SRCR, SRCR_IMR);  in ltdc_crtc_atomic_disable()
822 	mutex_lock(&ldev->err_lock);  in ltdc_crtc_atomic_disable()
823 	ldev->transfer_err = 0;  in ltdc_crtc_atomic_disable()
824 	ldev->fifo_err = 0;  in ltdc_crtc_atomic_disable()
825 	ldev->fifo_warn = 0;  in ltdc_crtc_atomic_disable()
826 	mutex_unlock(&ldev->err_lock);  in ltdc_crtc_atomic_disable()
835 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);  in ltdc_crtc_mode_valid()  local
841 	result = clk_round_rate(ldev->pixel_clk, target);  in ltdc_crtc_mode_valid()
846 	if (result > ldev->caps.pad_max_freq_hz)  in ltdc_crtc_mode_valid()
874 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);  in ltdc_crtc_mode_fixup()  local
877 	if (clk_set_rate(ldev->pixel_clk, rate) < 0) {  in ltdc_crtc_mode_fixup()
882 	adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000;  in ltdc_crtc_mode_fixup()
892 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);  in ltdc_crtc_mode_set_nofb()  local
980 	regmap_update_bits(ldev->regmap, LTDC_GCR,  in ltdc_crtc_mode_set_nofb()
985 	regmap_update_bits(ldev->regmap, LTDC_SSCR, SSCR_VSH | SSCR_HSW, val);  in ltdc_crtc_mode_set_nofb()
989 	regmap_update_bits(ldev->regmap, LTDC_BPCR, BPCR_AVBP | BPCR_AHBP, val);  in ltdc_crtc_mode_set_nofb()
993 	regmap_update_bits(ldev->regmap, LTDC_AWCR, AWCR_AAW | AWCR_AAH, val);  in ltdc_crtc_mode_set_nofb()
997 	regmap_update_bits(ldev->regmap, LTDC_TWCR, TWCR_TOTALH | TWCR_TOTALW, val);  in ltdc_crtc_mode_set_nofb()
999 	regmap_write(ldev->regmap, LTDC_LIPCR, (accum_act_h + 1));  in ltdc_crtc_mode_set_nofb()
1002 	if (ldev->caps.ycbcr_output) {  in ltdc_crtc_mode_set_nofb()
1018 			regmap_write(ldev->regmap, LTDC_EDCR, EDCR_OCYEN | val);  in ltdc_crtc_mode_set_nofb()
1022 			regmap_write(ldev->regmap, LTDC_EDCR, EDCR_OCYEN | EDCR_OCYCO | val);  in ltdc_crtc_mode_set_nofb()
1026 			regmap_write(ldev->regmap, LTDC_EDCR, 0);  in ltdc_crtc_mode_set_nofb()
1035 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);  in ltdc_crtc_atomic_flush()  local
1044 	if (!ldev->caps.plane_reg_shadow)  in ltdc_crtc_atomic_flush()
1045 		regmap_set_bits(ldev->regmap, LTDC_SRCR, SRCR_VBR);  in ltdc_crtc_atomic_flush()
1066 	struct ltdc_device *ldev = ddev->dev_private;  in ltdc_crtc_get_scanout_position()  local
1087 		regmap_read(ldev->regmap, LTDC_CPSR, &line);  in ltdc_crtc_get_scanout_position()
1089 		regmap_read(ldev->regmap, LTDC_BPCR, &vactive_start);  in ltdc_crtc_get_scanout_position()
1091 		regmap_read(ldev->regmap, LTDC_AWCR, &vactive_end);  in ltdc_crtc_get_scanout_position()
1093 		regmap_read(ldev->regmap, LTDC_TWCR, &vtotal);  in ltdc_crtc_get_scanout_position()
1124 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);  in ltdc_crtc_enable_vblank()  local
1130 		regmap_set_bits(ldev->regmap, LTDC_IER, IER_LIE);  in ltdc_crtc_enable_vblank()
1139 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);  in ltdc_crtc_disable_vblank()  local
1142 	regmap_clear_bits(ldev->regmap, LTDC_IER, IER_LIE);  in ltdc_crtc_disable_vblank()
1147 	struct ltdc_device *ldev;  in ltdc_crtc_set_crc_source()  local
1155 	ldev = crtc_to_ltdc(crtc);  in ltdc_crtc_set_crc_source()
1158 		ldev->crc_active = true;  in ltdc_crtc_set_crc_source()
1159 		ret = regmap_set_bits(ldev->regmap, LTDC_GCR, GCR_CRCEN);  in ltdc_crtc_set_crc_source()
1161 		ldev->crc_active = false;  in ltdc_crtc_set_crc_source()
1162 		ret = regmap_clear_bits(ldev->regmap, LTDC_GCR, GCR_CRCEN);  in ltdc_crtc_set_crc_source()
1167 	ldev->crc_skip_count = 0;  in ltdc_crtc_set_crc_source()
1193 	struct ltdc_device *ldev = crtc_to_ltdc(crtc);  in ltdc_crtc_atomic_print_state()  local
1195 	drm_printf(p, "\ttransfer_error=%d\n", ldev->transfer_err);  in ltdc_crtc_atomic_print_state()
1196 	drm_printf(p, "\tfifo_underrun_error=%d\n", ldev->fifo_err);  in ltdc_crtc_atomic_print_state()
1197 	drm_printf(p, "\tfifo_underrun_warning=%d\n", ldev->fifo_warn);  in ltdc_crtc_atomic_print_state()
1198 	drm_printf(p, "\tfifo_underrun_threshold=%d\n", ldev->fifo_threshold);  in ltdc_crtc_atomic_print_state()
1263 	struct ltdc_device *ldev = plane_to_ltdc(plane);  in ltdc_plane_atomic_update()  local
1294 	regmap_read(ldev->regmap, LTDC_BPCR, &bpcr);  in ltdc_plane_atomic_update()
1301 	regmap_write_bits(ldev->regmap, LTDC_L1WHPCR + lofs,  in ltdc_plane_atomic_update()
1306 	regmap_write_bits(ldev->regmap, LTDC_L1WVPCR + lofs,  in ltdc_plane_atomic_update()
1312 		if (ldev->caps.pix_fmt_hw[val] == pf)  in ltdc_plane_atomic_update()
1316 	if (ldev->caps.pix_fmt_flex && val == NB_PF)  in ltdc_plane_atomic_update()
1324 	regmap_write_bits(ldev->regmap, LTDC_L1PFCR + lofs, LXPFCR_PF, val);  in ltdc_plane_atomic_update()
1328 	regmap_write_bits(ldev->regmap, LTDC_L1CACR + lofs, LXCACR_CONSTA, val);  in ltdc_plane_atomic_update()
1336 	if (ldev->caps.non_alpha_only_l1 &&  in ltdc_plane_atomic_update()
1340 	if (ldev->caps.dynamic_zorder) {  in ltdc_plane_atomic_update()
1342 		regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs,  in ltdc_plane_atomic_update()
1345 		regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs,  in ltdc_plane_atomic_update()
1359 	regmap_write(ldev->regmap, LTDC_L1CFBAR + lofs, paddr);  in ltdc_plane_atomic_update()
1363 		      (x1 - x0 + 1) + (ldev->caps.bus_width >> 3) - 1;  in ltdc_plane_atomic_update()
1372 	regmap_write_bits(ldev->regmap, LTDC_L1CFBLR + lofs, LXCFBLR_CFBLL | LXCFBLR_CFBP, val);  in ltdc_plane_atomic_update()
1376 	regmap_write_bits(ldev->regmap, LTDC_L1CFBLNR + lofs, LXCFBLNR_CFBLN, line_number);  in ltdc_plane_atomic_update()
1378 	if (ldev->caps.ycbcr_input) {  in ltdc_plane_atomic_update()
1392 			regmap_write(ldev->regmap, LTDC_L1AFBA0R + lofs, paddr1);  in ltdc_plane_atomic_update()
1409 			regmap_write(ldev->regmap, LTDC_L1AFBA0R + lofs, paddr1);  in ltdc_plane_atomic_update()
1410 			regmap_write(ldev->regmap, LTDC_L1AFBA1R + lofs, paddr2);  in ltdc_plane_atomic_update()
1427 			regmap_write(ldev->regmap, LTDC_L1AFBA0R + lofs, paddr1);  in ltdc_plane_atomic_update()
1428 			regmap_write(ldev->regmap, LTDC_L1AFBA1R + lofs, paddr2);  in ltdc_plane_atomic_update()
1447 					      (ldev->caps.bus_width >> 3) - 1;  in ltdc_plane_atomic_update()
1451 				regmap_write(ldev->regmap, LTDC_L1AFBLR + lofs, val);  in ltdc_plane_atomic_update()
1455 				regmap_write(ldev->regmap, LTDC_L1AFBLNR + lofs, val);  in ltdc_plane_atomic_update()
1465 			regmap_write(ldev->regmap, LTDC_L1PCR + lofs, 0);  in ltdc_plane_atomic_update()
1477 	regmap_write_bits(ldev->regmap, LTDC_L1CR + lofs, LXCR_LEN | LXCR_CLUTEN | LXCR_HMEN, val);  in ltdc_plane_atomic_update()
1480 	if (ldev->caps.plane_reg_shadow)  in ltdc_plane_atomic_update()
1481 		regmap_write_bits(ldev->regmap, LTDC_L1RCR + lofs,  in ltdc_plane_atomic_update()
1484 	ldev->plane_fpsi[plane->index].counter++;  in ltdc_plane_atomic_update()
1486 	mutex_lock(&ldev->err_lock);  in ltdc_plane_atomic_update()
1487 	if (ldev->transfer_err) {  in ltdc_plane_atomic_update()
1488 		DRM_WARN("ltdc transfer error: %d\n", ldev->transfer_err);  in ltdc_plane_atomic_update()
1489 		ldev->transfer_err = 0;  in ltdc_plane_atomic_update()
1492 	if (ldev->caps.fifo_threshold) {  in ltdc_plane_atomic_update()
1493 		if (ldev->fifo_err) {  in ltdc_plane_atomic_update()
1495 			ldev->fifo_err = 0;  in ltdc_plane_atomic_update()
1498 		if (ldev->fifo_warn >= ldev->fifo_threshold) {  in ltdc_plane_atomic_update()
1500 			ldev->fifo_warn = 0;  in ltdc_plane_atomic_update()
1503 	mutex_unlock(&ldev->err_lock);  in ltdc_plane_atomic_update()
1511 	struct ltdc_device *ldev = plane_to_ltdc(plane);  in ltdc_plane_atomic_disable()  local
1515 	regmap_write_bits(ldev->regmap, LTDC_L1CR + lofs, LXCR_LEN | LXCR_CLUTEN |  LXCR_HMEN, 0);  in ltdc_plane_atomic_disable()
1518 	if (ldev->caps.plane_reg_shadow)  in ltdc_plane_atomic_disable()
1519 		regmap_write_bits(ldev->regmap, LTDC_L1RCR + lofs,  in ltdc_plane_atomic_disable()
1530 	struct ltdc_device *ldev = plane_to_ltdc(plane);  in ltdc_plane_atomic_print_state()  local
1531 	struct fps_info *fpsi = &ldev->plane_fpsi[plane->index];  in ltdc_plane_atomic_print_state()
1566 	struct ltdc_device *ldev = ddev->dev_private;  in ltdc_plane_create()  local
1578 	formats = devm_kzalloc(dev, (ldev->caps.pix_fmt_nb +  in ltdc_plane_create()
1584 	for (i = 0; i < ldev->caps.pix_fmt_nb; i++) {  in ltdc_plane_create()
1585 		drm_fmt = ldev->caps.pix_fmt_drm[i];  in ltdc_plane_create()
1588 		if (ldev->caps.non_alpha_only_l1)  in ltdc_plane_create()
1597 	if (ldev->caps.ycbcr_input) {  in ltdc_plane_create()
1598 		regmap_read(ldev->regmap, LTDC_L1C1R + lofs, &val);  in ltdc_plane_create()
1626 	if (ldev->caps.ycbcr_input) {  in ltdc_plane_create()
1657 	struct ltdc_device *ldev = ddev->dev_private;  in ltdc_crtc_init()  local
1669 	if (ldev->caps.dynamic_zorder)  in ltdc_crtc_init()
1670 		drm_plane_create_zpos_property(primary, 0, 0, ldev->caps.nb_layers - 1);  in ltdc_crtc_init()
1674 	if (ldev->caps.plane_rotation)  in ltdc_crtc_init()
1679 	if (ldev->caps.crc)  in ltdc_crtc_init()
1698 	for (i = 1; i < ldev->caps.nb_layers; i++) {  in ltdc_crtc_init()
1705 		if (ldev->caps.dynamic_zorder)  in ltdc_crtc_init()
1706 			drm_plane_create_zpos_property(overlay, i, 0, ldev->caps.nb_layers - 1);  in ltdc_crtc_init()
1710 		if (ldev->caps.plane_rotation)  in ltdc_crtc_init()
1725 	struct ltdc_device *ldev = ddev->dev_private;  in ltdc_encoder_disable()  local
1730 	regmap_clear_bits(ldev->regmap, LTDC_GCR, GCR_LTDCEN);  in ltdc_encoder_disable()
1739 	struct ltdc_device *ldev = ddev->dev_private;  in ltdc_encoder_enable()  local
1744 	if (ldev->caps.fifo_threshold)  in ltdc_encoder_enable()
1745 		regmap_write(ldev->regmap, LTDC_FUT, ldev->fifo_threshold);  in ltdc_encoder_enable()
1748 	regmap_set_bits(ldev->regmap, LTDC_GCR, GCR_LTDCEN);  in ltdc_encoder_enable()
1804 	struct ltdc_device *ldev = ddev->dev_private;  in ltdc_get_caps()  local
1811 	regmap_read(ldev->regmap, LTDC_LCR, &lcr);  in ltdc_get_caps()
1813 	ldev->caps.nb_layers = clamp((int)lcr, 1, LTDC_MAX_LAYER);  in ltdc_get_caps()
1816 	regmap_read(ldev->regmap, LTDC_GC2R, &gc2r);  in ltdc_get_caps()
1818 	ldev->caps.bus_width = 8 << bus_width_log2;  in ltdc_get_caps()
1819 	regmap_read(ldev->regmap, LTDC_IDR, &ldev->caps.hw_version);  in ltdc_get_caps()
1821 	switch (ldev->caps.hw_version) {  in ltdc_get_caps()
1824 		ldev->caps.layer_ofs = LAY_OFS_0;  in ltdc_get_caps()
1825 		ldev->caps.layer_regs = ltdc_layer_regs_a0;  in ltdc_get_caps()
1826 		ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a0;  in ltdc_get_caps()
1827 		ldev->caps.pix_fmt_drm = ltdc_drm_fmt_a0;  in ltdc_get_caps()
1828 		ldev->caps.pix_fmt_nb = ARRAY_SIZE(ltdc_drm_fmt_a0);  in ltdc_get_caps()
1829 		ldev->caps.pix_fmt_flex = false;  in ltdc_get_caps()
1837 		ldev->caps.non_alpha_only_l1 = true;  in ltdc_get_caps()
1838 		ldev->caps.pad_max_freq_hz = 90000000;  in ltdc_get_caps()
1839 		if (ldev->caps.hw_version == HWVER_10200)  in ltdc_get_caps()
1840 			ldev->caps.pad_max_freq_hz = 65000000;  in ltdc_get_caps()
1841 		ldev->caps.nb_irq = 2;  in ltdc_get_caps()
1842 		ldev->caps.ycbcr_input = false;  in ltdc_get_caps()
1843 		ldev->caps.ycbcr_output = false;  in ltdc_get_caps()
1844 		ldev->caps.plane_reg_shadow = false;  in ltdc_get_caps()
1845 		ldev->caps.crc = false;  in ltdc_get_caps()
1846 		ldev->caps.dynamic_zorder = false;  in ltdc_get_caps()
1847 		ldev->caps.plane_rotation = false;  in ltdc_get_caps()
1848 		ldev->caps.fifo_threshold = false;  in ltdc_get_caps()
1851 		ldev->caps.layer_ofs = LAY_OFS_0;  in ltdc_get_caps()
1852 		ldev->caps.layer_regs = ltdc_layer_regs_a1;  in ltdc_get_caps()
1853 		ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a1;  in ltdc_get_caps()
1854 		ldev->caps.pix_fmt_drm = ltdc_drm_fmt_a1;  in ltdc_get_caps()
1855 		ldev->caps.pix_fmt_nb = ARRAY_SIZE(ltdc_drm_fmt_a1);  in ltdc_get_caps()
1856 		ldev->caps.pix_fmt_flex = false;  in ltdc_get_caps()
1857 		ldev->caps.non_alpha_only_l1 = false;  in ltdc_get_caps()
1858 		ldev->caps.pad_max_freq_hz = 150000000;  in ltdc_get_caps()
1859 		ldev->caps.nb_irq = 4;  in ltdc_get_caps()
1860 		ldev->caps.ycbcr_input = false;  in ltdc_get_caps()
1861 		ldev->caps.ycbcr_output = false;  in ltdc_get_caps()
1862 		ldev->caps.plane_reg_shadow = false;  in ltdc_get_caps()
1863 		ldev->caps.crc = false;  in ltdc_get_caps()
1864 		ldev->caps.dynamic_zorder = false;  in ltdc_get_caps()
1865 		ldev->caps.plane_rotation = false;  in ltdc_get_caps()
1866 		ldev->caps.fifo_threshold = false;  in ltdc_get_caps()
1869 		ldev->caps.layer_ofs = LAY_OFS_1;  in ltdc_get_caps()
1870 		ldev->caps.layer_regs = ltdc_layer_regs_a2;  in ltdc_get_caps()
1871 		ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a2;  in ltdc_get_caps()
1872 		ldev->caps.pix_fmt_drm = ltdc_drm_fmt_a2;  in ltdc_get_caps()
1873 		ldev->caps.pix_fmt_nb = ARRAY_SIZE(ltdc_drm_fmt_a2);  in ltdc_get_caps()
1874 		ldev->caps.pix_fmt_flex = true;  in ltdc_get_caps()
1875 		ldev->caps.non_alpha_only_l1 = false;  in ltdc_get_caps()
1876 		ldev->caps.pad_max_freq_hz = 90000000;  in ltdc_get_caps()
1877 		ldev->caps.nb_irq = 2;  in ltdc_get_caps()
1878 		ldev->caps.ycbcr_input = true;  in ltdc_get_caps()
1879 		ldev->caps.ycbcr_output = true;  in ltdc_get_caps()
1880 		ldev->caps.plane_reg_shadow = true;  in ltdc_get_caps()
1881 		ldev->caps.crc = true;  in ltdc_get_caps()
1882 		ldev->caps.dynamic_zorder = true;  in ltdc_get_caps()
1883 		ldev->caps.plane_rotation = true;  in ltdc_get_caps()
1884 		ldev->caps.fifo_threshold = true;  in ltdc_get_caps()
1895 	struct ltdc_device *ldev = ddev->dev_private;  in ltdc_suspend()  local
1898 	clk_disable_unprepare(ldev->pixel_clk);  in ltdc_suspend()
1903 	struct ltdc_device *ldev = ddev->dev_private;  in ltdc_resume()  local
1908 	ret = clk_prepare_enable(ldev->pixel_clk);  in ltdc_resume()
1920 	struct ltdc_device *ldev = ddev->dev_private;  in ltdc_load()  local
1938 	ldev->pixel_clk = devm_clk_get(dev, "lcd");  in ltdc_load()
1939 	if (IS_ERR(ldev->pixel_clk)) {  in ltdc_load()
1940 		if (PTR_ERR(ldev->pixel_clk) != -EPROBE_DEFER)  in ltdc_load()
1942 		return PTR_ERR(ldev->pixel_clk);  in ltdc_load()
1945 	if (clk_prepare_enable(ldev->pixel_clk)) {  in ltdc_load()
1986 	mutex_init(&ldev->err_lock);  in ltdc_load()
1995 	ldev->regs = devm_ioremap_resource(dev, res);  in ltdc_load()
1996 	if (IS_ERR(ldev->regs)) {  in ltdc_load()
1998 		ret = PTR_ERR(ldev->regs);  in ltdc_load()
2002 	ldev->regmap = devm_regmap_init_mmio(&pdev->dev, ldev->regs, &stm32_ltdc_regmap_cfg);  in ltdc_load()
2003 	if (IS_ERR(ldev->regmap)) {  in ltdc_load()
2005 		ret = PTR_ERR(ldev->regmap);  in ltdc_load()
2012 			  ldev->caps.hw_version);  in ltdc_load()
2017 	if (ldev->caps.fifo_threshold)  in ltdc_load()
2018 		regmap_clear_bits(ldev->regmap, LTDC_IER, IER_LIE | IER_RRIE | IER_FUWIE |  in ltdc_load()
2021 		regmap_clear_bits(ldev->regmap, LTDC_IER, IER_LIE | IER_RRIE | IER_FUWIE |  in ltdc_load()
2024 	DRM_DEBUG_DRIVER("ltdc hw version 0x%08x\n", ldev->caps.hw_version);  in ltdc_load()
2027 	ldev->transfer_err = 0;  in ltdc_load()
2028 	ldev->fifo_err = 0;  in ltdc_load()
2029 	ldev->fifo_warn = 0;  in ltdc_load()
2030 	ldev->fifo_threshold = FUT_DFT;  in ltdc_load()
2032 	for (i = 0; i < ldev->caps.nb_irq; i++) {  in ltdc_load()
2067 	clk_disable_unprepare(ldev->pixel_clk);  in ltdc_load()
2078 	clk_disable_unprepare(ldev->pixel_clk);  in ltdc_load()