595 		    && !radeon_crtc->ss_enabled)  in atombios_adjust_pll()
621 		if (radeon_crtc->ss_enabled) {  in atombios_adjust_pll()
690 				if (radeon_crtc->ss_enabled && radeon_crtc->ss.percentage)  in atombios_adjust_pll()
703 				if (radeon_crtc->ss_enabled && radeon_crtc->ss.percentage)  in atombios_adjust_pll()
826 				      bool ss_enabled,  in atombios_crtc_program_pll()  argument
877 			if (ss_enabled && (ss->type & ATOM_EXTERNAL_SS_MASK))  in atombios_crtc_program_pll()
890 			if (ss_enabled && (ss->type & ATOM_EXTERNAL_SS_MASK))  in atombios_crtc_program_pll()
919 			if (ss_enabled && (ss->type & ATOM_EXTERNAL_SS_MASK))  in atombios_crtc_program_pll()
965 	radeon_crtc->ss_enabled = false;  in atombios_crtc_prepare_pll()
988 				radeon_crtc->ss_enabled =  in atombios_crtc_prepare_pll()
994 					radeon_crtc->ss_enabled =  in atombios_crtc_prepare_pll()
998 					if (!radeon_crtc->ss_enabled)  in atombios_crtc_prepare_pll()
999 						radeon_crtc->ss_enabled =  in atombios_crtc_prepare_pll()
1004 					radeon_crtc->ss_enabled =  in atombios_crtc_prepare_pll()
1010 				radeon_crtc->ss_enabled = false;  in atombios_crtc_prepare_pll()
1015 				radeon_crtc->ss_enabled =  in atombios_crtc_prepare_pll()
1021 				radeon_crtc->ss_enabled =  in atombios_crtc_prepare_pll()
1028 				radeon_crtc->ss_enabled =  in atombios_crtc_prepare_pll()
1036 				radeon_crtc->ss_enabled =  in atombios_crtc_prepare_pll()
1108 				  radeon_crtc->bpc, radeon_crtc->ss_enabled, &radeon_crtc->ss);  in atombios_crtc_set_pll()
1110 	if (radeon_crtc->ss_enabled) {  in atombios_crtc_set_pll()
1817 			    (radeon_crtc->ss_enabled == test_radeon_crtc->ss_enabled) &&  in radeon_get_shared_nondp_ppll()
2027 		bool ss_enabled = radeon_atombios_get_asic_ss_info(rdev, &ss,  in radeon_atom_disp_eng_pll_init()  local
2030 		if (ss_enabled)  in radeon_atom_disp_eng_pll_init()
2034 		if (ss_enabled)  in radeon_atom_disp_eng_pll_init()