Lines Matching +full:0 +full:x1f

42 	{ 0x22, 0x0A }, /* BGR SS GS */
43 { 0x31, 0x00 }, /* column inversion */
44 { 0x53, 0xA2 }, /* VCOM1 */
45 { 0x55, 0xA2 }, /* VCOM2 */
46 { 0x50, 0x81 }, /* VREG1OUT=5V */
47 { 0x51, 0x85 }, /* VREG2OUT=-5V */
48 { 0x62, 0x0D }, /* EQT Time setting */
53 { 0xA0, 0x00 },
54 { 0xA1, 0x1A },
55 { 0xA2, 0x28 },
56 { 0xA3, 0x13 },
57 { 0xA4, 0x16 },
58 { 0xA5, 0x29 },
59 { 0xA6, 0x1D },
60 { 0xA7, 0x1E },
61 { 0xA8, 0x84 },
62 { 0xA9, 0x1C },
63 { 0xAA, 0x28 },
64 { 0xAB, 0x75 },
65 { 0xAC, 0x1A },
66 { 0xAD, 0x19 },
67 { 0xAE, 0x4D },
68 { 0xAF, 0x22 },
69 { 0xB0, 0x28 },
70 { 0xB1, 0x54 },
71 { 0xB2, 0x66 },
72 { 0xB3, 0x39 },
73 { 0xC0, 0x00 },
74 { 0xC1, 0x1A },
75 { 0xC2, 0x28 },
76 { 0xC3, 0x13 },
77 { 0xC4, 0x16 },
78 { 0xC5, 0x29 },
79 { 0xC6, 0x1D },
80 { 0xC7, 0x1E },
81 { 0xC8, 0x84 },
82 { 0xC9, 0x1C },
83 { 0xCA, 0x28 },
84 { 0xCB, 0x75 },
85 { 0xCC, 0x1A },
86 { 0xCD, 0x19 },
87 { 0xCE, 0x4D },
88 { 0xCF, 0x22 },
89 { 0xD0, 0x28 },
90 { 0xD1, 0x54 },
91 { 0xD2, 0x66 },
92 { 0xD3, 0x39 },
96 { 0x01, 0x00 },
97 { 0x02, 0x00 },
98 { 0x03, 0x73 },
99 { 0x04, 0x00 },
100 { 0x05, 0x00 },
101 { 0x06, 0x0a },
102 { 0x07, 0x00 },
103 { 0x08, 0x00 },
104 { 0x09, 0x01 },
105 { 0x0a, 0x00 },
106 { 0x0b, 0x00 },
107 { 0x0c, 0x01 },
108 { 0x0d, 0x00 },
109 { 0x0e, 0x00 },
110 { 0x0f, 0x1d },
111 { 0x10, 0x1d },
112 { 0x11, 0x00 },
113 { 0x12, 0x00 },
114 { 0x13, 0x00 },
115 { 0x14, 0x00 },
116 { 0x15, 0x00 },
117 { 0x16, 0x00 },
118 { 0x17, 0x00 },
119 { 0x18, 0x00 },
120 { 0x19, 0x00 },
121 { 0x1a, 0x00 },
122 { 0x1b, 0x00 },
123 { 0x1c, 0x00 },
124 { 0x1d, 0x00 },
125 { 0x1e, 0x40 },
126 { 0x1f, 0x80 },
127 { 0x20, 0x06 },
128 { 0x21, 0x02 },
129 { 0x22, 0x00 },
130 { 0x23, 0x00 },
131 { 0x24, 0x00 },
132 { 0x25, 0x00 },
133 { 0x26, 0x00 },
134 { 0x27, 0x00 },
135 { 0x28, 0x33 },
136 { 0x29, 0x03 },
137 { 0x2a, 0x00 },
138 { 0x2b, 0x00 },
139 { 0x2c, 0x00 },
140 { 0x2d, 0x00 },
141 { 0x2e, 0x00 },
142 { 0x2f, 0x00 },
143 { 0x30, 0x00 },
144 { 0x31, 0x00 },
145 { 0x32, 0x00 },
146 { 0x33, 0x00 },
147 { 0x34, 0x04 },
148 { 0x35, 0x00 },
149 { 0x36, 0x00 },
150 { 0x37, 0x00 },
151 { 0x38, 0x3C },
152 { 0x39, 0x35 },
153 { 0x3A, 0x01 },
154 { 0x3B, 0x40 },
155 { 0x3C, 0x00 },
156 { 0x3D, 0x01 },
157 { 0x3E, 0x00 },
158 { 0x3F, 0x00 },
159 { 0x40, 0x00 },
160 { 0x41, 0x88 },
161 { 0x42, 0x00 },
162 { 0x43, 0x00 },
163 { 0x44, 0x1F },
164 { 0x50, 0x01 },
165 { 0x51, 0x23 },
166 { 0x52, 0x45 },
167 { 0x53, 0x67 },
168 { 0x54, 0x89 },
169 { 0x55, 0xab },
170 { 0x56, 0x01 },
171 { 0x57, 0x23 },
172 { 0x58, 0x45 },
173 { 0x59, 0x67 },
174 { 0x5a, 0x89 },
175 { 0x5b, 0xab },
176 { 0x5c, 0xcd },
177 { 0x5d, 0xef },
178 { 0x5e, 0x11 },
179 { 0x5f, 0x01 },
180 { 0x60, 0x00 },
181 { 0x61, 0x15 },
182 { 0x62, 0x14 },
183 { 0x63, 0x0E },
184 { 0x64, 0x0F },
185 { 0x65, 0x0C },
186 { 0x66, 0x0D },
187 { 0x67, 0x06 },
188 { 0x68, 0x02 },
189 { 0x69, 0x07 },
190 { 0x6a, 0x02 },
191 { 0x6b, 0x02 },
192 { 0x6c, 0x02 },
193 { 0x6d, 0x02 },
194 { 0x6e, 0x02 },
195 { 0x6f, 0x02 },
196 { 0x70, 0x02 },
197 { 0x71, 0x02 },
198 { 0x72, 0x02 },
199 { 0x73, 0x02 },
200 { 0x74, 0x02 },
201 { 0x75, 0x01 },
202 { 0x76, 0x00 },
203 { 0x77, 0x14 },
204 { 0x78, 0x15 },
205 { 0x79, 0x0E },
206 { 0x7a, 0x0F },
207 { 0x7b, 0x0C },
208 { 0x7c, 0x0D },
209 { 0x7d, 0x06 },
210 { 0x7e, 0x02 },
211 { 0x7f, 0x07 },
212 { 0x80, 0x02 },
213 { 0x81, 0x02 },
214 { 0x82, 0x02 },
215 { 0x83, 0x02 },
216 { 0x84, 0x02 },
217 { 0x85, 0x02 },
218 { 0x86, 0x02 },
219 { 0x87, 0x02 },
220 { 0x88, 0x02 },
221 { 0x89, 0x02 },
222 { 0x8A, 0x02 },
226 { 0x70, 0x00 },
227 { 0x71, 0x00 },
228 { 0x82, 0x0F }, /* VGH_MOD clamp level=15v */
229 { 0x84, 0x0F }, /* VGH clamp level 15V */
230 { 0x85, 0x0D }, /* VGL clamp level (-10V) */
231 { 0x32, 0xAC },
232 { 0x8C, 0x80 },
233 { 0x3C, 0xF5 },
234 { 0xB5, 0x07 }, /* GAMMA OP */
235 { 0x31, 0x45 }, /* SOURCE OP */
236 { 0x3A, 0x24 }, /* PS_EN OFF */
237 { 0x88, 0x33 }, /* LVD */
255 mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x93, 0x65, 0xf8); in ltk050h3146w_init_sequence()
256 mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x01, 0x03, 0x02, 0x00, 0x64, 0x06, in ltk050h3146w_init_sequence()
257 0x01); in ltk050h3146w_init_sequence()
258 mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0xb5); in ltk050h3146w_init_sequence()
259 mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x00, 0xb5); in ltk050h3146w_init_sequence()
260 mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x00, 0xbf, 0x00, 0x00, 0xbf, 0x00); in ltk050h3146w_init_sequence()
262 mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xc4, 0x23, 0x07); in ltk050h3146w_init_sequence()
263 mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x02, 0x01, 0x24, 0x00, 0x28, 0x0f, in ltk050h3146w_init_sequence()
264 0x28, 0x04, 0xcc, 0xcc, 0xcc); in ltk050h3146w_init_sequence()
265 mipi_dsi_dcs_write_seq(dsi, 0xbc, 0x0f, 0x04); in ltk050h3146w_init_sequence()
266 mipi_dsi_dcs_write_seq(dsi, 0xbe, 0x1e, 0xf2); in ltk050h3146w_init_sequence()
267 mipi_dsi_dcs_write_seq(dsi, 0xc0, 0x26, 0x03); in ltk050h3146w_init_sequence()
268 mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x12); in ltk050h3146w_init_sequence()
269 mipi_dsi_dcs_write_seq(dsi, 0xc3, 0x04, 0x02, 0x02, 0x76, 0x01, 0x80, in ltk050h3146w_init_sequence()
270 0x80); in ltk050h3146w_init_sequence()
271 mipi_dsi_dcs_write_seq(dsi, 0xc4, 0x24, 0x80, 0xb4, 0x81, 0x12, 0x0f, in ltk050h3146w_init_sequence()
272 0x16, 0x00, 0x00); in ltk050h3146w_init_sequence()
273 mipi_dsi_dcs_write_seq(dsi, 0xc8, 0x7f, 0x72, 0x67, 0x5d, 0x5d, 0x50, in ltk050h3146w_init_sequence()
274 0x56, 0x41, 0x59, 0x57, 0x55, 0x70, 0x5b, 0x5f, in ltk050h3146w_init_sequence()
275 0x4f, 0x47, 0x38, 0x23, 0x08, 0x7f, 0x72, 0x67, in ltk050h3146w_init_sequence()
276 0x5d, 0x5d, 0x50, 0x56, 0x41, 0x59, 0x57, 0x55, in ltk050h3146w_init_sequence()
277 0x70, 0x5b, 0x5f, 0x4f, 0x47, 0x38, 0x23, 0x08); in ltk050h3146w_init_sequence()
278 mipi_dsi_dcs_write_seq(dsi, 0xd0, 0x1e, 0x1f, 0x57, 0x58, 0x48, 0x4a, in ltk050h3146w_init_sequence()
279 0x44, 0x46, 0x40, 0x1f, 0x42, 0x1f, 0x1f, 0x1f, in ltk050h3146w_init_sequence()
280 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); in ltk050h3146w_init_sequence()
281 mipi_dsi_dcs_write_seq(dsi, 0xd1, 0x1e, 0x1f, 0x57, 0x58, 0x49, 0x4b, in ltk050h3146w_init_sequence()
282 0x45, 0x47, 0x41, 0x1f, 0x43, 0x1f, 0x1f, 0x1f, in ltk050h3146w_init_sequence()
283 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); in ltk050h3146w_init_sequence()
284 mipi_dsi_dcs_write_seq(dsi, 0xd2, 0x1f, 0x1e, 0x17, 0x18, 0x07, 0x05, in ltk050h3146w_init_sequence()
285 0x0b, 0x09, 0x03, 0x1f, 0x01, 0x1f, 0x1f, 0x1f, in ltk050h3146w_init_sequence()
286 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); in ltk050h3146w_init_sequence()
287 mipi_dsi_dcs_write_seq(dsi, 0xd3, 0x1f, 0x1e, 0x17, 0x18, 0x06, 0x04, in ltk050h3146w_init_sequence()
288 0x0a, 0x08, 0x02, 0x1f, 0x00, 0x1f, 0x1f, 0x1f, in ltk050h3146w_init_sequence()
289 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); in ltk050h3146w_init_sequence()
290 mipi_dsi_dcs_write_seq(dsi, 0xd4, 0x00, 0x00, 0x00, 0x0c, 0x06, 0x20, in ltk050h3146w_init_sequence()
291 0x01, 0x02, 0x00, 0x60, 0x15, 0xb0, 0x30, 0x03, in ltk050h3146w_init_sequence()
292 0x04, 0x00, 0x60, 0x72, 0x0a, 0x00, 0x60, 0x08); in ltk050h3146w_init_sequence()
293 mipi_dsi_dcs_write_seq(dsi, 0xd5, 0x00, 0x06, 0x06, 0x00, 0x30, 0x00, in ltk050h3146w_init_sequence()
294 0x00, 0x00, 0x00, 0x00, 0xbc, 0x50, 0x00, 0x05, in ltk050h3146w_init_sequence()
295 0x21, 0x00, 0x60); in ltk050h3146w_init_sequence()
296 mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x2c, 0xa3, 0x00); in ltk050h3146w_init_sequence()
297 mipi_dsi_dcs_write_seq(dsi, 0xde, 0x02); in ltk050h3146w_init_sequence()
298 mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x32, 0x1c); in ltk050h3146w_init_sequence()
299 mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x3b, 0x70, 0x00, 0x04); in ltk050h3146w_init_sequence()
300 mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x11); in ltk050h3146w_init_sequence()
301 mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x21, 0x22, 0x23, 0x24, 0x36, 0x37); in ltk050h3146w_init_sequence()
302 mipi_dsi_dcs_write_seq(dsi, 0xc2, 0x20, 0x38, 0x1e, 0x84); in ltk050h3146w_init_sequence()
303 mipi_dsi_dcs_write_seq(dsi, 0xde, 0x00); in ltk050h3146w_init_sequence()
306 if (ret < 0) { in ltk050h3146w_init_sequence()
313 return 0; in ltk050h3146w_init_sequence()
338 u8 d[3] = { 0x98, 0x81, page }; in ltk050h3146w_a2_select_page()
340 return mipi_dsi_dcs_write(dsi, 0xff, d, ARRAY_SIZE(d)); in ltk050h3146w_a2_select_page()
351 if (ret < 0) { in ltk050h3146w_a2_write_page()
356 for (i = 0; i < num; i++) { in ltk050h3146w_a2_write_page()
359 if (ret < 0) { in ltk050h3146w_a2_write_page()
365 return 0; in ltk050h3146w_a2_write_page()
379 if (ret < 0) in ltk050h3146w_a2_init_sequence()
384 if (ret < 0) in ltk050h3146w_a2_init_sequence()
389 if (ret < 0) in ltk050h3146w_a2_init_sequence()
392 ret = ltk050h3146w_a2_select_page(ctx, 0); in ltk050h3146w_a2_init_sequence()
393 if (ret < 0) { in ltk050h3146w_a2_init_sequence()
394 dev_err(ctx->dev, "failed to select page 0: %d\n", ret); in ltk050h3146w_a2_init_sequence()
399 ret = mipi_dsi_dcs_set_tear_on(dsi, 0); in ltk050h3146w_a2_init_sequence()
400 if (ret < 0) { in ltk050h3146w_a2_init_sequence()
407 return 0; in ltk050h3146w_a2_init_sequence()
436 return 0; in ltk050h3146w_unprepare()
439 if (ret < 0) { in ltk050h3146w_unprepare()
445 if (ret < 0) { in ltk050h3146w_unprepare()
455 return 0; in ltk050h3146w_unprepare()
465 return 0; in ltk050h3146w_prepare()
469 if (ret < 0) { in ltk050h3146w_prepare()
474 if (ret < 0) { in ltk050h3146w_prepare()
481 gpiod_set_value_cansleep(ctx->reset_gpio, 0); in ltk050h3146w_prepare()
485 if (ret < 0) { in ltk050h3146w_prepare()
491 if (ret < 0) { in ltk050h3146w_prepare()
500 if (ret < 0) { in ltk050h3146w_prepare()
509 return 0; in ltk050h3146w_prepare()
599 if (ret < 0) { in ltk050h3146w_probe()
605 return 0; in ltk050h3146w_probe()
614 if (ret < 0) in ltk050h3146w_shutdown()
618 if (ret < 0) in ltk050h3146w_shutdown()
630 if (ret < 0) in ltk050h3146w_remove()