38 	reg = start | BIT(24) | (secure ? BIT(28) : 0);  in nvkm_falcon_v1_load_imem()
39 	nvkm_falcon_wr32(falcon, 0x180 + (port * 16), reg);  in nvkm_falcon_v1_load_imem()
40 	for (i = 0; i < size / 4; i++) {  in nvkm_falcon_v1_load_imem()
42 		if ((i & 0x3f) == 0)  in nvkm_falcon_v1_load_imem()
43 			nvkm_falcon_wr32(falcon, 0x188 + (port * 16), tag++);  in nvkm_falcon_v1_load_imem()
44 		nvkm_falcon_wr32(falcon, 0x184 + (port * 16), ((u32 *)data)[i]);  in nvkm_falcon_v1_load_imem()
55 		if ((i & 0x3f) == 0)  in nvkm_falcon_v1_load_imem()
56 			nvkm_falcon_wr32(falcon, 0x188 + (port * 16), tag++);  in nvkm_falcon_v1_load_imem()
57 		nvkm_falcon_wr32(falcon, 0x184 + (port * 16),  in nvkm_falcon_v1_load_imem()
62 	/* code must be padded to 0x40 words */  in nvkm_falcon_v1_load_imem()
63 	for (; i & 0x3f; i++)  in nvkm_falcon_v1_load_imem()
64 		nvkm_falcon_wr32(falcon, 0x184 + (port * 16), 0);  in nvkm_falcon_v1_load_imem()
76 	nvkm_falcon_wr32(falcon, 0x1c0 + (port * 8), start | (0x1 << 24));  in nvkm_falcon_v1_load_dmem()
77 	for (i = 0; i < size / 4; i++)  in nvkm_falcon_v1_load_dmem()
78 		nvkm_falcon_wr32(falcon, 0x1c4 + (port * 8), ((u32 *)data)[i]);  in nvkm_falcon_v1_load_dmem()
87 		nvkm_falcon_wr32(falcon, 0x1c4 + (port * 8),  in nvkm_falcon_v1_load_dmem()
95 	u32 reg = nvkm_falcon_rd32(falcon, 0x100);  in nvkm_falcon_v1_start()
98 		nvkm_falcon_wr32(falcon, 0x130, 0x2);  in nvkm_falcon_v1_start()
100 		nvkm_falcon_wr32(falcon, 0x100, 0x2);  in nvkm_falcon_v1_start()