Lines Matching +full:d +full:- +full:link
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
6 #define pr_fmt(fmt) "[drm-dp] %s: " fmt, __func__
12 #include <linux/phy/phy-dp.h>
46 u64 hactive; /* active h-width */
61 u8 lrate; /* DP_LINK_RATE -> 162(6), 270(10), 540(20), 810 (30) */
78 struct dp_link *link; member
89 struct dp_link_info *link) in dp_aux_link_configure() argument
94 values[0] = drm_dp_link_rate_to_bw_code(link->rate); in dp_aux_link_configure()
95 values[1] = link->num_lanes; in dp_aux_link_configure()
97 if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING) in dp_aux_link_configure()
113 reinit_completion(&ctrl->idle_comp); in dp_ctrl_push_idle()
114 dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_PUSH_IDLE); in dp_ctrl_push_idle()
116 if (!wait_for_completion_timeout(&ctrl->idle_comp, in dp_ctrl_push_idle()
120 drm_dbg_dp(ctrl->drm_dev, "mainlink off\n"); in dp_ctrl_push_idle()
126 const u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_config_ctrl()
128 /* Default-> LSCLK DIV: 1/4 LCLK */ in dp_ctrl_config_ctrl()
135 tbd = dp_link_get_test_bits_depth(ctrl->link, in dp_ctrl_config_ctrl()
136 ctrl->panel->dp_mode.bpp); in dp_ctrl_config_ctrl()
146 config |= ((ctrl->link->link_params.num_lanes - 1) in dp_ctrl_config_ctrl()
158 if (ctrl->panel->psr_cap.version) in dp_ctrl_config_ctrl()
161 dp_catalog_ctrl_config_ctrl(ctrl->catalog, config); in dp_ctrl_config_ctrl()
168 dp_catalog_ctrl_lane_mapping(ctrl->catalog); in dp_ctrl_configure_source_params()
169 dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, true); in dp_ctrl_configure_source_params()
173 tb = dp_link_get_test_bits_depth(ctrl->link, in dp_ctrl_configure_source_params()
174 ctrl->panel->dp_mode.bpp); in dp_ctrl_configure_source_params()
175 cc = dp_link_get_colorimetry_config(ctrl->link); in dp_ctrl_configure_source_params()
176 dp_catalog_ctrl_config_misc(ctrl->catalog, cc, tb); in dp_ctrl_configure_source_params()
177 dp_panel_timing_cfg(ctrl->panel); in dp_ctrl_configure_source_params()
273 minus_1 = drm_fixp_from_fraction(-1, 1); in _tu_param_compare()
303 int nlanes = in->nlanes; in dp_panel_update_tu_timings()
304 int dsc_num_slices = in->num_of_dsc_slices; in dp_panel_update_tu_timings()
319 tu->lclk_fp = drm_fixp_from_fraction(in->lclk, 1); in dp_panel_update_tu_timings()
320 tu->pclk_fp = drm_fixp_from_fraction(in->pclk_khz, 1000); in dp_panel_update_tu_timings()
321 tu->lwidth = in->hactive; in dp_panel_update_tu_timings()
322 tu->hbp_relative_to_pclk = in->hporch; in dp_panel_update_tu_timings()
323 tu->nlanes = in->nlanes; in dp_panel_update_tu_timings()
324 tu->bpp = in->bpp; in dp_panel_update_tu_timings()
325 tu->pixelEnc = in->pixel_enc; in dp_panel_update_tu_timings()
326 tu->dsc_en = in->dsc_en; in dp_panel_update_tu_timings()
327 tu->async_en = in->async_en; in dp_panel_update_tu_timings()
328 tu->lwidth_fp = drm_fixp_from_fraction(in->hactive, 1); in dp_panel_update_tu_timings()
329 tu->hbp_relative_to_pclk_fp = drm_fixp_from_fraction(in->hporch, 1); in dp_panel_update_tu_timings()
331 if (tu->pixelEnc == 420) { in dp_panel_update_tu_timings()
333 tu->pclk_fp = drm_fixp_div(tu->pclk_fp, temp1_fp); in dp_panel_update_tu_timings()
334 tu->lwidth_fp = drm_fixp_div(tu->lwidth_fp, temp1_fp); in dp_panel_update_tu_timings()
335 tu->hbp_relative_to_pclk_fp = in dp_panel_update_tu_timings()
336 drm_fixp_div(tu->hbp_relative_to_pclk_fp, 2); in dp_panel_update_tu_timings()
339 if (tu->pixelEnc == 422) { in dp_panel_update_tu_timings()
340 switch (tu->bpp) { in dp_panel_update_tu_timings()
342 tu->bpp = 16; in dp_panel_update_tu_timings()
343 tu->bpc = 8; in dp_panel_update_tu_timings()
346 tu->bpp = 20; in dp_panel_update_tu_timings()
347 tu->bpc = 10; in dp_panel_update_tu_timings()
350 tu->bpp = 16; in dp_panel_update_tu_timings()
351 tu->bpc = 8; in dp_panel_update_tu_timings()
355 tu->bpc = tu->bpp/3; in dp_panel_update_tu_timings()
358 if (!in->dsc_en) in dp_panel_update_tu_timings()
361 temp1_fp = drm_fixp_from_fraction(in->compress_ratio, 100); in dp_panel_update_tu_timings()
362 temp2_fp = drm_fixp_from_fraction(in->bpp, 1); in dp_panel_update_tu_timings()
364 temp2_fp = drm_fixp_mul(tu->lwidth_fp, temp3_fp); in dp_panel_update_tu_timings()
375 tot_num_dummy_bytes = (nlanes - eoc_bytes) * dsc_num_slices; in dp_panel_update_tu_timings()
378 pr_info("incorrect no of bytes per slice=%d\n", dsc_num_bytes); in dp_panel_update_tu_timings()
386 temp2_fp = drm_fixp_mul(tu->pclk_fp, dwidth_dsc_fp); in dp_panel_update_tu_timings()
387 temp1_fp = drm_fixp_div(temp2_fp, tu->lwidth_fp); in dp_panel_update_tu_timings()
390 temp1_fp = drm_fixp_div(pclk_dsc_fp, tu->pclk_fp); in dp_panel_update_tu_timings()
391 temp2_fp = drm_fixp_mul(tu->hbp_relative_to_pclk_fp, temp1_fp); in dp_panel_update_tu_timings()
395 tu->pclk_fp = pclk_dsc_fp; in dp_panel_update_tu_timings()
396 tu->lwidth_fp = dwidth_dsc_fp; in dp_panel_update_tu_timings()
397 tu->hbp_relative_to_pclk_fp = hbp_dsc_fp; in dp_panel_update_tu_timings()
400 if (in->fec_en) { in dp_panel_update_tu_timings()
402 tu->lclk_fp = drm_fixp_mul(tu->lclk_fp, temp1_fp); in dp_panel_update_tu_timings()
411 temp1_fp = drm_fixp_from_fraction(tu->tu_size, 1); in _tu_valid_boundary_calc()
412 temp2_fp = drm_fixp_mul(tu->ratio_fp, temp1_fp); in _tu_valid_boundary_calc()
414 tu->new_valid_boundary_link = drm_fixp2int_ceil(temp2_fp); in _tu_valid_boundary_calc()
416 temp = (tu->i_upper_boundary_count * in _tu_valid_boundary_calc()
417 tu->new_valid_boundary_link + in _tu_valid_boundary_calc()
418 tu->i_lower_boundary_count * in _tu_valid_boundary_calc()
419 (tu->new_valid_boundary_link-1)); in _tu_valid_boundary_calc()
420 tu->average_valid2_fp = drm_fixp_from_fraction(temp, in _tu_valid_boundary_calc()
421 (tu->i_upper_boundary_count + in _tu_valid_boundary_calc()
422 tu->i_lower_boundary_count)); in _tu_valid_boundary_calc()
424 temp1_fp = drm_fixp_from_fraction(tu->bpp, 8); in _tu_valid_boundary_calc()
425 temp2_fp = tu->lwidth_fp; in _tu_valid_boundary_calc()
427 temp2_fp = drm_fixp_div(temp1_fp, tu->average_valid2_fp); in _tu_valid_boundary_calc()
428 tu->n_tus = drm_fixp2int(temp2_fp); in _tu_valid_boundary_calc()
430 tu->n_tus += 1; in _tu_valid_boundary_calc()
432 temp1_fp = drm_fixp_from_fraction(tu->n_tus, 1); in _tu_valid_boundary_calc()
433 temp2_fp = drm_fixp_mul(temp1_fp, tu->average_valid2_fp); in _tu_valid_boundary_calc()
434 temp1_fp = drm_fixp_from_fraction(tu->n_symbols, 1); in _tu_valid_boundary_calc()
435 temp2_fp = temp1_fp - temp2_fp; in _tu_valid_boundary_calc()
436 temp1_fp = drm_fixp_from_fraction(tu->nlanes, 1); in _tu_valid_boundary_calc()
438 tu->n_remainder_symbols_per_lane_fp = temp2_fp; in _tu_valid_boundary_calc()
440 temp1_fp = drm_fixp_from_fraction(tu->tu_size, 1); in _tu_valid_boundary_calc()
441 tu->last_partial_tu_fp = in _tu_valid_boundary_calc()
442 drm_fixp_div(tu->n_remainder_symbols_per_lane_fp, in _tu_valid_boundary_calc()
445 if (tu->n_remainder_symbols_per_lane_fp != 0) in _tu_valid_boundary_calc()
446 tu->remainder_symbols_exist = 1; in _tu_valid_boundary_calc()
448 tu->remainder_symbols_exist = 0; in _tu_valid_boundary_calc()
450 temp1_fp = drm_fixp_from_fraction(tu->n_tus, tu->nlanes); in _tu_valid_boundary_calc()
451 tu->n_tus_per_lane = drm_fixp2int(temp1_fp); in _tu_valid_boundary_calc()
453 tu->paired_tus = (int)((tu->n_tus_per_lane) / in _tu_valid_boundary_calc()
454 (tu->i_upper_boundary_count + in _tu_valid_boundary_calc()
455 tu->i_lower_boundary_count)); in _tu_valid_boundary_calc()
457 tu->remainder_tus = tu->n_tus_per_lane - tu->paired_tus * in _tu_valid_boundary_calc()
458 (tu->i_upper_boundary_count + in _tu_valid_boundary_calc()
459 tu->i_lower_boundary_count); in _tu_valid_boundary_calc()
461 if ((tu->remainder_tus - tu->i_upper_boundary_count) > 0) { in _tu_valid_boundary_calc()
462 tu->remainder_tus_upper = tu->i_upper_boundary_count; in _tu_valid_boundary_calc()
463 tu->remainder_tus_lower = tu->remainder_tus - in _tu_valid_boundary_calc()
464 tu->i_upper_boundary_count; in _tu_valid_boundary_calc()
466 tu->remainder_tus_upper = tu->remainder_tus; in _tu_valid_boundary_calc()
467 tu->remainder_tus_lower = 0; in _tu_valid_boundary_calc()
470 temp = tu->paired_tus * (tu->i_upper_boundary_count * in _tu_valid_boundary_calc()
471 tu->new_valid_boundary_link + in _tu_valid_boundary_calc()
472 tu->i_lower_boundary_count * in _tu_valid_boundary_calc()
473 (tu->new_valid_boundary_link - 1)) + in _tu_valid_boundary_calc()
474 (tu->remainder_tus_upper * in _tu_valid_boundary_calc()
475 tu->new_valid_boundary_link) + in _tu_valid_boundary_calc()
476 (tu->remainder_tus_lower * in _tu_valid_boundary_calc()
477 (tu->new_valid_boundary_link - 1)); in _tu_valid_boundary_calc()
478 tu->total_valid_fp = drm_fixp_from_fraction(temp, 1); in _tu_valid_boundary_calc()
480 if (tu->remainder_symbols_exist) { in _tu_valid_boundary_calc()
481 temp1_fp = tu->total_valid_fp + in _tu_valid_boundary_calc()
482 tu->n_remainder_symbols_per_lane_fp; in _tu_valid_boundary_calc()
483 temp2_fp = drm_fixp_from_fraction(tu->n_tus_per_lane, 1); in _tu_valid_boundary_calc()
484 temp2_fp = temp2_fp + tu->last_partial_tu_fp; in _tu_valid_boundary_calc()
487 temp2_fp = drm_fixp_from_fraction(tu->n_tus_per_lane, 1); in _tu_valid_boundary_calc()
488 temp1_fp = drm_fixp_div(tu->total_valid_fp, temp2_fp); in _tu_valid_boundary_calc()
490 tu->effective_valid_fp = temp1_fp; in _tu_valid_boundary_calc()
492 temp1_fp = drm_fixp_from_fraction(tu->tu_size, 1); in _tu_valid_boundary_calc()
493 temp2_fp = drm_fixp_mul(tu->ratio_fp, temp1_fp); in _tu_valid_boundary_calc()
494 tu->n_n_err_fp = tu->effective_valid_fp - temp2_fp; in _tu_valid_boundary_calc()
496 temp1_fp = drm_fixp_from_fraction(tu->tu_size, 1); in _tu_valid_boundary_calc()
497 temp2_fp = drm_fixp_mul(tu->ratio_fp, temp1_fp); in _tu_valid_boundary_calc()
498 tu->n_err_fp = tu->average_valid2_fp - temp2_fp; in _tu_valid_boundary_calc()
500 tu->even_distribution = tu->n_tus % tu->nlanes == 0 ? 1 : 0; in _tu_valid_boundary_calc()
502 temp1_fp = drm_fixp_from_fraction(tu->bpp, 8); in _tu_valid_boundary_calc()
503 temp2_fp = tu->lwidth_fp; in _tu_valid_boundary_calc()
505 temp2_fp = drm_fixp_div(temp1_fp, tu->average_valid2_fp); in _tu_valid_boundary_calc()
508 tu->n_tus_incl_last_incomplete_tu = drm_fixp2int_ceil(temp2_fp); in _tu_valid_boundary_calc()
510 tu->n_tus_incl_last_incomplete_tu = 0; in _tu_valid_boundary_calc()
513 temp1_fp = drm_fixp_from_fraction(tu->tu_size, 1); in _tu_valid_boundary_calc()
514 temp2_fp = drm_fixp_mul(tu->original_ratio_fp, temp1_fp); in _tu_valid_boundary_calc()
515 temp1_fp = tu->average_valid2_fp - temp2_fp; in _tu_valid_boundary_calc()
516 temp2_fp = drm_fixp_from_fraction(tu->n_tus_incl_last_incomplete_tu, 1); in _tu_valid_boundary_calc()
522 temp = tu->i_upper_boundary_count * tu->nlanes; in _tu_valid_boundary_calc()
523 temp1_fp = drm_fixp_from_fraction(tu->tu_size, 1); in _tu_valid_boundary_calc()
524 temp2_fp = drm_fixp_mul(tu->original_ratio_fp, temp1_fp); in _tu_valid_boundary_calc()
525 temp1_fp = drm_fixp_from_fraction(tu->new_valid_boundary_link, 1); in _tu_valid_boundary_calc()
526 temp2_fp = temp1_fp - temp2_fp; in _tu_valid_boundary_calc()
534 tu->extra_required_bytes_new_tmp = (int)(temp1 + temp2); in _tu_valid_boundary_calc()
536 temp1_fp = drm_fixp_from_fraction(8, tu->bpp); in _tu_valid_boundary_calc()
538 tu->extra_required_bytes_new_tmp, 1); in _tu_valid_boundary_calc()
542 tu->extra_pclk_cycles_tmp = drm_fixp2int_ceil(temp1_fp); in _tu_valid_boundary_calc()
544 tu->extra_pclk_cycles_tmp = 0; in _tu_valid_boundary_calc()
546 temp1_fp = drm_fixp_from_fraction(tu->extra_pclk_cycles_tmp, 1); in _tu_valid_boundary_calc()
547 temp2_fp = drm_fixp_div(tu->lclk_fp, tu->pclk_fp); in _tu_valid_boundary_calc()
551 tu->extra_pclk_cycles_in_link_clk_tmp = in _tu_valid_boundary_calc()
554 tu->extra_pclk_cycles_in_link_clk_tmp = 0; in _tu_valid_boundary_calc()
556 tu->filler_size_tmp = tu->tu_size - tu->new_valid_boundary_link; in _tu_valid_boundary_calc()
558 tu->lower_filler_size_tmp = tu->filler_size_tmp + 1; in _tu_valid_boundary_calc()
560 tu->delay_start_link_tmp = tu->extra_pclk_cycles_in_link_clk_tmp + in _tu_valid_boundary_calc()
561 tu->lower_filler_size_tmp + in _tu_valid_boundary_calc()
562 tu->extra_buffer_margin; in _tu_valid_boundary_calc()
564 temp1_fp = drm_fixp_from_fraction(tu->delay_start_link_tmp, 1); in _tu_valid_boundary_calc()
565 tu->delay_start_time_fp = drm_fixp_div(temp1_fp, tu->lclk_fp); in _tu_valid_boundary_calc()
567 compare_result_1 = _tu_param_compare(tu->n_n_err_fp, tu->diff_abs_fp); in _tu_valid_boundary_calc()
573 compare_result_2 = _tu_param_compare(tu->n_n_err_fp, tu->err_fp); in _tu_valid_boundary_calc()
579 compare_result_3 = _tu_param_compare(tu->hbp_time_fp, in _tu_valid_boundary_calc()
580 tu->delay_start_time_fp); in _tu_valid_boundary_calc()
586 if (((tu->even_distribution == 1) || in _tu_valid_boundary_calc()
587 ((tu->even_distribution_BF == 0) && in _tu_valid_boundary_calc()
588 (tu->even_distribution_legacy == 0))) && in _tu_valid_boundary_calc()
589 tu->n_err_fp >= 0 && tu->n_n_err_fp >= 0 && in _tu_valid_boundary_calc()
591 (compare_result_1 || (tu->min_hblank_violated == 1)) && in _tu_valid_boundary_calc()
592 (tu->new_valid_boundary_link - 1) > 0 && in _tu_valid_boundary_calc()
594 (tu->delay_start_link_tmp <= 1023)) { in _tu_valid_boundary_calc()
595 tu->upper_boundary_count = tu->i_upper_boundary_count; in _tu_valid_boundary_calc()
596 tu->lower_boundary_count = tu->i_lower_boundary_count; in _tu_valid_boundary_calc()
597 tu->err_fp = tu->n_n_err_fp; in _tu_valid_boundary_calc()
598 tu->boundary_moderation_en = true; in _tu_valid_boundary_calc()
599 tu->tu_size_desired = tu->tu_size; in _tu_valid_boundary_calc()
600 tu->valid_boundary_link = tu->new_valid_boundary_link; in _tu_valid_boundary_calc()
601 tu->effective_valid_recorded_fp = tu->effective_valid_fp; in _tu_valid_boundary_calc()
602 tu->even_distribution_BF = 1; in _tu_valid_boundary_calc()
603 tu->delay_start_link = tu->delay_start_link_tmp; in _tu_valid_boundary_calc()
604 } else if (tu->boundary_mod_lower_err == 0) { in _tu_valid_boundary_calc()
605 compare_result_1 = _tu_param_compare(tu->n_n_err_fp, in _tu_valid_boundary_calc()
606 tu->diff_abs_fp); in _tu_valid_boundary_calc()
608 tu->boundary_mod_lower_err = 1; in _tu_valid_boundary_calc()
637 tu->err_fp = drm_fixp_from_fraction(1000, 1); /* 1000 */ in _dp_ctrl_calc_tu()
640 temp2_fp = drm_fixp_mul(temp1_fp, tu->lclk_fp); in _dp_ctrl_calc_tu()
641 temp_fp = drm_fixp_div(temp2_fp, tu->pclk_fp); in _dp_ctrl_calc_tu()
642 tu->extra_buffer_margin = drm_fixp2int_ceil(temp_fp); in _dp_ctrl_calc_tu()
644 temp1_fp = drm_fixp_from_fraction(tu->bpp, 8); in _dp_ctrl_calc_tu()
645 temp2_fp = drm_fixp_mul(tu->pclk_fp, temp1_fp); in _dp_ctrl_calc_tu()
646 temp1_fp = drm_fixp_from_fraction(tu->nlanes, 1); in _dp_ctrl_calc_tu()
648 tu->ratio_fp = drm_fixp_div(temp2_fp, tu->lclk_fp); in _dp_ctrl_calc_tu()
650 tu->original_ratio_fp = tu->ratio_fp; in _dp_ctrl_calc_tu()
651 tu->boundary_moderation_en = false; in _dp_ctrl_calc_tu()
652 tu->upper_boundary_count = 0; in _dp_ctrl_calc_tu()
653 tu->lower_boundary_count = 0; in _dp_ctrl_calc_tu()
654 tu->i_upper_boundary_count = 0; in _dp_ctrl_calc_tu()
655 tu->i_lower_boundary_count = 0; in _dp_ctrl_calc_tu()
656 tu->valid_lower_boundary_link = 0; in _dp_ctrl_calc_tu()
657 tu->even_distribution_BF = 0; in _dp_ctrl_calc_tu()
658 tu->even_distribution_legacy = 0; in _dp_ctrl_calc_tu()
659 tu->even_distribution = 0; in _dp_ctrl_calc_tu()
660 tu->delay_start_time_fp = 0; in _dp_ctrl_calc_tu()
662 tu->err_fp = drm_fixp_from_fraction(1000, 1); in _dp_ctrl_calc_tu()
663 tu->n_err_fp = 0; in _dp_ctrl_calc_tu()
664 tu->n_n_err_fp = 0; in _dp_ctrl_calc_tu()
666 tu->ratio = drm_fixp2int(tu->ratio_fp); in _dp_ctrl_calc_tu()
667 temp1_fp = drm_fixp_from_fraction(tu->nlanes, 1); in _dp_ctrl_calc_tu()
668 div64_u64_rem(tu->lwidth_fp, temp1_fp, &temp2_fp); in _dp_ctrl_calc_tu()
670 !tu->ratio && tu->dsc_en == 0) { in _dp_ctrl_calc_tu()
671 tu->ratio_fp = drm_fixp_mul(tu->ratio_fp, RATIO_SCALE_fp); in _dp_ctrl_calc_tu()
672 tu->ratio = drm_fixp2int(tu->ratio_fp); in _dp_ctrl_calc_tu()
673 if (tu->ratio) in _dp_ctrl_calc_tu()
674 tu->ratio_fp = drm_fixp_from_fraction(1, 1); in _dp_ctrl_calc_tu()
677 if (tu->ratio > 1) in _dp_ctrl_calc_tu()
678 tu->ratio = 1; in _dp_ctrl_calc_tu()
680 if (tu->ratio == 1) in _dp_ctrl_calc_tu()
683 compare_result_1 = _tu_param_compare(tu->ratio_fp, const_p49_fp); in _dp_ctrl_calc_tu()
689 compare_result_2 = _tu_param_compare(tu->ratio_fp, const_p56_fp); in _dp_ctrl_calc_tu()
695 if (tu->dsc_en && compare_result_1 && compare_result_2) { in _dp_ctrl_calc_tu()
697 drm_dbg_dp(ctrl->drm_dev, in _dp_ctrl_calc_tu()
698 "increase HBLANK_MARGIN to %d\n", HBLANK_MARGIN); in _dp_ctrl_calc_tu()
702 for (tu->tu_size = 32; tu->tu_size <= 64; tu->tu_size++) { in _dp_ctrl_calc_tu()
703 temp1_fp = drm_fixp_from_fraction(tu->tu_size, 1); in _dp_ctrl_calc_tu()
704 temp2_fp = drm_fixp_mul(tu->ratio_fp, temp1_fp); in _dp_ctrl_calc_tu()
707 tu->n_err_fp = temp1_fp - temp2_fp; in _dp_ctrl_calc_tu()
709 if (tu->n_err_fp < tu->err_fp) { in _dp_ctrl_calc_tu()
710 tu->err_fp = tu->n_err_fp; in _dp_ctrl_calc_tu()
711 tu->tu_size_desired = tu->tu_size; in _dp_ctrl_calc_tu()
715 tu->tu_size_minus1 = tu->tu_size_desired - 1; in _dp_ctrl_calc_tu()
717 temp1_fp = drm_fixp_from_fraction(tu->tu_size_desired, 1); in _dp_ctrl_calc_tu()
718 temp2_fp = drm_fixp_mul(tu->ratio_fp, temp1_fp); in _dp_ctrl_calc_tu()
719 tu->valid_boundary_link = drm_fixp2int_ceil(temp2_fp); in _dp_ctrl_calc_tu()
721 temp1_fp = drm_fixp_from_fraction(tu->bpp, 8); in _dp_ctrl_calc_tu()
722 temp2_fp = tu->lwidth_fp; in _dp_ctrl_calc_tu()
725 temp1_fp = drm_fixp_from_fraction(tu->valid_boundary_link, 1); in _dp_ctrl_calc_tu()
727 tu->n_tus = drm_fixp2int(temp2_fp); in _dp_ctrl_calc_tu()
729 tu->n_tus += 1; in _dp_ctrl_calc_tu()
731 tu->even_distribution_legacy = tu->n_tus % tu->nlanes == 0 ? 1 : 0; in _dp_ctrl_calc_tu()
733 drm_dbg_dp(ctrl->drm_dev, in _dp_ctrl_calc_tu()
734 "n_sym = %d, num_of_tus = %d\n", in _dp_ctrl_calc_tu()
735 tu->valid_boundary_link, tu->n_tus); in _dp_ctrl_calc_tu()
737 temp1_fp = drm_fixp_from_fraction(tu->tu_size_desired, 1); in _dp_ctrl_calc_tu()
738 temp2_fp = drm_fixp_mul(tu->original_ratio_fp, temp1_fp); in _dp_ctrl_calc_tu()
739 temp1_fp = drm_fixp_from_fraction(tu->valid_boundary_link, 1); in _dp_ctrl_calc_tu()
740 temp2_fp = temp1_fp - temp2_fp; in _dp_ctrl_calc_tu()
741 temp1_fp = drm_fixp_from_fraction(tu->n_tus + 1, 1); in _dp_ctrl_calc_tu()
746 tu->extra_bytes = drm_fixp2int_ceil(temp2_fp); in _dp_ctrl_calc_tu()
748 tu->extra_bytes = 0; in _dp_ctrl_calc_tu()
750 temp1_fp = drm_fixp_from_fraction(tu->extra_bytes, 1); in _dp_ctrl_calc_tu()
751 temp2_fp = drm_fixp_from_fraction(8, tu->bpp); in _dp_ctrl_calc_tu()
755 tu->extra_pclk_cycles = drm_fixp2int_ceil(temp1_fp); in _dp_ctrl_calc_tu()
757 tu->extra_pclk_cycles = drm_fixp2int(temp1_fp); in _dp_ctrl_calc_tu()
759 temp1_fp = drm_fixp_div(tu->lclk_fp, tu->pclk_fp); in _dp_ctrl_calc_tu()
760 temp2_fp = drm_fixp_from_fraction(tu->extra_pclk_cycles, 1); in _dp_ctrl_calc_tu()
764 tu->extra_pclk_cycles_in_link_clk = drm_fixp2int_ceil(temp1_fp); in _dp_ctrl_calc_tu()
766 tu->extra_pclk_cycles_in_link_clk = drm_fixp2int(temp1_fp); in _dp_ctrl_calc_tu()
768 tu->filler_size = tu->tu_size_desired - tu->valid_boundary_link; in _dp_ctrl_calc_tu()
770 temp1_fp = drm_fixp_from_fraction(tu->tu_size_desired, 1); in _dp_ctrl_calc_tu()
771 tu->ratio_by_tu_fp = drm_fixp_mul(tu->ratio_fp, temp1_fp); in _dp_ctrl_calc_tu()
773 tu->delay_start_link = tu->extra_pclk_cycles_in_link_clk + in _dp_ctrl_calc_tu()
774 tu->filler_size + tu->extra_buffer_margin; in _dp_ctrl_calc_tu()
776 tu->resulting_valid_fp = in _dp_ctrl_calc_tu()
777 drm_fixp_from_fraction(tu->valid_boundary_link, 1); in _dp_ctrl_calc_tu()
779 temp1_fp = drm_fixp_from_fraction(tu->tu_size_desired, 1); in _dp_ctrl_calc_tu()
780 temp2_fp = drm_fixp_div(tu->resulting_valid_fp, temp1_fp); in _dp_ctrl_calc_tu()
781 tu->TU_ratio_err_fp = temp2_fp - tu->original_ratio_fp; in _dp_ctrl_calc_tu()
784 temp1_fp = tu->hbp_relative_to_pclk_fp - temp1_fp; in _dp_ctrl_calc_tu()
785 tu->hbp_time_fp = drm_fixp_div(temp1_fp, tu->pclk_fp); in _dp_ctrl_calc_tu()
787 temp1_fp = drm_fixp_from_fraction(tu->delay_start_link, 1); in _dp_ctrl_calc_tu()
788 tu->delay_start_time_fp = drm_fixp_div(temp1_fp, tu->lclk_fp); in _dp_ctrl_calc_tu()
790 compare_result_1 = _tu_param_compare(tu->hbp_time_fp, in _dp_ctrl_calc_tu()
791 tu->delay_start_time_fp); in _dp_ctrl_calc_tu()
793 tu->min_hblank_violated = 1; in _dp_ctrl_calc_tu()
795 tu->hactive_time_fp = drm_fixp_div(tu->lwidth_fp, tu->pclk_fp); in _dp_ctrl_calc_tu()
797 compare_result_2 = _tu_param_compare(tu->hactive_time_fp, in _dp_ctrl_calc_tu()
798 tu->delay_start_time_fp); in _dp_ctrl_calc_tu()
800 tu->min_hblank_violated = 1; in _dp_ctrl_calc_tu()
802 tu->delay_start_time_fp = 0; in _dp_ctrl_calc_tu()
806 tu->delay_start_link_extra_pixclk = EXTRA_PIXCLK_CYCLE_DELAY; in _dp_ctrl_calc_tu()
807 tu->diff_abs_fp = tu->resulting_valid_fp - tu->ratio_by_tu_fp; in _dp_ctrl_calc_tu()
809 temp = drm_fixp2int(tu->diff_abs_fp); in _dp_ctrl_calc_tu()
810 if (!temp && tu->diff_abs_fp <= 0xffff) in _dp_ctrl_calc_tu()
811 tu->diff_abs_fp = 0; in _dp_ctrl_calc_tu()
813 /* if(diff_abs < 0) diff_abs *= -1 */ in _dp_ctrl_calc_tu()
814 if (tu->diff_abs_fp < 0) in _dp_ctrl_calc_tu()
815 tu->diff_abs_fp = drm_fixp_mul(tu->diff_abs_fp, -1); in _dp_ctrl_calc_tu()
817 tu->boundary_mod_lower_err = 0; in _dp_ctrl_calc_tu()
818 if ((tu->diff_abs_fp != 0 && in _dp_ctrl_calc_tu()
819 ((tu->diff_abs_fp > BRUTE_FORCE_THRESHOLD_fp) || in _dp_ctrl_calc_tu()
820 (tu->even_distribution_legacy == 0) || in _dp_ctrl_calc_tu()
822 (tu->min_hblank_violated == 1)) { in _dp_ctrl_calc_tu()
824 tu->err_fp = drm_fixp_from_fraction(1000, 1); in _dp_ctrl_calc_tu()
826 temp1_fp = drm_fixp_div(tu->lclk_fp, tu->pclk_fp); in _dp_ctrl_calc_tu()
828 tu->delay_start_link_extra_pixclk, 1); in _dp_ctrl_calc_tu()
832 tu->extra_buffer_margin = in _dp_ctrl_calc_tu()
835 tu->extra_buffer_margin = 0; in _dp_ctrl_calc_tu()
837 temp1_fp = drm_fixp_from_fraction(tu->bpp, 8); in _dp_ctrl_calc_tu()
838 temp1_fp = drm_fixp_mul(tu->lwidth_fp, temp1_fp); in _dp_ctrl_calc_tu()
841 tu->n_symbols = drm_fixp2int_ceil(temp1_fp); in _dp_ctrl_calc_tu()
843 tu->n_symbols = 0; in _dp_ctrl_calc_tu()
845 for (tu->tu_size = 32; tu->tu_size <= 64; tu->tu_size++) { in _dp_ctrl_calc_tu()
846 for (tu->i_upper_boundary_count = 1; in _dp_ctrl_calc_tu()
847 tu->i_upper_boundary_count <= 15; in _dp_ctrl_calc_tu()
848 tu->i_upper_boundary_count++) { in _dp_ctrl_calc_tu()
849 for (tu->i_lower_boundary_count = 1; in _dp_ctrl_calc_tu()
850 tu->i_lower_boundary_count <= 15; in _dp_ctrl_calc_tu()
851 tu->i_lower_boundary_count++) { in _dp_ctrl_calc_tu()
856 tu->delay_start_link_extra_pixclk--; in _dp_ctrl_calc_tu()
857 } while (tu->boundary_moderation_en != true && in _dp_ctrl_calc_tu()
858 tu->boundary_mod_lower_err == 1 && in _dp_ctrl_calc_tu()
859 tu->delay_start_link_extra_pixclk != 0); in _dp_ctrl_calc_tu()
861 if (tu->boundary_moderation_en == true) { in _dp_ctrl_calc_tu()
863 (tu->upper_boundary_count * in _dp_ctrl_calc_tu()
864 tu->valid_boundary_link + in _dp_ctrl_calc_tu()
865 tu->lower_boundary_count * in _dp_ctrl_calc_tu()
866 (tu->valid_boundary_link - 1)), 1); in _dp_ctrl_calc_tu()
868 (tu->upper_boundary_count + in _dp_ctrl_calc_tu()
869 tu->lower_boundary_count), 1); in _dp_ctrl_calc_tu()
870 tu->resulting_valid_fp = in _dp_ctrl_calc_tu()
874 tu->tu_size_desired, 1); in _dp_ctrl_calc_tu()
875 tu->ratio_by_tu_fp = in _dp_ctrl_calc_tu()
876 drm_fixp_mul(tu->original_ratio_fp, temp1_fp); in _dp_ctrl_calc_tu()
878 tu->valid_lower_boundary_link = in _dp_ctrl_calc_tu()
879 tu->valid_boundary_link - 1; in _dp_ctrl_calc_tu()
881 temp1_fp = drm_fixp_from_fraction(tu->bpp, 8); in _dp_ctrl_calc_tu()
882 temp1_fp = drm_fixp_mul(tu->lwidth_fp, temp1_fp); in _dp_ctrl_calc_tu()
884 tu->resulting_valid_fp); in _dp_ctrl_calc_tu()
885 tu->n_tus = drm_fixp2int(temp2_fp); in _dp_ctrl_calc_tu()
887 tu->tu_size_minus1 = tu->tu_size_desired - 1; in _dp_ctrl_calc_tu()
888 tu->even_distribution_BF = 1; in _dp_ctrl_calc_tu()
891 drm_fixp_from_fraction(tu->tu_size_desired, 1); in _dp_ctrl_calc_tu()
893 drm_fixp_div(tu->resulting_valid_fp, temp1_fp); in _dp_ctrl_calc_tu()
894 tu->TU_ratio_err_fp = temp2_fp - tu->original_ratio_fp; in _dp_ctrl_calc_tu()
898 temp2_fp = drm_fixp_mul(LCLK_FAST_SKEW_fp, tu->lwidth_fp); in _dp_ctrl_calc_tu()
905 temp1_fp = drm_fixp_from_fraction(tu->nlanes, 1); in _dp_ctrl_calc_tu()
906 temp2_fp = drm_fixp_mul(tu->original_ratio_fp, temp1_fp); in _dp_ctrl_calc_tu()
907 temp1_fp = drm_fixp_from_fraction(tu->bpp, 8); in _dp_ctrl_calc_tu()
913 if (tu->async_en) in _dp_ctrl_calc_tu()
914 tu->delay_start_link += (int)temp; in _dp_ctrl_calc_tu()
916 temp1_fp = drm_fixp_from_fraction(tu->delay_start_link, 1); in _dp_ctrl_calc_tu()
917 tu->delay_start_time_fp = drm_fixp_div(temp1_fp, tu->lclk_fp); in _dp_ctrl_calc_tu()
920 tu_table->valid_boundary_link = tu->valid_boundary_link; in _dp_ctrl_calc_tu()
921 tu_table->delay_start_link = tu->delay_start_link; in _dp_ctrl_calc_tu()
922 tu_table->boundary_moderation_en = tu->boundary_moderation_en; in _dp_ctrl_calc_tu()
923 tu_table->valid_lower_boundary_link = tu->valid_lower_boundary_link; in _dp_ctrl_calc_tu()
924 tu_table->upper_boundary_count = tu->upper_boundary_count; in _dp_ctrl_calc_tu()
925 tu_table->lower_boundary_count = tu->lower_boundary_count; in _dp_ctrl_calc_tu()
926 tu_table->tu_size_minus1 = tu->tu_size_minus1; in _dp_ctrl_calc_tu()
928 drm_dbg_dp(ctrl->drm_dev, "TU: valid_boundary_link: %d\n", in _dp_ctrl_calc_tu()
929 tu_table->valid_boundary_link); in _dp_ctrl_calc_tu()
930 drm_dbg_dp(ctrl->drm_dev, "TU: delay_start_link: %d\n", in _dp_ctrl_calc_tu()
931 tu_table->delay_start_link); in _dp_ctrl_calc_tu()
932 drm_dbg_dp(ctrl->drm_dev, "TU: boundary_moderation_en: %d\n", in _dp_ctrl_calc_tu()
933 tu_table->boundary_moderation_en); in _dp_ctrl_calc_tu()
934 drm_dbg_dp(ctrl->drm_dev, "TU: valid_lower_boundary_link: %d\n", in _dp_ctrl_calc_tu()
935 tu_table->valid_lower_boundary_link); in _dp_ctrl_calc_tu()
936 drm_dbg_dp(ctrl->drm_dev, "TU: upper_boundary_count: %d\n", in _dp_ctrl_calc_tu()
937 tu_table->upper_boundary_count); in _dp_ctrl_calc_tu()
938 drm_dbg_dp(ctrl->drm_dev, "TU: lower_boundary_count: %d\n", in _dp_ctrl_calc_tu()
939 tu_table->lower_boundary_count); in _dp_ctrl_calc_tu()
940 drm_dbg_dp(ctrl->drm_dev, "TU: tu_size_minus1: %d\n", in _dp_ctrl_calc_tu()
941 tu_table->tu_size_minus1); in _dp_ctrl_calc_tu()
952 drm_mode = &ctrl->panel->dp_mode.drm_mode; in dp_ctrl_calc_tu_parameters()
954 in.lclk = ctrl->link->link_params.rate / 1000; in dp_ctrl_calc_tu_parameters()
955 in.pclk_khz = drm_mode->clock; in dp_ctrl_calc_tu_parameters()
956 in.hactive = drm_mode->hdisplay; in dp_ctrl_calc_tu_parameters()
957 in.hporch = drm_mode->htotal - drm_mode->hdisplay; in dp_ctrl_calc_tu_parameters()
958 in.nlanes = ctrl->link->link_params.num_lanes; in dp_ctrl_calc_tu_parameters()
959 in.bpp = ctrl->panel->dp_mode.bpp; in dp_ctrl_calc_tu_parameters()
993 dp_catalog_ctrl_update_transfer_unit(ctrl->catalog, in dp_ctrl_setup_tr_unit()
1001 if (!wait_for_completion_timeout(&ctrl->video_comp, in dp_ctrl_wait4video_ready()
1004 ret = -ETIMEDOUT; in dp_ctrl_wait4video_ready()
1011 struct dp_link *link = ctrl->link; in dp_ctrl_update_vx_px() local
1015 u32 voltage_swing_level = link->phy_params.v_level; in dp_ctrl_update_vx_px()
1016 u32 pre_emphasis_level = link->phy_params.p_level; in dp_ctrl_update_vx_px()
1018 drm_dbg_dp(ctrl->drm_dev, in dp_ctrl_update_vx_px()
1019 "voltage level: %d emphasis level: %d\n", in dp_ctrl_update_vx_px()
1021 ret = dp_catalog_ctrl_update_vx_px(ctrl->catalog, in dp_ctrl_update_vx_px()
1028 drm_dbg_dp(ctrl->drm_dev, in dp_ctrl_update_vx_px()
1029 "max. voltage swing level reached %d\n", in dp_ctrl_update_vx_px()
1035 drm_dbg_dp(ctrl->drm_dev, in dp_ctrl_update_vx_px()
1036 "max. pre-emphasis level reached %d\n", in dp_ctrl_update_vx_px()
1043 lane_cnt = ctrl->link->link_params.num_lanes; in dp_ctrl_update_vx_px()
1048 drm_dbg_dp(ctrl->drm_dev, "sink: p|v=0x%x\n", in dp_ctrl_update_vx_px()
1050 ret = drm_dp_dpcd_write(ctrl->aux, DP_TRAINING_LANE0_SET, in dp_ctrl_update_vx_px()
1064 drm_dbg_dp(ctrl->drm_dev, "sink: pattern=%x\n", pattern); in dp_ctrl_train_pattern_set()
1071 ret = drm_dp_dpcd_writeb(ctrl->aux, DP_TRAINING_PATTERN_SET, buf); in dp_ctrl_train_pattern_set()
1080 len = drm_dp_dpcd_read_link_status(ctrl->aux, link_status); in dp_ctrl_read_link_status()
1082 DRM_ERROR("DP link status read failed, err: %d\n", len); in dp_ctrl_read_link_status()
1083 ret = -EINVAL; in dp_ctrl_read_link_status()
1096 dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); in dp_ctrl_link_train_1()
1100 ret = dp_catalog_ctrl_set_pattern_state_bit(ctrl->catalog, 1); in dp_ctrl_link_train_1()
1111 old_v_level = ctrl->link->phy_params.v_level; in dp_ctrl_link_train_1()
1113 drm_dp_link_train_clock_recovery_delay(ctrl->aux, ctrl->panel->dpcd); in dp_ctrl_link_train_1()
1120 ctrl->link->link_params.num_lanes)) { in dp_ctrl_link_train_1()
1124 if (ctrl->link->phy_params.v_level >= in dp_ctrl_link_train_1()
1127 return -EAGAIN; in dp_ctrl_link_train_1()
1130 if (old_v_level != ctrl->link->phy_params.v_level) { in dp_ctrl_link_train_1()
1132 old_v_level = ctrl->link->phy_params.v_level; in dp_ctrl_link_train_1()
1135 dp_link_adjust_levels(ctrl->link, link_status); in dp_ctrl_link_train_1()
1142 return -ETIMEDOUT; in dp_ctrl_link_train_1()
1149 switch (ctrl->link->link_params.rate) { in dp_ctrl_link_rate_down_shift()
1151 ctrl->link->link_params.rate = 540000; in dp_ctrl_link_rate_down_shift()
1154 ctrl->link->link_params.rate = 270000; in dp_ctrl_link_rate_down_shift()
1157 ctrl->link->link_params.rate = 162000; in dp_ctrl_link_rate_down_shift()
1161 ret = -EINVAL; in dp_ctrl_link_rate_down_shift()
1166 drm_dbg_dp(ctrl->drm_dev, "new rate=0x%x\n", in dp_ctrl_link_rate_down_shift()
1167 ctrl->link->link_params.rate); in dp_ctrl_link_rate_down_shift()
1176 if (ctrl->link->link_params.num_lanes == 1) in dp_ctrl_link_lane_down_shift()
1177 return -1; in dp_ctrl_link_lane_down_shift()
1179 ctrl->link->link_params.num_lanes /= 2; in dp_ctrl_link_lane_down_shift()
1180 ctrl->link->link_params.rate = ctrl->panel->link_info.rate; in dp_ctrl_link_lane_down_shift()
1182 ctrl->link->phy_params.p_level = 0; in dp_ctrl_link_lane_down_shift()
1183 ctrl->link->phy_params.v_level = 0; in dp_ctrl_link_lane_down_shift()
1191 drm_dp_link_train_channel_eq_delay(ctrl->aux, ctrl->panel->dpcd); in dp_ctrl_clear_training_pattern()
1203 dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); in dp_ctrl_link_train_2()
1207 if (drm_dp_tps4_supported(ctrl->panel->dpcd)) { in dp_ctrl_link_train_2()
1210 } else if (drm_dp_tps3_supported(ctrl->panel->dpcd)) { in dp_ctrl_link_train_2()
1218 ret = dp_catalog_ctrl_set_pattern_state_bit(ctrl->catalog, state_ctrl_bit); in dp_ctrl_link_train_2()
1225 drm_dp_link_train_channel_eq_delay(ctrl->aux, ctrl->panel->dpcd); in dp_ctrl_link_train_2()
1232 ctrl->link->link_params.num_lanes)) { in dp_ctrl_link_train_2()
1236 dp_link_adjust_levels(ctrl->link, link_status); in dp_ctrl_link_train_2()
1243 return -ETIMEDOUT; in dp_ctrl_link_train_2()
1250 const u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_link_train()
1257 link_info.num_lanes = ctrl->link->link_params.num_lanes; in dp_ctrl_link_train()
1258 link_info.rate = ctrl->link->link_params.rate; in dp_ctrl_link_train()
1261 dp_aux_link_configure(ctrl->aux, &link_info); in dp_ctrl_link_train()
1267 drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, encoding, 2); in dp_ctrl_link_train()
1271 drm_dp_dpcd_write(ctrl->aux, DP_EDP_CONFIGURATION_SET, in dp_ctrl_link_train()
1277 DRM_ERROR("link training #1 failed. ret=%d\n", ret); in dp_ctrl_link_train()
1282 drm_dbg_dp(ctrl->drm_dev, "link training #1 successful\n"); in dp_ctrl_link_train()
1286 DRM_ERROR("link training #2 failed. ret=%d\n", ret); in dp_ctrl_link_train()
1291 drm_dbg_dp(ctrl->drm_dev, "link training #2 successful\n"); in dp_ctrl_link_train()
1294 dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); in dp_ctrl_link_train()
1304 dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, true); in dp_ctrl_setup_main_link()
1306 if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) in dp_ctrl_setup_main_link()
1312 * a link training pattern, we have to first do soft reset. in dp_ctrl_setup_main_link()
1323 u32 num = ctrl->parser->mp[module].num_clk; in dp_ctrl_set_clock_rate()
1324 struct clk_bulk_data *cfg = ctrl->parser->mp[module].clocks; in dp_ctrl_set_clock_rate()
1326 while (num && strcmp(cfg->id, name)) { in dp_ctrl_set_clock_rate()
1327 num--; in dp_ctrl_set_clock_rate()
1331 drm_dbg_dp(ctrl->drm_dev, "setting rate=%lu on clk=%s\n", in dp_ctrl_set_clock_rate()
1335 clk_set_rate(cfg->clk, rate); in dp_ctrl_set_clock_rate()
1344 struct dp_io *dp_io = &ctrl->parser->io; in dp_ctrl_enable_mainlink_clocks()
1345 struct phy *phy = dp_io->phy; in dp_ctrl_enable_mainlink_clocks()
1346 struct phy_configure_opts_dp *opts_dp = &dp_io->phy_opts.dp; in dp_ctrl_enable_mainlink_clocks()
1347 const u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_enable_mainlink_clocks()
1349 opts_dp->lanes = ctrl->link->link_params.num_lanes; in dp_ctrl_enable_mainlink_clocks()
1350 opts_dp->link_rate = ctrl->link->link_params.rate / 100; in dp_ctrl_enable_mainlink_clocks()
1351 opts_dp->ssc = drm_dp_max_downspread(dpcd); in dp_ctrl_enable_mainlink_clocks()
1353 phy_configure(phy, &dp_io->phy_opts); in dp_ctrl_enable_mainlink_clocks()
1356 dev_pm_opp_set_rate(ctrl->dev, ctrl->link->link_params.rate * 1000); in dp_ctrl_enable_mainlink_clocks()
1357 ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, true); in dp_ctrl_enable_mainlink_clocks()
1359 DRM_ERROR("Unable to start link clocks. ret=%d\n", ret); in dp_ctrl_enable_mainlink_clocks()
1361 drm_dbg_dp(ctrl->drm_dev, "link rate=%d\n", ctrl->link->link_params.rate); in dp_ctrl_enable_mainlink_clocks()
1372 dp_catalog_ctrl_reset(ctrl->catalog); in dp_ctrl_reset_irq_ctrl()
1380 dp_catalog_ctrl_enable_irq(ctrl->catalog, enable); in dp_ctrl_reset_irq_ctrl()
1389 if (!ctrl->panel->psr_cap.version) in dp_ctrl_config_psr()
1392 dp_catalog_ctrl_config_psr(ctrl->catalog); in dp_ctrl_config_psr()
1395 drm_dp_dpcd_write(ctrl->aux, DP_PSR_EN_CFG, &cfg, 1); in dp_ctrl_config_psr()
1403 if (!ctrl->panel->psr_cap.version) in dp_ctrl_set_psr()
1417 reinit_completion(&ctrl->psr_op_comp); in dp_ctrl_set_psr()
1418 dp_catalog_ctrl_set_psr(ctrl->catalog, true); in dp_ctrl_set_psr()
1420 if (!wait_for_completion_timeout(&ctrl->psr_op_comp, in dp_ctrl_set_psr()
1423 dp_catalog_ctrl_set_psr(ctrl->catalog, false); in dp_ctrl_set_psr()
1428 dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); in dp_ctrl_set_psr()
1430 dp_catalog_ctrl_psr_mainlink_enable(ctrl->catalog, false); in dp_ctrl_set_psr()
1432 dp_catalog_ctrl_psr_mainlink_enable(ctrl->catalog, true); in dp_ctrl_set_psr()
1434 dp_catalog_ctrl_set_psr(ctrl->catalog, false); in dp_ctrl_set_psr()
1435 dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO); in dp_ctrl_set_psr()
1437 dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); in dp_ctrl_set_psr()
1448 dp_io = &ctrl->parser->io; in dp_ctrl_phy_init()
1449 phy = dp_io->phy; in dp_ctrl_phy_init()
1451 dp_catalog_ctrl_phy_reset(ctrl->catalog); in dp_ctrl_phy_init()
1454 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", in dp_ctrl_phy_init()
1455 phy, phy->init_count, phy->power_count); in dp_ctrl_phy_init()
1465 dp_io = &ctrl->parser->io; in dp_ctrl_phy_exit()
1466 phy = dp_io->phy; in dp_ctrl_phy_exit()
1468 dp_catalog_ctrl_phy_reset(ctrl->catalog); in dp_ctrl_phy_exit()
1470 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", in dp_ctrl_phy_exit()
1471 phy, phy->init_count, phy->power_count); in dp_ctrl_phy_exit()
1476 const u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_use_fixed_nvid()
1483 return (drm_dp_has_quirk(&ctrl->panel->desc, in dp_ctrl_use_fixed_nvid()
1492 struct dp_io *dp_io = &ctrl->parser->io; in dp_ctrl_reinitialize_mainlink()
1493 struct phy *phy = dp_io->phy; in dp_ctrl_reinitialize_mainlink()
1494 struct phy_configure_opts_dp *opts_dp = &dp_io->phy_opts.dp; in dp_ctrl_reinitialize_mainlink()
1496 dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); in dp_ctrl_reinitialize_mainlink()
1497 opts_dp->lanes = ctrl->link->link_params.num_lanes; in dp_ctrl_reinitialize_mainlink()
1498 phy_configure(phy, &dp_io->phy_opts); in dp_ctrl_reinitialize_mainlink()
1500 * Disable and re-enable the mainlink clock since the in dp_ctrl_reinitialize_mainlink()
1501 * link clock might have been adjusted as part of the in dp_ctrl_reinitialize_mainlink()
1502 * link maintenance. in dp_ctrl_reinitialize_mainlink()
1504 dev_pm_opp_set_rate(ctrl->dev, 0); in dp_ctrl_reinitialize_mainlink()
1505 ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); in dp_ctrl_reinitialize_mainlink()
1507 DRM_ERROR("Failed to disable clocks. ret=%d\n", ret); in dp_ctrl_reinitialize_mainlink()
1511 /* hw recommended delay before re-enabling clocks */ in dp_ctrl_reinitialize_mainlink()
1516 DRM_ERROR("Failed to enable mainlink clks. ret=%d\n", ret); in dp_ctrl_reinitialize_mainlink()
1529 dp_io = &ctrl->parser->io; in dp_ctrl_deinitialize_mainlink()
1530 phy = dp_io->phy; in dp_ctrl_deinitialize_mainlink()
1532 dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); in dp_ctrl_deinitialize_mainlink()
1534 dp_catalog_ctrl_reset(ctrl->catalog); in dp_ctrl_deinitialize_mainlink()
1536 dev_pm_opp_set_rate(ctrl->dev, 0); in dp_ctrl_deinitialize_mainlink()
1537 ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); in dp_ctrl_deinitialize_mainlink()
1539 DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); in dp_ctrl_deinitialize_mainlink()
1548 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", in dp_ctrl_deinitialize_mainlink()
1549 phy, phy->init_count, phy->power_count); in dp_ctrl_deinitialize_mainlink()
1558 dp_ctrl_push_idle(&ctrl->dp_ctrl); in dp_ctrl_link_maintenance()
1560 ctrl->link->phy_params.p_level = 0; in dp_ctrl_link_maintenance()
1561 ctrl->link->phy_params.v_level = 0; in dp_ctrl_link_maintenance()
1569 dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO); in dp_ctrl_link_maintenance()
1580 u32 pattern_requested = ctrl->link->phy_params.phy_test_pattern_sel; in dp_ctrl_send_phy_test_pattern()
1582 drm_dbg_dp(ctrl->drm_dev, "request: 0x%x\n", pattern_requested); in dp_ctrl_send_phy_test_pattern()
1584 if (dp_catalog_ctrl_update_vx_px(ctrl->catalog, in dp_ctrl_send_phy_test_pattern()
1585 ctrl->link->phy_params.v_level, in dp_ctrl_send_phy_test_pattern()
1586 ctrl->link->phy_params.p_level)) { in dp_ctrl_send_phy_test_pattern()
1590 dp_catalog_ctrl_send_phy_pattern(ctrl->catalog, pattern_requested); in dp_ctrl_send_phy_test_pattern()
1592 dp_link_send_test_response(ctrl->link); in dp_ctrl_send_phy_test_pattern()
1594 pattern_sent = dp_catalog_ctrl_read_phy_pattern(ctrl->catalog); in dp_ctrl_send_phy_test_pattern()
1623 drm_dbg_dp(ctrl->drm_dev, "%s: test->0x%x\n", in dp_ctrl_send_phy_test_pattern()
1633 if (!ctrl->link->phy_params.phy_test_pattern_sel) { in dp_ctrl_process_phy_test_request()
1634 drm_dbg_dp(ctrl->drm_dev, in dp_ctrl_process_phy_test_request()
1640 * The global reset will need DP link related clocks to be in dp_ctrl_process_phy_test_request()
1642 * link clocks and core clocks. in dp_ctrl_process_phy_test_request()
1644 ret = dp_ctrl_off(&ctrl->dp_ctrl); in dp_ctrl_process_phy_test_request()
1650 ret = dp_ctrl_on_link(&ctrl->dp_ctrl); in dp_ctrl_process_phy_test_request()
1652 DRM_ERROR("failed to enable DP link controller\n"); in dp_ctrl_process_phy_test_request()
1656 pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; in dp_ctrl_process_phy_test_request()
1659 ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, true); in dp_ctrl_process_phy_test_request()
1661 DRM_ERROR("Failed to start pixel clocks. ret=%d\n", ret); in dp_ctrl_process_phy_test_request()
1681 sink_request = ctrl->link->sink_request; in dp_ctrl_handle_sink_request()
1684 drm_dbg_dp(ctrl->drm_dev, "PHY_TEST_PATTERN request\n"); in dp_ctrl_handle_sink_request()
1699 dp_link_send_test_response(ctrl->link); in dp_ctrl_handle_sink_request()
1729 int num_lanes = ctrl->link->link_params.num_lanes; in dp_ctrl_channel_eq_ok()
1748 return -EINVAL; in dp_ctrl_on_link()
1752 rate = ctrl->panel->link_info.rate; in dp_ctrl_on_link()
1753 pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; in dp_ctrl_on_link()
1755 dp_power_clk_enable(ctrl->power, DP_CORE_PM, true); in dp_ctrl_on_link()
1757 if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) { in dp_ctrl_on_link()
1758 drm_dbg_dp(ctrl->drm_dev, in dp_ctrl_on_link()
1759 "using phy test link parameters\n"); in dp_ctrl_on_link()
1763 ctrl->link->link_params.rate = rate; in dp_ctrl_on_link()
1764 ctrl->link->link_params.num_lanes = in dp_ctrl_on_link()
1765 ctrl->panel->link_info.num_lanes; in dp_ctrl_on_link()
1768 drm_dbg_dp(ctrl->drm_dev, "rate=%d, num_lanes=%d, pixel_rate=%lu\n", in dp_ctrl_on_link()
1769 ctrl->link->link_params.rate, ctrl->link->link_params.num_lanes, in dp_ctrl_on_link()
1776 while (--link_train_max_retries) { in dp_ctrl_on_link()
1783 /* link train_1 failed */ in dp_ctrl_on_link()
1784 if (!dp_catalog_link_is_connected(ctrl->catalog)) in dp_ctrl_on_link()
1792 ctrl->link->link_params.num_lanes)) { in dp_ctrl_on_link()
1808 /* link train_2 failed */ in dp_ctrl_on_link()
1809 if (!dp_catalog_link_is_connected(ctrl->catalog)) in dp_ctrl_on_link()
1815 ctrl->link->link_params.num_lanes)) in dp_ctrl_on_link()
1825 /* stop link training before start re training */ in dp_ctrl_on_link()
1831 DRM_ERROR("Failed to reinitialize mainlink. rc=%d\n", rc); in dp_ctrl_on_link()
1836 if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) in dp_ctrl_on_link()
1839 if (rc == 0) { /* link train successfully */ in dp_ctrl_on_link()
1842 * stop link training at on_stream in dp_ctrl_on_link()
1847 * link training failed in dp_ctrl_on_link()
1853 rc = -ECONNRESET; in dp_ctrl_on_link()
1875 return -EINVAL; in dp_ctrl_on_stream()
1879 pixel_rate = pixel_rate_orig = ctrl->panel->dp_mode.drm_mode.clock; in dp_ctrl_on_stream()
1881 if (dp_ctrl->wide_bus_en) in dp_ctrl_on_stream()
1884 drm_dbg_dp(ctrl->drm_dev, "rate=%d, num_lanes=%d, pixel_rate=%lu\n", in dp_ctrl_on_stream()
1885 ctrl->link->link_params.rate, in dp_ctrl_on_stream()
1886 ctrl->link->link_params.num_lanes, pixel_rate); in dp_ctrl_on_stream()
1888 if (!dp_power_clk_status(ctrl->power, DP_CTRL_PM)) { /* link clk is off */ in dp_ctrl_on_stream()
1891 DRM_ERROR("Failed to start link clocks. ret=%d\n", ret); in dp_ctrl_on_stream()
1898 ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, true); in dp_ctrl_on_stream()
1900 DRM_ERROR("Unable to start pixel clocks. ret=%d\n", ret); in dp_ctrl_on_stream()
1907 /* stop txing train pattern to end link training */ in dp_ctrl_on_stream()
1914 reinit_completion(&ctrl->video_comp); in dp_ctrl_on_stream()
1918 dp_catalog_ctrl_config_msa(ctrl->catalog, in dp_ctrl_on_stream()
1919 ctrl->link->link_params.rate, in dp_ctrl_on_stream()
1924 dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO); in dp_ctrl_on_stream()
1930 mainlink_ready = dp_catalog_ctrl_mainlink_ready(ctrl->catalog); in dp_ctrl_on_stream()
1931 drm_dbg_dp(ctrl->drm_dev, in dp_ctrl_on_stream()
1946 dp_io = &ctrl->parser->io; in dp_ctrl_off_link_stream()
1947 phy = dp_io->phy; in dp_ctrl_off_link_stream()
1950 dp_link_psm_config(ctrl->link, &ctrl->panel->link_info, true); in dp_ctrl_off_link_stream()
1952 dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); in dp_ctrl_off_link_stream()
1954 if (dp_power_clk_status(ctrl->power, DP_STREAM_PM)) { in dp_ctrl_off_link_stream()
1955 ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, false); in dp_ctrl_off_link_stream()
1957 DRM_ERROR("Failed to disable pclk. ret=%d\n", ret); in dp_ctrl_off_link_stream()
1962 dev_pm_opp_set_rate(ctrl->dev, 0); in dp_ctrl_off_link_stream()
1963 ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); in dp_ctrl_off_link_stream()
1965 DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); in dp_ctrl_off_link_stream()
1975 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", in dp_ctrl_off_link_stream()
1976 phy, phy->init_count, phy->power_count); in dp_ctrl_off_link_stream()
1988 dp_io = &ctrl->parser->io; in dp_ctrl_off_link()
1989 phy = dp_io->phy; in dp_ctrl_off_link()
1991 dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); in dp_ctrl_off_link()
1993 ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); in dp_ctrl_off_link()
1995 DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); in dp_ctrl_off_link()
1998 DRM_DEBUG_DP("Before, phy=%p init_count=%d power_on=%d\n", in dp_ctrl_off_link()
1999 phy, phy->init_count, phy->power_count); in dp_ctrl_off_link()
2003 DRM_DEBUG_DP("After, phy=%p init_count=%d power_on=%d\n", in dp_ctrl_off_link()
2004 phy, phy->init_count, phy->power_count); in dp_ctrl_off_link()
2017 return -EINVAL; in dp_ctrl_off()
2020 dp_io = &ctrl->parser->io; in dp_ctrl_off()
2021 phy = dp_io->phy; in dp_ctrl_off()
2023 dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); in dp_ctrl_off()
2025 dp_catalog_ctrl_reset(ctrl->catalog); in dp_ctrl_off()
2027 ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, false); in dp_ctrl_off()
2029 DRM_ERROR("Failed to disable pixel clocks. ret=%d\n", ret); in dp_ctrl_off()
2031 dev_pm_opp_set_rate(ctrl->dev, 0); in dp_ctrl_off()
2032 ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); in dp_ctrl_off()
2034 DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); in dp_ctrl_off()
2038 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", in dp_ctrl_off()
2039 phy, phy->init_count, phy->power_count); in dp_ctrl_off()
2055 if (ctrl->panel->psr_cap.version) { in dp_ctrl_isr()
2056 isr = dp_catalog_ctrl_read_psr_interrupt_status(ctrl->catalog); in dp_ctrl_isr()
2059 complete(&ctrl->psr_op_comp); in dp_ctrl_isr()
2062 drm_dbg_dp(ctrl->drm_dev, "PSR exit done\n"); in dp_ctrl_isr()
2065 drm_dbg_dp(ctrl->drm_dev, "PSR frame update done\n"); in dp_ctrl_isr()
2068 drm_dbg_dp(ctrl->drm_dev, "PSR frame capture done\n"); in dp_ctrl_isr()
2071 isr = dp_catalog_ctrl_get_interrupt(ctrl->catalog); in dp_ctrl_isr()
2075 drm_dbg_dp(ctrl->drm_dev, "dp_video_ready\n"); in dp_ctrl_isr()
2076 complete(&ctrl->video_comp); in dp_ctrl_isr()
2081 drm_dbg_dp(ctrl->drm_dev, "idle_patterns_sent\n"); in dp_ctrl_isr()
2082 complete(&ctrl->idle_comp); in dp_ctrl_isr()
2089 struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, in dp_ctrl_get() argument
2098 !link || !catalog) { in dp_ctrl_get()
2100 return ERR_PTR(-EINVAL); in dp_ctrl_get()
2106 return ERR_PTR(-ENOMEM); in dp_ctrl_get()
2121 init_completion(&ctrl->idle_comp); in dp_ctrl_get()
2122 init_completion(&ctrl->psr_op_comp); in dp_ctrl_get()
2123 init_completion(&ctrl->video_comp); in dp_ctrl_get()
2126 ctrl->parser = parser; in dp_ctrl_get()
2127 ctrl->panel = panel; in dp_ctrl_get()
2128 ctrl->power = power; in dp_ctrl_get()
2129 ctrl->aux = aux; in dp_ctrl_get()
2130 ctrl->link = link; in dp_ctrl_get()
2131 ctrl->catalog = catalog; in dp_ctrl_get()
2132 ctrl->dev = dev; in dp_ctrl_get()
2134 return &ctrl->dp_ctrl; in dp_ctrl_get()