Lines Matching full:phys
234 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in dpu_encoder_get_crc_values_cnt() local
236 if (phys->hw_intf && phys->hw_intf->ops.setup_misr in dpu_encoder_get_crc_values_cnt()
237 && phys->hw_intf->ops.collect_misr) in dpu_encoder_get_crc_values_cnt()
253 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in dpu_encoder_setup_misr() local
255 if (!phys->hw_intf || !phys->hw_intf->ops.setup_misr) in dpu_encoder_setup_misr()
258 phys->hw_intf->ops.setup_misr(phys->hw_intf, true, 1); in dpu_encoder_setup_misr()
276 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in dpu_encoder_get_crc() local
278 if (!phys->hw_intf || !phys->hw_intf->ops.collect_misr) in dpu_encoder_get_crc()
281 rc = phys->hw_intf->ops.collect_misr(phys->hw_intf, &crcs[pos + entries_added]); in dpu_encoder_get_crc()
423 struct dpu_encoder_phys *phys = dpu_enc ? dpu_enc->cur_master : NULL; in dpu_encoder_get_vsync_count() local
424 return phys ? atomic_read(&phys->vsync_cnt) : 0; in dpu_encoder_get_vsync_count()
430 struct dpu_encoder_phys *phys; in dpu_encoder_get_linecount() local
434 phys = dpu_enc ? dpu_enc->cur_master : NULL; in dpu_encoder_get_linecount()
436 if (phys && phys->ops.get_line_count) in dpu_encoder_get_linecount()
437 linecount = phys->ops.get_line_count(phys); in dpu_encoder_get_linecount()
458 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in dpu_encoder_destroy() local
460 if (phys->ops.destroy) { in dpu_encoder_destroy()
461 phys->ops.destroy(phys); in dpu_encoder_destroy()
641 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in dpu_encoder_virt_atomic_check() local
643 if (phys->ops.atomic_check) in dpu_encoder_virt_atomic_check()
644 ret = phys->ops.atomic_check(phys, crtc_state, in dpu_encoder_virt_atomic_check()
648 "mode unsupported, phys idx %d\n", i); in dpu_encoder_virt_atomic_check()
690 DPU_ERROR("invalid num phys enc %d/%d\n", in _dpu_encoder_update_vsync_source()
746 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in _dpu_encoder_irq_control() local
748 if (phys->ops.irq_control) in _dpu_encoder_irq_control()
749 phys->ops.irq_control(phys, enable); in _dpu_encoder_irq_control()
1009 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in dpu_encoder_prepare_wb_job() local
1011 if (phys->ops.prepare_wb_job) in dpu_encoder_prepare_wb_job()
1012 phys->ops.prepare_wb_job(phys, job); in dpu_encoder_prepare_wb_job()
1026 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in dpu_encoder_cleanup_wb_job() local
1028 if (phys->ops.cleanup_wb_job) in dpu_encoder_cleanup_wb_job()
1029 phys->ops.cleanup_wb_job(phys, job); in dpu_encoder_cleanup_wb_job()
1112 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in dpu_encoder_virt_atomic_mode_set() local
1126 phys->hw_pp = dpu_enc->hw_pp[i]; in dpu_encoder_virt_atomic_mode_set()
1127 phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[i]); in dpu_encoder_virt_atomic_mode_set()
1129 phys->cached_mode = crtc_state->adjusted_mode; in dpu_encoder_virt_atomic_mode_set()
1130 if (phys->ops.atomic_mode_set) in dpu_encoder_virt_atomic_mode_set()
1131 phys->ops.atomic_mode_set(phys, crtc_state, conn_state); in dpu_encoder_virt_atomic_mode_set()
1263 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in dpu_encoder_virt_atomic_disable() local
1265 if (phys->ops.disable) in dpu_encoder_virt_atomic_disable()
1266 phys->ops.disable(phys); in dpu_encoder_virt_atomic_disable()
1270 /* after phys waits for frame-done, should be no more frames pending */ in dpu_encoder_virt_atomic_disable()
1373 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in dpu_encoder_toggle_vblank_for_crtc() local
1375 if (phys->ops.control_vblank_irq) in dpu_encoder_toggle_vblank_for_crtc()
1376 phys->ops.control_vblank_irq(phys, enable); in dpu_encoder_toggle_vblank_for_crtc()
1468 * @phys: Pointer to physical encoder structure
1472 struct dpu_encoder_phys *phys, uint32_t extra_flush_bits) in _dpu_encoder_trigger_flush() argument
1478 if (!phys->hw_pp) { in _dpu_encoder_trigger_flush()
1483 ctl = phys->hw_ctl; in _dpu_encoder_trigger_flush()
1489 pending_kickoff_cnt = dpu_encoder_phys_inc_pending(phys); in _dpu_encoder_trigger_flush()
1500 dpu_encoder_helper_get_intf_type(phys->intf_mode), in _dpu_encoder_trigger_flush()
1501 phys->hw_intf ? phys->hw_intf->idx : -1, in _dpu_encoder_trigger_flush()
1502 phys->hw_wb ? phys->hw_wb->idx : -1, in _dpu_encoder_trigger_flush()
1509 * @phys: Pointer to physical encoder structure
1511 static void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys) in _dpu_encoder_trigger_start() argument
1513 if (!phys) { in _dpu_encoder_trigger_start()
1518 if (!phys->hw_pp) { in _dpu_encoder_trigger_start()
1523 if (phys->ops.trigger_start && phys->enable_state != DPU_ENC_DISABLED) in _dpu_encoder_trigger_start()
1524 phys->ops.trigger_start(phys); in _dpu_encoder_trigger_start()
1611 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in _dpu_encoder_kickoff_phys() local
1613 if (phys->enable_state == DPU_ENC_DISABLED) in _dpu_encoder_kickoff_phys()
1616 ctl = phys->hw_ctl; in _dpu_encoder_kickoff_phys()
1623 if (phys->split_role != ENC_ROLE_SLAVE) in _dpu_encoder_kickoff_phys()
1626 if (!phys->ops.needs_single_flush || in _dpu_encoder_kickoff_phys()
1627 !phys->ops.needs_single_flush(phys)) in _dpu_encoder_kickoff_phys()
1628 _dpu_encoder_trigger_flush(&dpu_enc->base, phys, 0x0); in _dpu_encoder_kickoff_phys()
1649 struct dpu_encoder_phys *phys; in dpu_encoder_trigger_kickoff_pending() local
1662 phys = dpu_enc->phys_encs[i]; in dpu_encoder_trigger_kickoff_pending()
1664 ctl = phys->hw_ctl; in dpu_encoder_trigger_kickoff_pending()
1669 if ((phys == dpu_enc->cur_master) && in dpu_encoder_trigger_kickoff_pending()
1870 struct dpu_encoder_phys *phys; in dpu_encoder_prepare_for_kickoff() local
1881 phys = dpu_enc->phys_encs[i]; in dpu_encoder_prepare_for_kickoff()
1882 if (phys->ops.prepare_for_kickoff) in dpu_encoder_prepare_for_kickoff()
1883 phys->ops.prepare_for_kickoff(phys); in dpu_encoder_prepare_for_kickoff()
1884 if (phys->enable_state == DPU_ENC_ERR_NEEDS_HW_RESET) in dpu_encoder_prepare_for_kickoff()
1891 /* if any phys needs reset, reset all phys, in-order */ in dpu_encoder_prepare_for_kickoff()
1907 struct dpu_encoder_phys *phys; in dpu_encoder_is_valid_for_commit() local
1913 phys = dpu_enc->phys_encs[i]; in dpu_encoder_is_valid_for_commit()
1914 if (phys->ops.is_valid_for_commit && !phys->ops.is_valid_for_commit(phys)) { in dpu_encoder_is_valid_for_commit()
1927 struct dpu_encoder_phys *phys; in dpu_encoder_kickoff() local
1943 /* All phys encs are ready to go, trigger the kickoff */ in dpu_encoder_kickoff()
1946 /* allow phys encs to handle any post-kickoff business */ in dpu_encoder_kickoff()
1948 phys = dpu_enc->phys_encs[i]; in dpu_encoder_kickoff()
1949 if (phys->ops.handle_post_kickoff) in dpu_encoder_kickoff()
1950 phys->ops.handle_post_kickoff(phys); in dpu_encoder_kickoff()
2038 * to be done per phys encoder into the phys_disable() op. in dpu_encoder_helper_phys_cleanup()
2104 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in _dpu_encoder_status_show() local
2107 phys->hw_intf ? phys->hw_intf->idx - INTF_0 : -1, in _dpu_encoder_status_show()
2108 phys->hw_wb ? phys->hw_wb->idx - WB_0 : -1, in _dpu_encoder_status_show()
2109 atomic_read(&phys->vsync_cnt), in _dpu_encoder_status_show()
2110 atomic_read(&phys->underrun_cnt)); in _dpu_encoder_status_show()
2112 seq_printf(s, "mode: %s\n", dpu_encoder_helper_get_intf_type(phys->intf_mode)); in _dpu_encoder_status_show()
2291 "invalid phys both intf and wb block at idx: %d\n", i); in dpu_encoder_setup_display()
2299 DPU_ERROR_ENC(dpu_enc, "failed to add phys encs\n"); in dpu_encoder_setup_display()
2423 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; in dpu_encoder_wait_for_event() local
2427 fn_wait = phys->ops.wait_for_commit_done; in dpu_encoder_wait_for_event()
2430 fn_wait = phys->ops.wait_for_tx_complete; in dpu_encoder_wait_for_event()
2433 fn_wait = phys->ops.wait_for_vblank; in dpu_encoder_wait_for_event()
2443 ret = fn_wait(phys); in dpu_encoder_wait_for_event()