Lines Matching +full:cpu +full:- +full:centric
2 * Copyright © 2015-2016 Intel Corporation
40 * captured by DMA from the GPU, unsynchronized with and unrelated to the CPU.
44 * without special privileges. Access to system-wide metrics requires root
58 * might sample sets of tightly-coupled counters, depending on the
70 * interleaved with event-type specific members.
74 * with the CPU, using HW specific packing formats for counter sets. Sometimes
76 * would be acceptable to expose them to unprivileged applications - to hide
88 * into perf's currently cpu centric design.
96 * side-band OA data captured via MI_REPORT_PERF_COUNT commands; we're
102 * For posterity, in case we might re-visit trying to adapt core perf to be
106 * - The perf based OA PMU driver broke some significant design assumptions:
108 * Existing perf pmus are used for profiling work on a cpu and we were
110 * implications, the need to fake cpu-related data (such as user/kernel
112 * as a way to forward device-specific status records.
115 * involvement from the CPU, making our PMU driver the first of a kind.
117 * Given the way we were periodically forward data from the GPU-mapped, OA
123 * explicitly initiated from the cpu (say in response to a userspace read())
125 * trigger a report from the cpu on demand.
130 * opened, there's no clear precedent for being able to provide group-wide
139 * for combining with the side-band raw reports it captures using
142 * - As a side note on perf's grouping feature; there was also some concern
158 * one time. The OA unit is not designed to allow re-configuration while in
178 * - It felt like our perf based PMU was making some technical compromises
182 * cpu core, while our device pmu related to neither. Events opened with a
184 * that process - so not appropriate for us. When an event is related to a
185 * cpu id, perf ensures pmu methods will be invoked via an inter process
187 * perf events for a specific cpu. This was workable but it meant the
228 #define OA_TAKEN(tail, head) ((tail - head) & (OA_BUFFER_SIZE - 1))
236 * CPU).
239 * by checking for a zeroed report-id field in tail reports, we want to account
259 * non-periodic reports (such as on context switch) or the OA unit may be
314 * code assumes all reports have a power-of-two size and ~(size - 1) can
342 * struct perf_open_properties - for validated properties given to open a stream
357 * @poll_oa_period: The period in nanoseconds at which the CPU will check for OA
401 kfree(oa_config->flex_regs); in i915_oa_config_release()
402 kfree(oa_config->b_counter_regs); in i915_oa_config_release()
403 kfree(oa_config->mux_regs); in i915_oa_config_release()
414 oa_config = idr_find(&perf->metrics_idr, metrics_set); in i915_perf_get_oa_config()
424 i915_oa_config_put(oa_bo->oa_config); in free_oa_config_bo()
425 i915_vma_put(oa_bo->vma); in free_oa_config_bo()
432 return &stream->engine->oa_group->regs; in __oa_regs()
437 struct intel_uncore *uncore = stream->uncore; in gen12_oa_hw_tail_read()
439 return intel_uncore_read(uncore, __oa_regs(stream)->oa_tail_ptr) & in gen12_oa_hw_tail_read()
445 struct intel_uncore *uncore = stream->uncore; in gen8_oa_hw_tail_read()
452 struct intel_uncore *uncore = stream->uncore; in gen7_oa_hw_tail_read()
459 ((__s)->oa_buffer.format->header == HDR_64_BIT)
469 (GRAPHICS_VER(stream->perf->i915) == 12 ? in oa_report_reason()
485 stream->perf->gen8_valid_ctx_bit); in oa_report_ctx_invalid()
507 return ctx_id & stream->specific_ctx_id_mask; in oa_context_id()
519 * oa_buffer_check_unlocked - check for data and update tail ptr state
527 * pointer having a race with respect to what data is visible to the CPU.
543 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in oa_buffer_check_unlocked()
544 int report_size = stream->oa_buffer.format->size; in oa_buffer_check_unlocked()
555 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in oa_buffer_check_unlocked()
557 hw_tail = stream->perf->ops.oa_hw_tail_read(stream); in oa_buffer_check_unlocked()
563 partial_report_size = OA_TAKEN(hw_tail, stream->oa_buffer.tail); in oa_buffer_check_unlocked()
571 * anywhere between this head and stream->oa_buffer.tail. in oa_buffer_check_unlocked()
573 head = stream->oa_buffer.head - gtt_offset; in oa_buffer_check_unlocked()
574 read_tail = stream->oa_buffer.tail - gtt_offset; in oa_buffer_check_unlocked()
590 void *report = stream->oa_buffer.vaddr + tail; in oa_buffer_check_unlocked()
596 tail = (tail - report_size) & (OA_BUFFER_SIZE - 1); in oa_buffer_check_unlocked()
600 __ratelimit(&stream->perf->tail_pointer_race)) in oa_buffer_check_unlocked()
601 drm_notice(&stream->uncore->i915->drm, in oa_buffer_check_unlocked()
605 stream->oa_buffer.tail = gtt_offset + tail; in oa_buffer_check_unlocked()
607 pollin = OA_TAKEN(stream->oa_buffer.tail, in oa_buffer_check_unlocked()
608 stream->oa_buffer.head) >= report_size; in oa_buffer_check_unlocked()
610 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in oa_buffer_check_unlocked()
616 * append_oa_status - Appends a status record to a userspace read() buffer.
617 * @stream: An i915-perf stream opened for OA metrics
638 if ((count - *offset) < header.size) in append_oa_status()
639 return -ENOSPC; in append_oa_status()
642 return -EFAULT; in append_oa_status()
650 * append_oa_sample - Copies single OA report into userspace read() buffer.
651 * @stream: An i915-perf stream opened for OA metrics
658 * properties when opening a stream, tracked as `stream->sample_flags`. This
672 int report_size = stream->oa_buffer.format->size; in append_oa_sample()
679 header.size = stream->sample_size; in append_oa_sample()
681 if ((count - *offset) < header.size) in append_oa_sample()
682 return -ENOSPC; in append_oa_sample()
686 return -EFAULT; in append_oa_sample()
689 oa_buf_end = stream->oa_buffer.vaddr + OA_BUFFER_SIZE; in append_oa_sample()
690 report_size_partial = oa_buf_end - report; in append_oa_sample()
694 return -EFAULT; in append_oa_sample()
697 if (copy_to_user(buf, stream->oa_buffer.vaddr, in append_oa_sample()
698 report_size - report_size_partial)) in append_oa_sample()
699 return -EFAULT; in append_oa_sample()
701 return -EFAULT; in append_oa_sample()
710 * gen8_append_oa_reports - Copies all buffered OA reports into
712 * @stream: An i915-perf stream opened for OA metrics
717 * Notably any error condition resulting in a short read (-%ENOSPC or
718 * -%EFAULT) will be returned even though one or more records may
725 * and back-to-front you're not alone, but this follows the
735 struct intel_uncore *uncore = stream->uncore; in gen8_append_oa_reports()
736 int report_size = stream->oa_buffer.format->size; in gen8_append_oa_reports()
737 u8 *oa_buf_base = stream->oa_buffer.vaddr; in gen8_append_oa_reports()
738 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen8_append_oa_reports()
739 u32 mask = (OA_BUFFER_SIZE - 1); in gen8_append_oa_reports()
745 if (drm_WARN_ON(&uncore->i915->drm, !stream->enabled)) in gen8_append_oa_reports()
746 return -EIO; in gen8_append_oa_reports()
748 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
750 head = stream->oa_buffer.head; in gen8_append_oa_reports()
751 tail = stream->oa_buffer.tail; in gen8_append_oa_reports()
753 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
759 head -= gtt_offset; in gen8_append_oa_reports()
760 tail -= gtt_offset; in gen8_append_oa_reports()
768 if (drm_WARN_ONCE(&uncore->i915->drm, in gen8_append_oa_reports()
773 return -EIO; in gen8_append_oa_reports()
798 * invalid to be sure we avoid false-positive, single-context in gen8_append_oa_reports()
812 * stop the counters from updating as system-wide / global in gen8_append_oa_reports()
816 * filtered on the cpu but it's not worth trying to in gen8_append_oa_reports()
820 * provide a side-band view of the real values. in gen8_append_oa_reports()
824 * needs be forwarded bookend context-switch reports so that it in gen8_append_oa_reports()
837 * switches since it's not-uncommon for periodic samples to in gen8_append_oa_reports()
840 if (!stream->ctx || in gen8_append_oa_reports()
841 stream->specific_ctx_id == ctx_id || in gen8_append_oa_reports()
842 stream->oa_buffer.last_ctx_id == stream->specific_ctx_id || in gen8_append_oa_reports()
849 if (stream->ctx && in gen8_append_oa_reports()
850 stream->specific_ctx_id != ctx_id) { in gen8_append_oa_reports()
859 stream->oa_buffer.last_ctx_id = ctx_id; in gen8_append_oa_reports()
870 u8 *oa_buf_end = stream->oa_buffer.vaddr + in gen8_append_oa_reports()
872 u32 part = oa_buf_end - (u8 *)report32; in gen8_append_oa_reports()
879 memset(oa_buf_base, 0, report_size - part); in gen8_append_oa_reports()
887 oaheadptr = GRAPHICS_VER(stream->perf->i915) == 12 ? in gen8_append_oa_reports()
888 __oa_regs(stream)->oa_head_ptr : in gen8_append_oa_reports()
891 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
900 stream->oa_buffer.head = head; in gen8_append_oa_reports()
902 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
909 * gen8_oa_read - copy status records then buffered OA reports
910 * @stream: An i915-perf stream opened for OA metrics
933 struct intel_uncore *uncore = stream->uncore; in gen8_oa_read()
938 if (drm_WARN_ON(&uncore->i915->drm, !stream->oa_buffer.vaddr)) in gen8_oa_read()
939 return -EIO; in gen8_oa_read()
941 oastatus_reg = GRAPHICS_VER(stream->perf->i915) == 12 ? in gen8_oa_read()
942 __oa_regs(stream)->oa_status : in gen8_oa_read()
967 drm_dbg(&stream->perf->i915->drm, in gen8_oa_read()
969 stream->period_exponent); in gen8_oa_read()
971 stream->perf->ops.oa_disable(stream); in gen8_oa_read()
972 stream->perf->ops.oa_enable(stream); in gen8_oa_read()
975 * Note: .oa_enable() is expected to re-init the oabuffer and in gen8_oa_read()
990 IS_GRAPHICS_VER(uncore->i915, 8, 11) ? in gen8_oa_read()
999 * gen7_append_oa_reports - Copies all buffered OA reports into
1001 * @stream: An i915-perf stream opened for OA metrics
1006 * Notably any error condition resulting in a short read (-%ENOSPC or
1007 * -%EFAULT) will be returned even though one or more records may
1014 * and back-to-front you're not alone, but this follows the
1024 struct intel_uncore *uncore = stream->uncore; in gen7_append_oa_reports()
1025 int report_size = stream->oa_buffer.format->size; in gen7_append_oa_reports()
1026 u8 *oa_buf_base = stream->oa_buffer.vaddr; in gen7_append_oa_reports()
1027 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_append_oa_reports()
1028 u32 mask = (OA_BUFFER_SIZE - 1); in gen7_append_oa_reports()
1034 if (drm_WARN_ON(&uncore->i915->drm, !stream->enabled)) in gen7_append_oa_reports()
1035 return -EIO; in gen7_append_oa_reports()
1037 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1039 head = stream->oa_buffer.head; in gen7_append_oa_reports()
1040 tail = stream->oa_buffer.tail; in gen7_append_oa_reports()
1042 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1047 head -= gtt_offset; in gen7_append_oa_reports()
1048 tail -= gtt_offset; in gen7_append_oa_reports()
1056 if (drm_WARN_ONCE(&uncore->i915->drm, in gen7_append_oa_reports()
1061 return -EIO; in gen7_append_oa_reports()
1078 if (drm_WARN_ON(&uncore->i915->drm, in gen7_append_oa_reports()
1079 (OA_BUFFER_SIZE - head) < report_size)) { in gen7_append_oa_reports()
1080 drm_err(&uncore->i915->drm, in gen7_append_oa_reports()
1081 "Spurious OA head ptr: non-integral report offset\n"); in gen7_append_oa_reports()
1085 /* The report-ID field for periodic samples includes in gen7_append_oa_reports()
1092 if (__ratelimit(&stream->perf->spurious_report_rs)) in gen7_append_oa_reports()
1093 drm_notice(&uncore->i915->drm, in gen7_append_oa_reports()
1110 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1120 stream->oa_buffer.head = head; in gen7_append_oa_reports()
1122 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1129 * gen7_oa_read - copy status records then buffered OA reports
1130 * @stream: An i915-perf stream opened for OA metrics
1149 struct intel_uncore *uncore = stream->uncore; in gen7_oa_read()
1153 if (drm_WARN_ON(&uncore->i915->drm, !stream->oa_buffer.vaddr)) in gen7_oa_read()
1154 return -EIO; in gen7_oa_read()
1163 oastatus1 &= ~stream->perf->gen7_latched_oastatus1; in gen7_oa_read()
1167 * - The status can be interpreted to mean that the buffer is in gen7_oa_read()
1169 * which will start to report a near-empty buffer after an in gen7_oa_read()
1174 * - Since it also implies the HW has started overwriting old in gen7_oa_read()
1179 * - In the future we may want to introduce a flight recorder in gen7_oa_read()
1191 drm_dbg(&stream->perf->i915->drm, in gen7_oa_read()
1193 stream->period_exponent); in gen7_oa_read()
1195 stream->perf->ops.oa_disable(stream); in gen7_oa_read()
1196 stream->perf->ops.oa_enable(stream); in gen7_oa_read()
1206 stream->perf->gen7_latched_oastatus1 |= in gen7_oa_read()
1214 * i915_oa_wait_unlocked - handles blocking IO until OA data available
1215 * @stream: An i915-perf stream opened for OA metrics
1218 * for OA metrics. It waits until the hrtimer callback finds a non-empty
1222 * since any subsequent read handling will return -EAGAIN if there isn't
1230 if (!stream->periodic) in i915_oa_wait_unlocked()
1231 return -EIO; in i915_oa_wait_unlocked()
1233 return wait_event_interruptible(stream->poll_wq, in i915_oa_wait_unlocked()
1238 * i915_oa_poll_wait - call poll_wait() for an OA stream poll()
1239 * @stream: An i915-perf stream opened for OA metrics
1251 poll_wait(file, &stream->poll_wq, wait); in i915_oa_poll_wait()
1255 * i915_oa_read - just calls through to &i915_oa_ops->read
1256 * @stream: An i915-perf stream opened for OA metrics
1271 return stream->perf->ops.read(stream, buf, count, offset); in i915_oa_read()
1277 struct i915_gem_context *ctx = stream->ctx; in oa_pin_context()
1280 int err = -ENODEV; in oa_pin_context()
1283 if (ce->engine != stream->engine) /* first match! */ in oa_pin_context()
1301 if (err == -EDEADLK) { in oa_pin_context()
1311 stream->pinned_ctx = ce; in oa_pin_context()
1312 return stream->pinned_ctx; in oa_pin_context()
1321 if (GRAPHICS_VER(rq->i915) >= 8) in __store_reg_to_mem()
1354 err = -ETIME; in __read_reg()
1368 scratch = __vm_create_scratch_for_read_pinned(&ce->engine->gt->ggtt->vm, 4); in gen12_guc_sw_ctx_id()
1376 err = __read_reg(ce, RING_EXECLIST_STATUS_HI(ce->engine->mmio_base), in gen12_guc_sw_ctx_id()
1381 val = i915_gem_object_pin_map_unlocked(scratch->obj, I915_MAP_WB); in gen12_guc_sw_ctx_id()
1388 i915_gem_object_unpin_map(scratch->obj); in gen12_guc_sw_ctx_id()
1397 * 0 - (NUM_CONTEXT_TAG -1) are used by other contexts
1411 if (intel_engine_uses_guc(stream->engine)) { in gen12_get_render_context_id()
1412 ret = gen12_guc_sw_ctx_id(stream->pinned_ctx, &ctx_id); in gen12_get_render_context_id()
1416 mask = ((1U << GEN12_GUC_SW_CTX_ID_WIDTH) - 1) << in gen12_get_render_context_id()
1417 (GEN12_GUC_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1418 } else if (GRAPHICS_VER_FULL(stream->engine->i915) >= IP_VER(12, 50)) { in gen12_get_render_context_id()
1419 ctx_id = (XEHP_MAX_CONTEXT_HW_ID - 1) << in gen12_get_render_context_id()
1420 (XEHP_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1422 mask = ((1U << XEHP_SW_CTX_ID_WIDTH) - 1) << in gen12_get_render_context_id()
1423 (XEHP_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1425 ctx_id = (GEN12_MAX_CONTEXT_HW_ID - 1) << in gen12_get_render_context_id()
1426 (GEN11_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1428 mask = ((1U << GEN11_SW_CTX_ID_WIDTH) - 1) << in gen12_get_render_context_id()
1429 (GEN11_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1431 stream->specific_ctx_id = ctx_id & mask; in gen12_get_render_context_id()
1432 stream->specific_ctx_id_mask = mask; in gen12_get_render_context_id()
1457 u32 offset, len = (ce->engine->context_size - PAGE_SIZE) / 4; in oa_context_image_offset()
1458 u32 *state = ce->lrc_reg_state; in oa_context_image_offset()
1460 if (drm_WARN_ON(&ce->engine->i915->drm, !state)) in oa_context_image_offset()
1466 * We expect reg-value pairs in MI_LRI command, so in oa_context_image_offset()
1469 drm_WARN_ON(&ce->engine->i915->drm, in oa_context_image_offset()
1484 i915_reg_t reg = GEN12_OACTXCONTROL(ce->engine->mmio_base); in set_oa_ctx_ctrl_offset()
1485 struct i915_perf *perf = &ce->engine->i915->perf; in set_oa_ctx_ctrl_offset()
1486 u32 offset = perf->ctx_oactxctrl_offset; in set_oa_ctx_ctrl_offset()
1493 perf->ctx_oactxctrl_offset = offset; in set_oa_ctx_ctrl_offset()
1495 drm_dbg(&ce->engine->i915->drm, in set_oa_ctx_ctrl_offset()
1497 ce->engine->name, offset); in set_oa_ctx_ctrl_offset()
1500 return offset && offset != U32_MAX ? 0 : -ENODEV; in set_oa_ctx_ctrl_offset()
1505 return engine->class == RENDER_CLASS; in engine_supports_mi_query()
1509 * oa_get_render_ctx_id - determine and hold ctx hw id
1510 * @stream: An i915-perf stream opened for OA metrics
1527 if (engine_supports_mi_query(stream->engine) && in oa_get_render_ctx_id()
1528 HAS_LOGICAL_RING_CONTEXTS(stream->perf->i915)) { in oa_get_render_ctx_id()
1536 drm_err(&stream->perf->i915->drm, in oa_get_render_ctx_id()
1538 stream->engine->name); in oa_get_render_ctx_id()
1543 switch (GRAPHICS_VER(ce->engine->i915)) { in oa_get_render_ctx_id()
1549 stream->specific_ctx_id = i915_ggtt_offset(ce->state); in oa_get_render_ctx_id()
1550 stream->specific_ctx_id_mask = 0; in oa_get_render_ctx_id()
1556 if (intel_engine_uses_guc(ce->engine)) { in oa_get_render_ctx_id()
1567 stream->specific_ctx_id = ce->lrc.lrca >> 12; in oa_get_render_ctx_id()
1573 stream->specific_ctx_id_mask = in oa_get_render_ctx_id()
1574 (1U << (GEN8_CTX_ID_WIDTH - 1)) - 1; in oa_get_render_ctx_id()
1576 stream->specific_ctx_id_mask = in oa_get_render_ctx_id()
1577 (1U << GEN8_CTX_ID_WIDTH) - 1; in oa_get_render_ctx_id()
1578 stream->specific_ctx_id = stream->specific_ctx_id_mask; in oa_get_render_ctx_id()
1588 MISSING_CASE(GRAPHICS_VER(ce->engine->i915)); in oa_get_render_ctx_id()
1591 ce->tag = stream->specific_ctx_id; in oa_get_render_ctx_id()
1593 drm_dbg(&stream->perf->i915->drm, in oa_get_render_ctx_id()
1595 stream->specific_ctx_id, in oa_get_render_ctx_id()
1596 stream->specific_ctx_id_mask); in oa_get_render_ctx_id()
1602 * oa_put_render_ctx_id - counterpart to oa_get_render_ctx_id releases hold
1603 * @stream: An i915-perf stream opened for OA metrics
1612 ce = fetch_and_zero(&stream->pinned_ctx); in oa_put_render_ctx_id()
1614 ce->tag = 0; /* recomputed on next submission after parking */ in oa_put_render_ctx_id()
1618 stream->specific_ctx_id = INVALID_CTX_ID; in oa_put_render_ctx_id()
1619 stream->specific_ctx_id_mask = 0; in oa_put_render_ctx_id()
1625 i915_vma_unpin_and_release(&stream->oa_buffer.vma, in free_oa_buffer()
1628 stream->oa_buffer.vaddr = NULL; in free_oa_buffer()
1636 i915_oa_config_put(stream->oa_config); in free_oa_configs()
1637 llist_for_each_entry_safe(oa_bo, tmp, stream->oa_config_bos.first, node) in free_oa_configs()
1644 i915_vma_unpin_and_release(&stream->noa_wait, 0); in free_noa_wait()
1649 return engine->oa_group; in engine_supports_oa()
1654 return engine->oa_group && engine->oa_group->type == type; in engine_supports_oa_format()
1659 struct i915_perf *perf = stream->perf; in i915_oa_stream_destroy()
1660 struct intel_gt *gt = stream->engine->gt; in i915_oa_stream_destroy()
1661 struct i915_perf_group *g = stream->engine->oa_group; in i915_oa_stream_destroy()
1663 if (WARN_ON(stream != g->exclusive_stream)) in i915_oa_stream_destroy()
1672 WRITE_ONCE(g->exclusive_stream, NULL); in i915_oa_stream_destroy()
1673 perf->ops.disable_metric_set(stream); in i915_oa_stream_destroy()
1680 if (stream->override_gucrc) in i915_oa_stream_destroy()
1681 drm_WARN_ON(>->i915->drm, in i915_oa_stream_destroy()
1682 intel_guc_slpc_unset_gucrc_mode(>->uc.guc.slpc)); in i915_oa_stream_destroy()
1684 intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL); in i915_oa_stream_destroy()
1685 intel_engine_pm_put(stream->engine); in i915_oa_stream_destroy()
1687 if (stream->ctx) in i915_oa_stream_destroy()
1693 if (perf->spurious_report_rs.missed) { in i915_oa_stream_destroy()
1694 drm_notice(>->i915->drm, in i915_oa_stream_destroy()
1696 perf->spurious_report_rs.missed); in i915_oa_stream_destroy()
1702 struct intel_uncore *uncore = stream->uncore; in gen7_init_oa_buffer()
1703 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_init_oa_buffer()
1706 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen7_init_oa_buffer()
1708 /* Pre-DevBDW: OABUFFER must be set with counters off, in gen7_init_oa_buffer()
1713 stream->oa_buffer.head = gtt_offset; in gen7_init_oa_buffer()
1721 stream->oa_buffer.tail = gtt_offset; in gen7_init_oa_buffer()
1723 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen7_init_oa_buffer()
1729 stream->perf->gen7_latched_oastatus1 = 0; in gen7_init_oa_buffer()
1733 * first allocating), we may re-init the OA buffer, either in gen7_init_oa_buffer()
1734 * when re-enabling a stream or in error/reset paths. in gen7_init_oa_buffer()
1736 * The reason we clear the buffer for each re-init is for the in gen7_init_oa_buffer()
1738 * report-id field to make sure it's non-zero which relies on in gen7_init_oa_buffer()
1742 memset(stream->oa_buffer.vaddr, 0, OA_BUFFER_SIZE); in gen7_init_oa_buffer()
1747 struct intel_uncore *uncore = stream->uncore; in gen8_init_oa_buffer()
1748 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen8_init_oa_buffer()
1751 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen8_init_oa_buffer()
1755 stream->oa_buffer.head = gtt_offset; in gen8_init_oa_buffer()
1772 stream->oa_buffer.tail = gtt_offset; in gen8_init_oa_buffer()
1779 stream->oa_buffer.last_ctx_id = INVALID_CTX_ID; in gen8_init_oa_buffer()
1781 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen8_init_oa_buffer()
1786 * first allocating), we may re-init the OA buffer, either in gen8_init_oa_buffer()
1787 * when re-enabling a stream or in error/reset paths. in gen8_init_oa_buffer()
1789 * The reason we clear the buffer for each re-init is for the in gen8_init_oa_buffer()
1791 * reason field to make sure it's non-zero which relies on in gen8_init_oa_buffer()
1795 memset(stream->oa_buffer.vaddr, 0, OA_BUFFER_SIZE); in gen8_init_oa_buffer()
1800 struct intel_uncore *uncore = stream->uncore; in gen12_init_oa_buffer()
1801 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen12_init_oa_buffer()
1804 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen12_init_oa_buffer()
1806 intel_uncore_write(uncore, __oa_regs(stream)->oa_status, 0); in gen12_init_oa_buffer()
1807 intel_uncore_write(uncore, __oa_regs(stream)->oa_head_ptr, in gen12_init_oa_buffer()
1809 stream->oa_buffer.head = gtt_offset; in gen12_init_oa_buffer()
1819 intel_uncore_write(uncore, __oa_regs(stream)->oa_buffer, gtt_offset | in gen12_init_oa_buffer()
1821 intel_uncore_write(uncore, __oa_regs(stream)->oa_tail_ptr, in gen12_init_oa_buffer()
1825 stream->oa_buffer.tail = gtt_offset; in gen12_init_oa_buffer()
1832 stream->oa_buffer.last_ctx_id = INVALID_CTX_ID; in gen12_init_oa_buffer()
1834 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen12_init_oa_buffer()
1839 * first allocating), we may re-init the OA buffer, either in gen12_init_oa_buffer()
1840 * when re-enabling a stream or in error/reset paths. in gen12_init_oa_buffer()
1842 * The reason we clear the buffer for each re-init is for the in gen12_init_oa_buffer()
1844 * reason field to make sure it's non-zero which relies on in gen12_init_oa_buffer()
1848 memset(stream->oa_buffer.vaddr, 0, in gen12_init_oa_buffer()
1849 stream->oa_buffer.vma->size); in gen12_init_oa_buffer()
1854 struct drm_i915_private *i915 = stream->perf->i915; in alloc_oa_buffer()
1855 struct intel_gt *gt = stream->engine->gt; in alloc_oa_buffer()
1860 if (drm_WARN_ON(&i915->drm, stream->oa_buffer.vma)) in alloc_oa_buffer()
1861 return -ENODEV; in alloc_oa_buffer()
1866 bo = i915_gem_object_create_shmem(stream->perf->i915, OA_BUFFER_SIZE); in alloc_oa_buffer()
1868 drm_err(&i915->drm, "Failed to allocate OA buffer\n"); in alloc_oa_buffer()
1875 vma = i915_vma_instance(bo, >->ggtt->vm, NULL); in alloc_oa_buffer()
1887 drm_err(>->i915->drm, "Failed to pin OA buffer %d\n", ret); in alloc_oa_buffer()
1891 stream->oa_buffer.vma = vma; in alloc_oa_buffer()
1893 stream->oa_buffer.vaddr = in alloc_oa_buffer()
1895 if (IS_ERR(stream->oa_buffer.vaddr)) { in alloc_oa_buffer()
1896 ret = PTR_ERR(stream->oa_buffer.vaddr); in alloc_oa_buffer()
1908 stream->oa_buffer.vaddr = NULL; in alloc_oa_buffer()
1909 stream->oa_buffer.vma = NULL; in alloc_oa_buffer()
1923 if (GRAPHICS_VER(stream->perf->i915) >= 8) in save_restore_register()
1929 *cs++ = i915_ggtt_offset(stream->noa_wait) + offset + 4 * d; in save_restore_register()
1938 struct drm_i915_private *i915 = stream->perf->i915; in alloc_noa_wait()
1939 struct intel_gt *gt = stream->engine->gt; in alloc_noa_wait()
1942 const u64 delay_ticks = 0xffffffffffffffff - in alloc_noa_wait()
1943 intel_gt_ns_to_clock_interval(to_gt(stream->perf->i915), in alloc_noa_wait()
1944 atomic64_read(&stream->perf->noa_programming_delay)); in alloc_noa_wait()
1945 const u32 base = stream->engine->mmio_base; in alloc_noa_wait()
1963 * gt->scratch was being used to save/restore the GPR registers, but on in alloc_noa_wait()
1970 drm_err(&i915->drm, in alloc_noa_wait()
1986 vma = i915_vma_instance(bo, >->ggtt->vm, NULL); in alloc_noa_wait()
2002 stream->noa_wait = vma; in alloc_noa_wait()
2027 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2045 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2065 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2077 *cs++ = i915_ggtt_offset(vma) + (ts0 - batch) * 4; in alloc_noa_wait()
2085 * (((1 * << 64) - 1) - delay_ns) in alloc_noa_wait()
2108 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2120 *cs++ = i915_ggtt_offset(vma) + (jump - batch) * 4; in alloc_noa_wait()
2138 GEM_BUG_ON(cs - batch > PAGE_SIZE / sizeof(*batch)); in alloc_noa_wait()
2148 if (ret == -EDEADLK) { in alloc_noa_wait()
2168 n_regs - i, in write_cs_mi_lri()
2205 return ERR_PTR(-ENOMEM); in alloc_oa_config_buffer()
2207 config_length += num_lri_dwords(oa_config->mux_regs_len); in alloc_oa_config_buffer()
2208 config_length += num_lri_dwords(oa_config->b_counter_regs_len); in alloc_oa_config_buffer()
2209 config_length += num_lri_dwords(oa_config->flex_regs_len); in alloc_oa_config_buffer()
2213 obj = i915_gem_object_create_shmem(stream->perf->i915, config_length); in alloc_oa_config_buffer()
2232 oa_config->mux_regs, in alloc_oa_config_buffer()
2233 oa_config->mux_regs_len); in alloc_oa_config_buffer()
2235 oa_config->b_counter_regs, in alloc_oa_config_buffer()
2236 oa_config->b_counter_regs_len); in alloc_oa_config_buffer()
2238 oa_config->flex_regs, in alloc_oa_config_buffer()
2239 oa_config->flex_regs_len); in alloc_oa_config_buffer()
2242 *cs++ = (GRAPHICS_VER(stream->perf->i915) < 8 ? in alloc_oa_config_buffer()
2245 *cs++ = i915_ggtt_offset(stream->noa_wait); in alloc_oa_config_buffer()
2251 oa_bo->vma = i915_vma_instance(obj, in alloc_oa_config_buffer()
2252 &stream->engine->gt->ggtt->vm, in alloc_oa_config_buffer()
2254 if (IS_ERR(oa_bo->vma)) { in alloc_oa_config_buffer()
2255 err = PTR_ERR(oa_bo->vma); in alloc_oa_config_buffer()
2259 oa_bo->oa_config = i915_oa_config_get(oa_config); in alloc_oa_config_buffer()
2260 llist_add(&oa_bo->node, &stream->oa_config_bos); in alloc_oa_config_buffer()
2263 if (err == -EDEADLK) { in alloc_oa_config_buffer()
2289 llist_for_each_entry(oa_bo, stream->oa_config_bos.first, node) { in get_oa_vma()
2290 if (oa_bo->oa_config == oa_config && in get_oa_vma()
2291 memcmp(oa_bo->oa_config->uuid, in get_oa_vma()
2292 oa_config->uuid, in get_oa_vma()
2293 sizeof(oa_config->uuid)) == 0) in get_oa_vma()
2302 return i915_vma_get(oa_bo->vma); in get_oa_vma()
2322 err = i915_gem_object_lock(vma->obj, &ww); in emit_oa_config()
2330 intel_engine_pm_get(ce->engine); in emit_oa_config()
2332 intel_engine_pm_put(ce->engine); in emit_oa_config()
2354 err = rq->engine->emit_bb_start(rq, in emit_oa_config()
2365 if (err == -EDEADLK) { in emit_oa_config()
2378 return stream->pinned_ctx ?: stream->engine->kernel_context; in oa_context()
2385 struct intel_uncore *uncore = stream->uncore; in hsw_enable_metric_set()
2392 * unable to count the events from non-render clock domain. in hsw_enable_metric_set()
2394 * count the events from non-render domain. Unit level clock in hsw_enable_metric_set()
2403 stream->oa_config, oa_context(stream), in hsw_enable_metric_set()
2409 struct intel_uncore *uncore = stream->uncore; in hsw_disable_metric_set()
2433 for (i = 0; i < oa_config->flex_regs_len; i++) { in oa_config_flex_reg()
2434 if (i915_mmio_reg_offset(oa_config->flex_regs[i].addr) == mmio) in oa_config_flex_reg()
2435 return oa_config->flex_regs[i].value; in oa_config_flex_reg()
2444 * It's fine to put out-of-date values into these per-context registers
2451 u32 ctx_oactxctrl = stream->perf->ctx_oactxctrl_offset; in gen8_update_reg_state_unlocked()
2452 u32 ctx_flexeu0 = stream->perf->ctx_flexeu0_offset; in gen8_update_reg_state_unlocked()
2463 u32 *reg_state = ce->lrc_reg_state; in gen8_update_reg_state_unlocked()
2467 (stream->period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) | in gen8_update_reg_state_unlocked()
2468 (stream->periodic ? GEN8_OA_TIMER_ENABLE : 0) | in gen8_update_reg_state_unlocked()
2473 oa_config_flex_reg(stream->oa_config, flex_regs[i]); in gen8_update_reg_state_unlocked()
2494 offset = i915_ggtt_offset(ce->state) + LRC_STATE_OFFSET; in gen8_store_flex()
2497 *cs++ = offset + flex->offset * sizeof(u32); in gen8_store_flex()
2499 *cs++ = flex->value; in gen8_store_flex()
2500 } while (flex++, --count); in gen8_store_flex()
2522 *cs++ = i915_mmio_reg_offset(flex->reg); in gen8_load_flex()
2523 *cs++ = flex->value; in gen8_load_flex()
2524 } while (flex++, --count); in gen8_load_flex()
2538 rq = intel_engine_create_kernel_request(ce->engine); in gen8_modify_context()
2559 intel_engine_pm_get(ce->engine); in gen8_modify_self()
2561 intel_engine_pm_put(ce->engine); in gen8_modify_self()
2589 GEM_BUG_ON(ce == ce->engine->kernel_context); in gen8_configure_context()
2591 if (ce->engine->class != RENDER_CLASS) in gen8_configure_context()
2598 flex->value = intel_sseu_make_rpcs(ce->engine->gt, &ce->sseu); in gen8_configure_context()
2614 struct intel_context *ce = stream->pinned_ctx; in gen12_configure_oar_context()
2615 u32 format = stream->oa_buffer.format->format; in gen12_configure_oar_context()
2616 u32 offset = stream->perf->ctx_oactxctrl_offset; in gen12_configure_oar_context()
2636 RING_CONTEXT_CONTROL(ce->engine->mmio_base), in gen12_configure_oar_context()
2661 * Manages updating the per-context aspects of the OA stream
2671 * won't automatically reload an out-of-date timer exponent even
2675 * - Ensure the currently running context's per-context OA state is
2677 * - Ensure that all existing contexts will have the correct per-context
2679 * - Ensure any new contexts will be initialized with the correct
2680 * per-context OA state.
2691 struct drm_i915_private *i915 = stream->perf->i915; in oa_configure_all_contexts()
2693 struct intel_gt *gt = stream->engine->gt; in oa_configure_all_contexts()
2697 lockdep_assert_held(>->perf.lock); in oa_configure_all_contexts()
2702 * lite-restore). This means we can't safely update a context's image, in oa_configure_all_contexts()
2715 spin_lock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2716 list_for_each_entry_safe(ctx, cn, &i915->gem.contexts.list, link) { in oa_configure_all_contexts()
2717 if (!kref_get_unless_zero(&ctx->ref)) in oa_configure_all_contexts()
2720 spin_unlock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2728 spin_lock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2732 spin_unlock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2740 struct intel_context *ce = engine->kernel_context; in oa_configure_all_contexts()
2742 if (engine->class != RENDER_CLASS) in oa_configure_all_contexts()
2745 regs[0].value = intel_sseu_make_rpcs(engine->gt, &ce->sseu); in oa_configure_all_contexts()
2767 if (stream->engine->class != RENDER_CLASS) in gen12_configure_all_contexts()
2780 u32 ctx_oactxctrl = stream->perf->ctx_oactxctrl_offset; in lrc_configure_all_contexts()
2782 const u32 ctx_flexeu0 = stream->perf->ctx_flexeu0_offset; in lrc_configure_all_contexts()
2805 (stream->period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) | in lrc_configure_all_contexts()
2806 (stream->periodic ? GEN8_OA_TIMER_ENABLE : 0) | in lrc_configure_all_contexts()
2821 struct intel_uncore *uncore = stream->uncore; in gen8_enable_metric_set()
2822 struct i915_oa_config *oa_config = stream->oa_config; in gen8_enable_metric_set()
2837 * Currently none of the high-level metrics we have depend on knowing in gen8_enable_metric_set()
2848 if (IS_GRAPHICS_VER(stream->perf->i915, 9, 11)) { in gen8_enable_metric_set()
2864 stream->oa_config, oa_context(stream), in gen8_enable_metric_set()
2871 (stream->sample_flags & SAMPLE_OA_REPORT) ? in oag_report_ctx_switches()
2879 struct drm_i915_private *i915 = stream->perf->i915; in gen12_enable_metric_set()
2880 struct intel_uncore *uncore = stream->uncore; in gen12_enable_metric_set()
2881 struct i915_oa_config *oa_config = stream->oa_config; in gen12_enable_metric_set()
2882 bool periodic = stream->periodic; in gen12_enable_metric_set()
2883 u32 period_exponent = stream->period_exponent; in gen12_enable_metric_set()
2893 intel_gt_mcr_multicast_write(uncore->gt, GEN8_ROW_CHICKEN, in gen12_enable_metric_set()
2899 intel_uncore_write(uncore, __oa_regs(stream)->oa_debug, in gen12_enable_metric_set()
2909 intel_uncore_write(uncore, __oa_regs(stream)->oa_ctx_ctrl, periodic ? in gen12_enable_metric_set()
2939 if (stream->ctx) { in gen12_enable_metric_set()
2946 stream->oa_config, oa_context(stream), in gen12_enable_metric_set()
2952 struct intel_uncore *uncore = stream->uncore; in gen8_disable_metric_set()
2962 struct intel_uncore *uncore = stream->uncore; in gen11_disable_metric_set()
2973 struct intel_uncore *uncore = stream->uncore; in gen12_disable_metric_set()
2974 struct drm_i915_private *i915 = stream->perf->i915; in gen12_disable_metric_set()
2982 intel_gt_mcr_multicast_write(uncore->gt, GEN8_ROW_CHICKEN, in gen12_disable_metric_set()
2992 if (stream->ctx) in gen12_disable_metric_set()
3007 struct intel_uncore *uncore = stream->uncore; in gen7_oa_enable()
3008 struct i915_gem_context *ctx = stream->ctx; in gen7_oa_enable()
3009 u32 ctx_id = stream->specific_ctx_id; in gen7_oa_enable()
3010 bool periodic = stream->periodic; in gen7_oa_enable()
3011 u32 period_exponent = stream->period_exponent; in gen7_oa_enable()
3012 u32 report_format = stream->oa_buffer.format->format; in gen7_oa_enable()
3037 struct intel_uncore *uncore = stream->uncore; in gen8_oa_enable()
3038 u32 report_format = stream->oa_buffer.format->format; in gen8_oa_enable()
3053 * filtering and instead filter on the cpu based on the context-id in gen8_oa_enable()
3070 if (!(stream->sample_flags & SAMPLE_OA_REPORT)) in gen12_oa_enable()
3076 val = (stream->oa_buffer.format->format << regs->oa_ctrl_counter_format_shift) | in gen12_oa_enable()
3079 intel_uncore_write(stream->uncore, regs->oa_ctrl, val); in gen12_oa_enable()
3083 * i915_oa_stream_enable - handle `I915_PERF_IOCTL_ENABLE` for OA stream
3093 stream->pollin = false; in i915_oa_stream_enable()
3095 stream->perf->ops.oa_enable(stream); in i915_oa_stream_enable()
3097 if (stream->sample_flags & SAMPLE_OA_REPORT) in i915_oa_stream_enable()
3098 hrtimer_start(&stream->poll_check_timer, in i915_oa_stream_enable()
3099 ns_to_ktime(stream->poll_oa_period), in i915_oa_stream_enable()
3105 struct intel_uncore *uncore = stream->uncore; in gen7_oa_disable()
3111 drm_err(&stream->perf->i915->drm, in gen7_oa_disable()
3117 struct intel_uncore *uncore = stream->uncore; in gen8_oa_disable()
3123 drm_err(&stream->perf->i915->drm, in gen8_oa_disable()
3129 struct intel_uncore *uncore = stream->uncore; in gen12_oa_disable()
3131 intel_uncore_write(uncore, __oa_regs(stream)->oa_ctrl, 0); in gen12_oa_disable()
3133 __oa_regs(stream)->oa_ctrl, in gen12_oa_disable()
3136 drm_err(&stream->perf->i915->drm, in gen12_oa_disable()
3144 drm_err(&stream->perf->i915->drm, in gen12_oa_disable()
3149 * i915_oa_stream_disable - handle `I915_PERF_IOCTL_DISABLE` for OA stream
3158 stream->perf->ops.oa_disable(stream); in i915_oa_stream_disable()
3160 if (stream->sample_flags & SAMPLE_OA_REPORT) in i915_oa_stream_disable()
3161 hrtimer_cancel(&stream->poll_check_timer); in i915_oa_stream_disable()
3180 return -ENOMEM; in i915_perf_stream_enable_sync()
3182 err = stream->perf->ops.enable_metric_set(stream, active); in i915_perf_stream_enable_sync()
3194 const struct sseu_dev_info *devinfo_sseu = &engine->gt->info.sseu; in get_default_sseu_config()
3198 if (GRAPHICS_VER(engine->i915) == 11) { in get_default_sseu_config()
3201 * we select - just turn off low bits in the amount of half of in get_default_sseu_config()
3204 out_sseu->subslice_mask = in get_default_sseu_config()
3205 ~(~0 << (hweight8(out_sseu->subslice_mask) / 2)); in get_default_sseu_config()
3206 out_sseu->slice_mask = 0x1; in get_default_sseu_config()
3215 if (drm_sseu->engine.engine_class != engine->uabi_class || in get_sseu_config()
3216 drm_sseu->engine.engine_instance != engine->uabi_instance) in get_sseu_config()
3217 return -EINVAL; in get_sseu_config()
3219 return i915_gem_user_to_context_sseu(engine->gt, drm_sseu, out_sseu); in get_sseu_config()
3237 with_intel_runtime_pm(to_gt(i915)->uncore->rpm, wakeref) in i915_perf_oa_timestamp_frequency()
3238 reg = intel_uncore_read(to_gt(i915)->uncore, RPM_CONFIG0); in i915_perf_oa_timestamp_frequency()
3243 return to_gt(i915)->clock_frequency << (3 - shift); in i915_perf_oa_timestamp_frequency()
3246 return to_gt(i915)->clock_frequency; in i915_perf_oa_timestamp_frequency()
3250 * i915_oa_stream_init - validate combined props for OA stream and init
3271 struct drm_i915_private *i915 = stream->perf->i915; in i915_oa_stream_init()
3272 struct i915_perf *perf = stream->perf; in i915_oa_stream_init()
3277 if (!props->engine) { in i915_oa_stream_init()
3278 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3280 return -EINVAL; in i915_oa_stream_init()
3282 gt = props->engine->gt; in i915_oa_stream_init()
3283 g = props->engine->oa_group; in i915_oa_stream_init()
3290 if (!perf->metrics_kobj) { in i915_oa_stream_init()
3291 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3293 return -EINVAL; in i915_oa_stream_init()
3296 if (!(props->sample_flags & SAMPLE_OA_REPORT) && in i915_oa_stream_init()
3297 (GRAPHICS_VER(perf->i915) < 12 || !stream->ctx)) { in i915_oa_stream_init()
3298 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3300 return -EINVAL; in i915_oa_stream_init()
3303 if (!perf->ops.enable_metric_set) { in i915_oa_stream_init()
3304 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3306 return -ENODEV; in i915_oa_stream_init()
3314 if (g->exclusive_stream) { in i915_oa_stream_init()
3315 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3317 return -EBUSY; in i915_oa_stream_init()
3320 if (!props->oa_format) { in i915_oa_stream_init()
3321 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3323 return -EINVAL; in i915_oa_stream_init()
3326 stream->engine = props->engine; in i915_oa_stream_init()
3327 stream->uncore = stream->engine->gt->uncore; in i915_oa_stream_init()
3329 stream->sample_size = sizeof(struct drm_i915_perf_record_header); in i915_oa_stream_init()
3331 stream->oa_buffer.format = &perf->oa_formats[props->oa_format]; in i915_oa_stream_init()
3332 if (drm_WARN_ON(&i915->drm, stream->oa_buffer.format->size == 0)) in i915_oa_stream_init()
3333 return -EINVAL; in i915_oa_stream_init()
3335 stream->sample_flags = props->sample_flags; in i915_oa_stream_init()
3336 stream->sample_size += stream->oa_buffer.format->size; in i915_oa_stream_init()
3338 stream->hold_preemption = props->hold_preemption; in i915_oa_stream_init()
3340 stream->periodic = props->oa_periodic; in i915_oa_stream_init()
3341 if (stream->periodic) in i915_oa_stream_init()
3342 stream->period_exponent = props->oa_period_exponent; in i915_oa_stream_init()
3344 if (stream->ctx) { in i915_oa_stream_init()
3347 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3355 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3360 stream->oa_config = i915_perf_get_oa_config(perf, props->metrics_set); in i915_oa_stream_init()
3361 if (!stream->oa_config) { in i915_oa_stream_init()
3362 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3363 "Invalid OA config id=%i\n", props->metrics_set); in i915_oa_stream_init()
3364 ret = -EINVAL; in i915_oa_stream_init()
3368 /* PRM - observability performance counters: in i915_oa_stream_init()
3380 intel_engine_pm_get(stream->engine); in i915_oa_stream_init()
3381 intel_uncore_forcewake_get(stream->uncore, FORCEWAKE_ALL); in i915_oa_stream_init()
3388 if (intel_uc_uses_guc_rc(>->uc) && in i915_oa_stream_init()
3389 (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) || in i915_oa_stream_init()
3390 IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))) { in i915_oa_stream_init()
3391 ret = intel_guc_slpc_override_gucrc_mode(>->uc.guc.slpc, in i915_oa_stream_init()
3394 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3399 stream->override_gucrc = true; in i915_oa_stream_init()
3406 stream->ops = &i915_oa_stream_ops; in i915_oa_stream_init()
3408 stream->engine->gt->perf.sseu = props->sseu; in i915_oa_stream_init()
3409 WRITE_ONCE(g->exclusive_stream, stream); in i915_oa_stream_init()
3413 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3418 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3420 stream->oa_config->uuid); in i915_oa_stream_init()
3422 hrtimer_init(&stream->poll_check_timer, in i915_oa_stream_init()
3424 stream->poll_check_timer.function = oa_poll_check_timer_cb; in i915_oa_stream_init()
3425 init_waitqueue_head(&stream->poll_wq); in i915_oa_stream_init()
3426 spin_lock_init(&stream->oa_buffer.ptr_lock); in i915_oa_stream_init()
3427 mutex_init(&stream->lock); in i915_oa_stream_init()
3432 WRITE_ONCE(g->exclusive_stream, NULL); in i915_oa_stream_init()
3433 perf->ops.disable_metric_set(stream); in i915_oa_stream_init()
3438 if (stream->override_gucrc) in i915_oa_stream_init()
3439 intel_guc_slpc_unset_gucrc_mode(>->uc.guc.slpc); in i915_oa_stream_init()
3442 intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL); in i915_oa_stream_init()
3443 intel_engine_pm_put(stream->engine); in i915_oa_stream_init()
3451 if (stream->ctx) in i915_oa_stream_init()
3462 if (engine->class != RENDER_CLASS) in i915_oa_init_reg_state()
3466 stream = READ_ONCE(engine->oa_group->exclusive_stream); in i915_oa_init_reg_state()
3467 if (stream && GRAPHICS_VER(stream->perf->i915) < 12) in i915_oa_init_reg_state()
3472 * i915_perf_read - handles read() FOP for i915 perf stream FDs
3480 * &i915_perf_stream_ops->read but to save having stream implementations (of
3494 struct i915_perf_stream *stream = file->private_data; in i915_perf_read()
3502 if (!stream->enabled || !(stream->sample_flags & SAMPLE_OA_REPORT)) in i915_perf_read()
3503 return -EIO; in i915_perf_read()
3505 if (!(file->f_flags & O_NONBLOCK)) { in i915_perf_read()
3507 * stream->ops->wait_unlocked. in i915_perf_read()
3514 ret = stream->ops->wait_unlocked(stream); in i915_perf_read()
3518 mutex_lock(&stream->lock); in i915_perf_read()
3519 ret = stream->ops->read(stream, buf, count, &offset); in i915_perf_read()
3520 mutex_unlock(&stream->lock); in i915_perf_read()
3523 mutex_lock(&stream->lock); in i915_perf_read()
3524 ret = stream->ops->read(stream, buf, count, &offset); in i915_perf_read()
3525 mutex_unlock(&stream->lock); in i915_perf_read()
3532 * and read() returning -EAGAIN. Clearing the oa.pollin state here in i915_perf_read()
3535 * The exception to this is if ops->read() returned -ENOSPC which means in i915_perf_read()
3539 if (ret != -ENOSPC) in i915_perf_read()
3540 stream->pollin = false; in i915_perf_read()
3542 /* Possible values for ret are 0, -EFAULT, -ENOSPC, -EIO, ... */ in i915_perf_read()
3543 return offset ?: (ret ?: -EAGAIN); in i915_perf_read()
3552 stream->pollin = true; in oa_poll_check_timer_cb()
3553 wake_up(&stream->poll_wq); in oa_poll_check_timer_cb()
3557 ns_to_ktime(stream->poll_oa_period)); in oa_poll_check_timer_cb()
3563 * i915_perf_poll_locked - poll_wait() with a suitable wait queue for stream
3569 * &i915_perf_stream_ops->poll_wait to call poll_wait() with a wait queue that
3580 stream->ops->poll_wait(stream, file, wait); in i915_perf_poll_locked()
3588 if (stream->pollin) in i915_perf_poll_locked()
3595 * i915_perf_poll - call poll_wait() with a suitable wait queue for stream
3609 struct i915_perf_stream *stream = file->private_data; in i915_perf_poll()
3612 mutex_lock(&stream->lock); in i915_perf_poll()
3614 mutex_unlock(&stream->lock); in i915_perf_poll()
3620 * i915_perf_enable_locked - handle `I915_PERF_IOCTL_ENABLE` ioctl
3631 if (stream->enabled) in i915_perf_enable_locked()
3634 /* Allow stream->ops->enable() to refer to this */ in i915_perf_enable_locked()
3635 stream->enabled = true; in i915_perf_enable_locked()
3637 if (stream->ops->enable) in i915_perf_enable_locked()
3638 stream->ops->enable(stream); in i915_perf_enable_locked()
3640 if (stream->hold_preemption) in i915_perf_enable_locked()
3641 intel_context_set_nopreempt(stream->pinned_ctx); in i915_perf_enable_locked()
3645 * i915_perf_disable_locked - handle `I915_PERF_IOCTL_DISABLE` ioctl
3650 * The intention is that disabling an re-enabling a stream will ideally be
3651 * cheaper than destroying and re-opening a stream with the same configuration,
3653 * must be retained between disabling and re-enabling a stream.
3656 * to attempt to read from the stream (-EIO).
3660 if (!stream->enabled) in i915_perf_disable_locked()
3663 /* Allow stream->ops->disable() to refer to this */ in i915_perf_disable_locked()
3664 stream->enabled = false; in i915_perf_disable_locked()
3666 if (stream->hold_preemption) in i915_perf_disable_locked()
3667 intel_context_clear_nopreempt(stream->pinned_ctx); in i915_perf_disable_locked()
3669 if (stream->ops->disable) in i915_perf_disable_locked()
3670 stream->ops->disable(stream); in i915_perf_disable_locked()
3677 long ret = stream->oa_config->id; in i915_perf_config_locked()
3679 config = i915_perf_get_oa_config(stream->perf, metrics_set); in i915_perf_config_locked()
3681 return -EINVAL; in i915_perf_config_locked()
3683 if (config != stream->oa_config) { in i915_perf_config_locked()
3697 config = xchg(&stream->oa_config, config); in i915_perf_config_locked()
3708 * i915_perf_ioctl_locked - support ioctl() usage with i915 perf stream FDs
3713 * Returns: zero on success or a negative error code. Returns -EINVAL for
3731 return -EINVAL; in i915_perf_ioctl_locked()
3735 * i915_perf_ioctl - support ioctl() usage with i915 perf stream FDs
3742 * Returns: zero on success or a negative error code. Returns -EINVAL for
3749 struct i915_perf_stream *stream = file->private_data; in i915_perf_ioctl()
3752 mutex_lock(&stream->lock); in i915_perf_ioctl()
3754 mutex_unlock(&stream->lock); in i915_perf_ioctl()
3760 * i915_perf_destroy_locked - destroy an i915 perf stream
3766 * Note: The >->perf.lock mutex has been taken to serialize
3767 * with any non-file-operation driver hooks.
3771 if (stream->enabled) in i915_perf_destroy_locked()
3774 if (stream->ops->destroy) in i915_perf_destroy_locked()
3775 stream->ops->destroy(stream); in i915_perf_destroy_locked()
3777 if (stream->ctx) in i915_perf_destroy_locked()
3778 i915_gem_context_put(stream->ctx); in i915_perf_destroy_locked()
3784 * i915_perf_release - handles userspace close() of a stream file
3796 struct i915_perf_stream *stream = file->private_data; in i915_perf_release()
3797 struct i915_perf *perf = stream->perf; in i915_perf_release()
3798 struct intel_gt *gt = stream->engine->gt; in i915_perf_release()
3802 * other user of stream->lock. Use the perf lock to destroy the stream in i915_perf_release()
3805 mutex_lock(>->perf.lock); in i915_perf_release()
3807 mutex_unlock(>->perf.lock); in i915_perf_release()
3810 drm_dev_put(&perf->i915->drm); in i915_perf_release()
3831 * i915_perf_open_ioctl_locked - DRM ioctl() for userspace to open a stream FD
3840 * behalf of i915_perf_open_ioctl() with the >->perf.lock mutex
3841 * taken to serialize with any non-file-operation driver hooks.
3867 if (props->single_context) { in i915_perf_open_ioctl_locked()
3868 u32 ctx_handle = props->ctx_handle; in i915_perf_open_ioctl_locked()
3869 struct drm_i915_file_private *file_priv = file->driver_priv; in i915_perf_open_ioctl_locked()
3873 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl_locked()
3885 * non-privileged client. in i915_perf_open_ioctl_locked()
3887 * For Gen8->11 the OA unit no longer supports clock gating off for a in i915_perf_open_ioctl_locked()
3889 * from updating as system-wide / global values. Even though we can in i915_perf_open_ioctl_locked()
3900 if (IS_HASWELL(perf->i915) && specific_ctx) in i915_perf_open_ioctl_locked()
3902 else if (GRAPHICS_VER(perf->i915) == 12 && specific_ctx && in i915_perf_open_ioctl_locked()
3903 (props->sample_flags & SAMPLE_OA_REPORT) == 0) in i915_perf_open_ioctl_locked()
3906 if (props->hold_preemption) { in i915_perf_open_ioctl_locked()
3907 if (!props->single_context) { in i915_perf_open_ioctl_locked()
3908 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl_locked()
3910 ret = -EINVAL; in i915_perf_open_ioctl_locked()
3919 if (props->has_sseu) in i915_perf_open_ioctl_locked()
3922 get_default_sseu_config(&props->sseu, props->engine); in i915_perf_open_ioctl_locked()
3931 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl_locked()
3933 ret = -EACCES; in i915_perf_open_ioctl_locked()
3939 ret = -ENOMEM; in i915_perf_open_ioctl_locked()
3943 stream->perf = perf; in i915_perf_open_ioctl_locked()
3944 stream->ctx = specific_ctx; in i915_perf_open_ioctl_locked()
3945 stream->poll_oa_period = props->poll_oa_period; in i915_perf_open_ioctl_locked()
3951 /* we avoid simply assigning stream->sample_flags = props->sample_flags in i915_perf_open_ioctl_locked()
3955 if (WARN_ON(stream->sample_flags != props->sample_flags)) { in i915_perf_open_ioctl_locked()
3956 ret = -ENODEV; in i915_perf_open_ioctl_locked()
3960 if (param->flags & I915_PERF_FLAG_FD_CLOEXEC) in i915_perf_open_ioctl_locked()
3962 if (param->flags & I915_PERF_FLAG_FD_NONBLOCK) in i915_perf_open_ioctl_locked()
3971 if (!(param->flags & I915_PERF_FLAG_DISABLED)) in i915_perf_open_ioctl_locked()
3977 drm_dev_get(&perf->i915->drm); in i915_perf_open_ioctl_locked()
3982 if (stream->ops->destroy) in i915_perf_open_ioctl_locked()
3983 stream->ops->destroy(stream); in i915_perf_open_ioctl_locked()
3996 u32 den = i915_perf_oa_timestamp_frequency(perf->i915); in oa_exponent_to_ns()
3998 return div_u64(nom + den - 1, den); in oa_exponent_to_ns()
4004 return test_bit(format, perf->format_mask); in oa_format_valid()
4010 __set_bit(format, perf->format_mask); in oa_format_add()
4014 * read_properties_unlocked - validate + copy userspace stream open properties
4044 props->poll_oa_period = DEFAULT_POLL_PERIOD_NS; in read_properties_unlocked()
4053 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4055 return -EINVAL; in read_properties_unlocked()
4075 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4077 return -EINVAL; in read_properties_unlocked()
4082 props->single_context = 1; in read_properties_unlocked()
4083 props->ctx_handle = value; in read_properties_unlocked()
4087 props->sample_flags |= SAMPLE_OA_REPORT; in read_properties_unlocked()
4091 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4093 return -EINVAL; in read_properties_unlocked()
4095 props->metrics_set = value; in read_properties_unlocked()
4099 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4100 "Out-of-range OA report format %llu\n", in read_properties_unlocked()
4102 return -EINVAL; in read_properties_unlocked()
4105 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4108 return -EINVAL; in read_properties_unlocked()
4110 props->oa_format = value; in read_properties_unlocked()
4114 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4117 return -EINVAL; in read_properties_unlocked()
4143 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4146 return -EACCES; in read_properties_unlocked()
4149 props->oa_periodic = true; in read_properties_unlocked()
4150 props->oa_period_exponent = value; in read_properties_unlocked()
4153 props->hold_preemption = !!value; in read_properties_unlocked()
4156 if (GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 50)) { in read_properties_unlocked()
4157 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4159 GRAPHICS_VER_FULL(perf->i915)); in read_properties_unlocked()
4160 return -ENODEV; in read_properties_unlocked()
4166 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4168 return -EFAULT; in read_properties_unlocked()
4175 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4178 return -EINVAL; in read_properties_unlocked()
4180 props->poll_oa_period = value; in read_properties_unlocked()
4192 return -EINVAL; in read_properties_unlocked()
4200 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4201 "OA engine-class and engine-instance parameters must be passed together\n"); in read_properties_unlocked()
4202 return -EINVAL; in read_properties_unlocked()
4205 props->engine = intel_engine_lookup_user(perf->i915, class, instance); in read_properties_unlocked()
4206 if (!props->engine) { in read_properties_unlocked()
4207 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4210 return -EINVAL; in read_properties_unlocked()
4213 if (!engine_supports_oa(props->engine)) { in read_properties_unlocked()
4214 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4217 return -EINVAL; in read_properties_unlocked()
4225 if (IS_MTL_MEDIA_STEP(props->engine->i915, STEP_A0, STEP_C0) && in read_properties_unlocked()
4226 props->engine->oa_group->type == TYPE_OAM && in read_properties_unlocked()
4227 intel_check_bios_c6_setup(&props->engine->gt->rc6)) { in read_properties_unlocked()
4228 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4230 return -EINVAL; in read_properties_unlocked()
4233 i = array_index_nospec(props->oa_format, I915_OA_FORMAT_MAX); in read_properties_unlocked()
4234 f = &perf->oa_formats[i]; in read_properties_unlocked()
4235 if (!engine_supports_oa_format(props->engine, f->type)) { in read_properties_unlocked()
4236 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4238 f->type, props->engine->class); in read_properties_unlocked()
4239 return -EINVAL; in read_properties_unlocked()
4243 ret = get_sseu_config(&props->sseu, props->engine, &user_sseu); in read_properties_unlocked()
4245 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4249 props->has_sseu = true; in read_properties_unlocked()
4256 * i915_perf_open_ioctl - DRM ioctl() for userspace to open a stream FD
4266 * i915-perf stream is expected to be a suitable interface for other forms of
4273 * i915_perf_open_ioctl_locked() after taking the >->perf.lock
4274 * mutex for serializing with any non-file-operation driver hooks.
4282 struct i915_perf *perf = &to_i915(dev)->perf; in i915_perf_open_ioctl()
4289 if (!perf->i915) { in i915_perf_open_ioctl()
4290 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl()
4292 return -ENOTSUPP; in i915_perf_open_ioctl()
4298 if (param->flags & ~known_open_flags) { in i915_perf_open_ioctl()
4299 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl()
4301 return -EINVAL; in i915_perf_open_ioctl()
4305 u64_to_user_ptr(param->properties_ptr), in i915_perf_open_ioctl()
4306 param->num_properties, in i915_perf_open_ioctl()
4311 gt = props.engine->gt; in i915_perf_open_ioctl()
4313 mutex_lock(>->perf.lock); in i915_perf_open_ioctl()
4315 mutex_unlock(>->perf.lock); in i915_perf_open_ioctl()
4321 * i915_perf_register - exposes i915-perf to userspace
4326 * used to open an i915-perf stream.
4330 struct i915_perf *perf = &i915->perf; in i915_perf_register()
4333 if (!perf->i915) in i915_perf_register()
4340 mutex_lock(>->perf.lock); in i915_perf_register()
4342 perf->metrics_kobj = in i915_perf_register()
4344 &i915->drm.primary->kdev->kobj); in i915_perf_register()
4346 mutex_unlock(>->perf.lock); in i915_perf_register()
4350 * i915_perf_unregister - hide i915-perf from userspace
4353 * i915-perf state cleanup is split up into an 'unregister' and
4360 struct i915_perf *perf = &i915->perf; in i915_perf_unregister()
4362 if (!perf->metrics_kobj) in i915_perf_unregister()
4365 kobject_put(perf->metrics_kobj); in i915_perf_unregister()
4366 perf->metrics_kobj = NULL; in i915_perf_unregister()
4391 while (table->start || table->end) { in reg_in_range_table()
4392 if (addr >= table->start && addr <= table->end) in reg_in_range_table()
4405 { .start = 0x2710, .end = 0x272c }, /* OASTARTTRIG[1-8] */
4406 { .start = 0x2740, .end = 0x275c }, /* OAREPORTTRIG[1-8] */
4407 { .start = 0x2770, .end = 0x27ac }, /* OACEC[0-7][0-1] */
4413 { .start = 0xd900, .end = 0xd91c }, /* GEN12_OAG_OASTARTTRIG[1-8] */
4414 { .start = 0xd920, .end = 0xd93c }, /* GEN12_OAG_OAREPORTTRIG1[1-8] */
4415 { .start = 0xd940, .end = 0xd97c }, /* GEN12_OAG_CEC[0-7][0-1] */
4416 { .start = 0xdc00, .end = 0xdc3c }, /* GEN12_OAG_SCEC[0-7][0-1] */
4423 { .start = 0x393000, .end = 0x39301c }, /* GEN12_OAM_STARTTRIG1[1-8] */
4424 { .start = 0x393020, .end = 0x39303c }, /* GEN12_OAM_REPORTTRIG1[1-8] */
4425 { .start = 0x393040, .end = 0x39307c }, /* GEN12_OAM_CEC[0-7][0-1] */
4426 { .start = 0x393200, .end = 0x39323C }, /* MPES[0-7] */
4432 { .start = 0xdd00, .end = 0xdd48 }, /* OAG_LCE0_0 - OAA_LENABLE_REG */
4437 { .start = 0x91b8, .end = 0x91cc }, /* OA_PERFCNT[1-2], OA_PERFMATRIX */
4438 { .start = 0x9800, .end = 0x9888 }, /* MICRO_BP0_0 - NOA_WRITE */
4444 { .start = 0x09e80, .end = 0x09ea4 }, /* HSW_MBVID2_NOA[0-9] */
4456 { .start = 0x0d00, .end = 0x0d2c }, /* RPM_CONFIG[0-1], NOA_CONFIG[0-8] */
4462 { .start = 0x91c8, .end = 0x91dc }, /* OA_PERFCNT[3-4] */
4467 { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */
4468 { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */
4480 { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */
4481 { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */
4525 if (HAS_OAM(perf->i915) && in mtl_is_valid_oam_b_counter_addr()
4526 GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 70)) in mtl_is_valid_oam_b_counter_addr()
4541 if (IS_METEORLAKE(perf->i915)) in gen12_is_valid_mux_addr()
4581 return ERR_PTR(-EINVAL); in alloc_oa_regs()
4585 return ERR_PTR(-ENOMEM); in alloc_oa_regs()
4595 drm_dbg(&perf->i915->drm, in alloc_oa_regs()
4597 err = -EINVAL; in alloc_oa_regs()
4625 return sprintf(buf, "%d\n", oa_config->id); in show_dynamic_id()
4631 sysfs_attr_init(&oa_config->sysfs_metric_id.attr); in create_dynamic_oa_sysfs_entry()
4632 oa_config->sysfs_metric_id.attr.name = "id"; in create_dynamic_oa_sysfs_entry()
4633 oa_config->sysfs_metric_id.attr.mode = S_IRUGO; in create_dynamic_oa_sysfs_entry()
4634 oa_config->sysfs_metric_id.show = show_dynamic_id; in create_dynamic_oa_sysfs_entry()
4635 oa_config->sysfs_metric_id.store = NULL; in create_dynamic_oa_sysfs_entry()
4637 oa_config->attrs[0] = &oa_config->sysfs_metric_id.attr; in create_dynamic_oa_sysfs_entry()
4638 oa_config->attrs[1] = NULL; in create_dynamic_oa_sysfs_entry()
4640 oa_config->sysfs_metric.name = oa_config->uuid; in create_dynamic_oa_sysfs_entry()
4641 oa_config->sysfs_metric.attrs = oa_config->attrs; in create_dynamic_oa_sysfs_entry()
4643 return sysfs_create_group(perf->metrics_kobj, in create_dynamic_oa_sysfs_entry()
4644 &oa_config->sysfs_metric); in create_dynamic_oa_sysfs_entry()
4648 * i915_perf_add_config_ioctl - DRM ioctl() for userspace to add a new OA config
4663 struct i915_perf *perf = &to_i915(dev)->perf; in i915_perf_add_config_ioctl()
4669 if (!perf->i915) { in i915_perf_add_config_ioctl()
4670 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4672 return -ENOTSUPP; in i915_perf_add_config_ioctl()
4675 if (!perf->metrics_kobj) { in i915_perf_add_config_ioctl()
4676 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4678 return -EINVAL; in i915_perf_add_config_ioctl()
4682 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4684 return -EACCES; in i915_perf_add_config_ioctl()
4687 if ((!args->mux_regs_ptr || !args->n_mux_regs) && in i915_perf_add_config_ioctl()
4688 (!args->boolean_regs_ptr || !args->n_boolean_regs) && in i915_perf_add_config_ioctl()
4689 (!args->flex_regs_ptr || !args->n_flex_regs)) { in i915_perf_add_config_ioctl()
4690 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4692 return -EINVAL; in i915_perf_add_config_ioctl()
4697 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4699 return -ENOMEM; in i915_perf_add_config_ioctl()
4702 oa_config->perf = perf; in i915_perf_add_config_ioctl()
4703 kref_init(&oa_config->ref); in i915_perf_add_config_ioctl()
4705 if (!uuid_is_valid(args->uuid)) { in i915_perf_add_config_ioctl()
4706 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4708 err = -EINVAL; in i915_perf_add_config_ioctl()
4712 /* Last character in oa_config->uuid will be 0 because oa_config is in i915_perf_add_config_ioctl()
4715 memcpy(oa_config->uuid, args->uuid, sizeof(args->uuid)); in i915_perf_add_config_ioctl()
4717 oa_config->mux_regs_len = args->n_mux_regs; in i915_perf_add_config_ioctl()
4719 perf->ops.is_valid_mux_reg, in i915_perf_add_config_ioctl()
4720 u64_to_user_ptr(args->mux_regs_ptr), in i915_perf_add_config_ioctl()
4721 args->n_mux_regs); in i915_perf_add_config_ioctl()
4724 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4729 oa_config->mux_regs = regs; in i915_perf_add_config_ioctl()
4731 oa_config->b_counter_regs_len = args->n_boolean_regs; in i915_perf_add_config_ioctl()
4733 perf->ops.is_valid_b_counter_reg, in i915_perf_add_config_ioctl()
4734 u64_to_user_ptr(args->boolean_regs_ptr), in i915_perf_add_config_ioctl()
4735 args->n_boolean_regs); in i915_perf_add_config_ioctl()
4738 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4743 oa_config->b_counter_regs = regs; in i915_perf_add_config_ioctl()
4745 if (GRAPHICS_VER(perf->i915) < 8) { in i915_perf_add_config_ioctl()
4746 if (args->n_flex_regs != 0) { in i915_perf_add_config_ioctl()
4747 err = -EINVAL; in i915_perf_add_config_ioctl()
4751 oa_config->flex_regs_len = args->n_flex_regs; in i915_perf_add_config_ioctl()
4753 perf->ops.is_valid_flex_reg, in i915_perf_add_config_ioctl()
4754 u64_to_user_ptr(args->flex_regs_ptr), in i915_perf_add_config_ioctl()
4755 args->n_flex_regs); in i915_perf_add_config_ioctl()
4758 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4763 oa_config->flex_regs = regs; in i915_perf_add_config_ioctl()
4766 err = mutex_lock_interruptible(&perf->metrics_lock); in i915_perf_add_config_ioctl()
4773 idr_for_each_entry(&perf->metrics_idr, tmp, id) { in i915_perf_add_config_ioctl()
4774 if (!strcmp(tmp->uuid, oa_config->uuid)) { in i915_perf_add_config_ioctl()
4775 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4777 err = -EADDRINUSE; in i915_perf_add_config_ioctl()
4784 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4790 oa_config->id = idr_alloc(&perf->metrics_idr, in i915_perf_add_config_ioctl()
4793 if (oa_config->id < 0) { in i915_perf_add_config_ioctl()
4794 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4796 err = oa_config->id; in i915_perf_add_config_ioctl()
4799 id = oa_config->id; in i915_perf_add_config_ioctl()
4801 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4802 "Added config %s id=%i\n", oa_config->uuid, oa_config->id); in i915_perf_add_config_ioctl()
4803 mutex_unlock(&perf->metrics_lock); in i915_perf_add_config_ioctl()
4808 mutex_unlock(&perf->metrics_lock); in i915_perf_add_config_ioctl()
4811 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4817 * i915_perf_remove_config_ioctl - DRM ioctl() for userspace to remove an OA config
4830 struct i915_perf *perf = &to_i915(dev)->perf; in i915_perf_remove_config_ioctl()
4835 if (!perf->i915) { in i915_perf_remove_config_ioctl()
4836 drm_dbg(&perf->i915->drm, in i915_perf_remove_config_ioctl()
4838 return -ENOTSUPP; in i915_perf_remove_config_ioctl()
4842 drm_dbg(&perf->i915->drm, in i915_perf_remove_config_ioctl()
4844 return -EACCES; in i915_perf_remove_config_ioctl()
4847 ret = mutex_lock_interruptible(&perf->metrics_lock); in i915_perf_remove_config_ioctl()
4851 oa_config = idr_find(&perf->metrics_idr, *arg); in i915_perf_remove_config_ioctl()
4853 drm_dbg(&perf->i915->drm, in i915_perf_remove_config_ioctl()
4855 ret = -ENOENT; in i915_perf_remove_config_ioctl()
4859 GEM_BUG_ON(*arg != oa_config->id); in i915_perf_remove_config_ioctl()
4861 sysfs_remove_group(perf->metrics_kobj, &oa_config->sysfs_metric); in i915_perf_remove_config_ioctl()
4863 idr_remove(&perf->metrics_idr, *arg); in i915_perf_remove_config_ioctl()
4865 mutex_unlock(&perf->metrics_lock); in i915_perf_remove_config_ioctl()
4867 drm_dbg(&perf->i915->drm, in i915_perf_remove_config_ioctl()
4868 "Removed config %s id=%i\n", oa_config->uuid, oa_config->id); in i915_perf_remove_config_ioctl()
4875 mutex_unlock(&perf->metrics_lock); in i915_perf_remove_config_ioctl()
4908 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 70)) { in __oam_engine_group()
4913 drm_WARN_ON(&engine->i915->drm, in __oam_engine_group()
4914 engine->gt->type != GT_MEDIA); in __oam_engine_group()
4924 switch (engine->class) { in __oa_engine_group()
4969 int i, num_groups = gt->perf.num_perf_groups; in oa_init_groups()
4972 struct i915_perf_group *g = >->perf.group[i]; in oa_init_groups()
4975 if (g->num_engines == 0) in oa_init_groups()
4978 if (i == PERF_GROUP_OAG && gt->type != GT_MEDIA) { in oa_init_groups()
4979 g->regs = __oag_regs(); in oa_init_groups()
4980 g->type = TYPE_OAG; in oa_init_groups()
4981 } else if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) { in oa_init_groups()
4982 g->regs = __oam_regs(mtl_oa_base[i]); in oa_init_groups()
4983 g->type = TYPE_OAM; in oa_init_groups()
4997 return -ENOMEM; in oa_init_gt()
5002 engine->oa_group = NULL; in oa_init_gt()
5005 engine->oa_group = &g[index]; in oa_init_gt()
5009 gt->perf.num_perf_groups = num_groups; in oa_init_gt()
5010 gt->perf.group = g; in oa_init_gt()
5022 for_each_gt(gt, perf->i915, i) { in oa_init_engine_groups()
5033 struct drm_i915_private *i915 = perf->i915; in oa_init_supported_formats()
5034 enum intel_platform platform = INTEL_INFO(i915)->platform; in oa_init_supported_formats()
5089 struct i915_perf *perf = &i915->perf; in i915_perf_init_info()
5093 perf->ctx_oactxctrl_offset = 0x120; in i915_perf_init_info()
5094 perf->ctx_flexeu0_offset = 0x2ce; in i915_perf_init_info()
5095 perf->gen8_valid_ctx_bit = BIT(25); in i915_perf_init_info()
5098 perf->ctx_oactxctrl_offset = 0x128; in i915_perf_init_info()
5099 perf->ctx_flexeu0_offset = 0x3de; in i915_perf_init_info()
5100 perf->gen8_valid_ctx_bit = BIT(16); in i915_perf_init_info()
5103 perf->ctx_oactxctrl_offset = 0x124; in i915_perf_init_info()
5104 perf->ctx_flexeu0_offset = 0x78e; in i915_perf_init_info()
5105 perf->gen8_valid_ctx_bit = BIT(16); in i915_perf_init_info()
5108 perf->gen8_valid_ctx_bit = BIT(16); in i915_perf_init_info()
5111 * cache the value in perf->ctx_oactxctrl_offset. in i915_perf_init_info()
5120 * i915_perf_init - initialize i915-perf state on module bind
5123 * Initializes i915-perf state without exposing anything to userspace.
5125 * Note: i915-perf initialization is split into an 'init' and 'register'
5130 struct i915_perf *perf = &i915->perf; in i915_perf_init()
5132 perf->oa_formats = oa_formats; in i915_perf_init()
5134 perf->ops.is_valid_b_counter_reg = gen7_is_valid_b_counter_addr; in i915_perf_init()
5135 perf->ops.is_valid_mux_reg = hsw_is_valid_mux_addr; in i915_perf_init()
5136 perf->ops.is_valid_flex_reg = NULL; in i915_perf_init()
5137 perf->ops.enable_metric_set = hsw_enable_metric_set; in i915_perf_init()
5138 perf->ops.disable_metric_set = hsw_disable_metric_set; in i915_perf_init()
5139 perf->ops.oa_enable = gen7_oa_enable; in i915_perf_init()
5140 perf->ops.oa_disable = gen7_oa_disable; in i915_perf_init()
5141 perf->ops.read = gen7_oa_read; in i915_perf_init()
5142 perf->ops.oa_hw_tail_read = gen7_oa_hw_tail_read; in i915_perf_init()
5150 perf->ops.read = gen8_oa_read; in i915_perf_init()
5154 perf->ops.is_valid_b_counter_reg = in i915_perf_init()
5156 perf->ops.is_valid_mux_reg = in i915_perf_init()
5158 perf->ops.is_valid_flex_reg = in i915_perf_init()
5162 perf->ops.is_valid_mux_reg = in i915_perf_init()
5166 perf->ops.oa_enable = gen8_oa_enable; in i915_perf_init()
5167 perf->ops.oa_disable = gen8_oa_disable; in i915_perf_init()
5168 perf->ops.enable_metric_set = gen8_enable_metric_set; in i915_perf_init()
5169 perf->ops.disable_metric_set = gen8_disable_metric_set; in i915_perf_init()
5170 perf->ops.oa_hw_tail_read = gen8_oa_hw_tail_read; in i915_perf_init()
5172 perf->ops.is_valid_b_counter_reg = in i915_perf_init()
5174 perf->ops.is_valid_mux_reg = in i915_perf_init()
5176 perf->ops.is_valid_flex_reg = in i915_perf_init()
5179 perf->ops.oa_enable = gen8_oa_enable; in i915_perf_init()
5180 perf->ops.oa_disable = gen8_oa_disable; in i915_perf_init()
5181 perf->ops.enable_metric_set = gen8_enable_metric_set; in i915_perf_init()
5182 perf->ops.disable_metric_set = gen11_disable_metric_set; in i915_perf_init()
5183 perf->ops.oa_hw_tail_read = gen8_oa_hw_tail_read; in i915_perf_init()
5185 perf->ops.is_valid_b_counter_reg = in i915_perf_init()
5189 perf->ops.is_valid_mux_reg = in i915_perf_init()
5191 perf->ops.is_valid_flex_reg = in i915_perf_init()
5194 perf->ops.oa_enable = gen12_oa_enable; in i915_perf_init()
5195 perf->ops.oa_disable = gen12_oa_disable; in i915_perf_init()
5196 perf->ops.enable_metric_set = gen12_enable_metric_set; in i915_perf_init()
5197 perf->ops.disable_metric_set = gen12_disable_metric_set; in i915_perf_init()
5198 perf->ops.oa_hw_tail_read = gen12_oa_hw_tail_read; in i915_perf_init()
5202 if (perf->ops.enable_metric_set) { in i915_perf_init()
5207 mutex_init(>->perf.lock); in i915_perf_init()
5210 oa_sample_rate_hard_limit = to_gt(i915)->clock_frequency / 2; in i915_perf_init()
5212 mutex_init(&perf->metrics_lock); in i915_perf_init()
5213 idr_init_base(&perf->metrics_idr, 1); in i915_perf_init()
5225 ratelimit_state_init(&perf->spurious_report_rs, 5 * HZ, 10); in i915_perf_init()
5230 ratelimit_set_flags(&perf->spurious_report_rs, in i915_perf_init()
5233 ratelimit_state_init(&perf->tail_pointer_race, in i915_perf_init()
5235 ratelimit_set_flags(&perf->tail_pointer_race, in i915_perf_init()
5238 atomic64_set(&perf->noa_programming_delay, in i915_perf_init()
5241 perf->i915 = i915; in i915_perf_init()
5245 drm_err(&i915->drm, in i915_perf_init()
5274 * i915_perf_fini - Counter part to i915_perf_init()
5279 struct i915_perf *perf = &i915->perf; in i915_perf_fini()
5283 if (!perf->i915) in i915_perf_fini()
5286 for_each_gt(gt, perf->i915, i) in i915_perf_fini()
5287 kfree(gt->perf.group); in i915_perf_fini()
5289 idr_for_each(&perf->metrics_idr, destroy_config, perf); in i915_perf_fini()
5290 idr_destroy(&perf->metrics_idr); in i915_perf_fini()
5292 memset(&perf->ops, 0, sizeof(perf->ops)); in i915_perf_fini()
5293 perf->i915 = NULL; in i915_perf_fini()
5297 * i915_perf_ioctl_version - Version of the i915-perf subsystem
5340 if (gt->type == GT_MEDIA && in i915_perf_ioctl_version()
5341 intel_check_bios_c6_setup(>->rc6)) in i915_perf_ioctl_version()