147 static u32 intel_vgpu_get_stride(struct intel_vgpu *vgpu, int pipe,  in intel_vgpu_get_stride()  argument
150 	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;  in intel_vgpu_get_stride()
152 	u32 stride_reg = vgpu_vreg_t(vgpu, DSPSTRIDE(pipe)) & stride_mask;  in intel_vgpu_get_stride()
183 static int get_active_pipe(struct intel_vgpu *vgpu)  in get_active_pipe()  argument
188 		if (pipe_is_enabled(vgpu, i))  in get_active_pipe()
203 int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu,  in intel_vgpu_decode_primary_plane()  argument
206 	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;  in intel_vgpu_decode_primary_plane()
210 	pipe = get_active_pipe(vgpu);  in intel_vgpu_decode_primary_plane()
214 	val = vgpu_vreg_t(vgpu, DSPCNTR(pipe));  in intel_vgpu_decode_primary_plane()
248 	plane->base = vgpu_vreg_t(vgpu, DSPSURF(pipe)) & I915_GTT_PAGE_MASK;  in intel_vgpu_decode_primary_plane()
249 	if (!vgpu_gmadr_is_valid(vgpu, plane->base))  in intel_vgpu_decode_primary_plane()
252 	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);  in intel_vgpu_decode_primary_plane()
259 	plane->stride = intel_vgpu_get_stride(vgpu, pipe, plane->tiled,  in intel_vgpu_decode_primary_plane()
264 	plane->width = (vgpu_vreg_t(vgpu, PIPESRC(pipe)) & _PIPE_H_SRCSZ_MASK) >>  in intel_vgpu_decode_primary_plane()
267 	plane->height = (vgpu_vreg_t(vgpu, PIPESRC(pipe)) &  in intel_vgpu_decode_primary_plane()
271 	val = vgpu_vreg_t(vgpu, DSPTILEOFF(pipe));  in intel_vgpu_decode_primary_plane()
333 int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,  in intel_vgpu_decode_cursor_plane()  argument
336 	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;  in intel_vgpu_decode_cursor_plane()
341 	pipe = get_active_pipe(vgpu);  in intel_vgpu_decode_cursor_plane()
345 	val = vgpu_vreg_t(vgpu, CURCNTR(pipe));  in intel_vgpu_decode_cursor_plane()
371 	plane->base = vgpu_vreg_t(vgpu, CURBASE(pipe)) & I915_GTT_PAGE_MASK;  in intel_vgpu_decode_cursor_plane()
372 	if (!vgpu_gmadr_is_valid(vgpu, plane->base))  in intel_vgpu_decode_cursor_plane()
375 	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);  in intel_vgpu_decode_cursor_plane()
382 	val = vgpu_vreg_t(vgpu, CURPOS(pipe));  in intel_vgpu_decode_cursor_plane()
388 	plane->x_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_x_hot));  in intel_vgpu_decode_cursor_plane()
389 	plane->y_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot));  in intel_vgpu_decode_cursor_plane()
412 int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu,  in intel_vgpu_decode_sprite_plane()  argument
420 	pipe = get_active_pipe(vgpu);  in intel_vgpu_decode_sprite_plane()
424 	val = vgpu_vreg_t(vgpu, SPRCTL(pipe));  in intel_vgpu_decode_sprite_plane()
475 	plane->base = vgpu_vreg_t(vgpu, SPRSURF(pipe)) & I915_GTT_PAGE_MASK;  in intel_vgpu_decode_sprite_plane()
476 	if (!vgpu_gmadr_is_valid(vgpu, plane->base))  in intel_vgpu_decode_sprite_plane()
479 	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);  in intel_vgpu_decode_sprite_plane()
486 	plane->stride = vgpu_vreg_t(vgpu, SPRSTRIDE(pipe)) &  in intel_vgpu_decode_sprite_plane()
489 	val = vgpu_vreg_t(vgpu, SPRSIZE(pipe));  in intel_vgpu_decode_sprite_plane()
497 	val = vgpu_vreg_t(vgpu, SPRPOS(pipe));  in intel_vgpu_decode_sprite_plane()
501 	val = vgpu_vreg_t(vgpu, SPROFFSET(pipe));  in intel_vgpu_decode_sprite_plane()