Lines Matching refs:subslice
1119 unsigned int slice, subslice; in gen9_wa_init_mcr() local
1137 subslice = ffs(intel_sseu_get_hsw_subslices(sseu, slice)); in gen9_wa_init_mcr()
1138 GEM_BUG_ON(!subslice); in gen9_wa_init_mcr()
1139 subslice--; in gen9_wa_init_mcr()
1145 mcr = GEN8_MCR_SLICE(slice) | GEN8_MCR_SUBSLICE(subslice); in gen9_wa_init_mcr()
1148 drm_dbg(&i915->drm, "MCR slice:%d/subslice:%d = %x\n", slice, subslice, mcr); in gen9_wa_init_mcr()
1247 unsigned int slice, unsigned int subslice) in __set_mcr_steering() argument
1251 mcr = GEN11_MCR_SLICE(slice) | GEN11_MCR_SUBSLICE(subslice); in __set_mcr_steering()
1266 unsigned int slice, unsigned int subslice) in __add_mcr_wa() argument
1268 __set_mcr_steering(wal, GEN8_MCR_SELECTOR, slice, subslice); in __add_mcr_wa()
1271 gt->default_steering.instanceid = subslice; in __add_mcr_wa()
1280 unsigned int subslice; in icl_wa_init_mcr() local
1294 subslice = __ffs(intel_sseu_get_hsw_subslices(sseu, 0)); in icl_wa_init_mcr()
1301 if (gt->info.l3bank_mask & BIT(subslice)) in icl_wa_init_mcr()
1304 __add_mcr_wa(gt, wal, 0, subslice); in icl_wa_init_mcr()
1311 unsigned long slice, subslice = 0, slice_mask = 0; in xehp_init_mcr() local
1371 subslice = intel_sseu_find_first_xehp_dss(sseu, GEN_DSS_PER_GSLICE, slice) % in xehp_init_mcr()
1374 __add_mcr_wa(gt, wal, slice, subslice); in xehp_init_mcr()