32  * Lock protecting IPS related data structures
292 			rps->ips.m = cparams[i].m;  in gen5_rps_init()
293 			rps->ips.c = cparams[i].c;  in gen5_rps_init()
314 __ips_chipset_val(struct intel_ips *ips)  in __ips_chipset_val()  argument
317 		rps_to_uncore(container_of(ips, struct intel_rps, ips));  in __ips_chipset_val()
330 	dt = now - ips->last_time1;  in __ips_chipset_val()
332 		return ips->chipset_power;  in __ips_chipset_val()
339 	delta = total - ips->last_count1;  in __ips_chipset_val()
341 	result = div_u64(div_u64(ips->m * delta, dt) + ips->c, 10);  in __ips_chipset_val()
343 	ips->last_count1 = total;  in __ips_chipset_val()
344 	ips->last_time1 = now;  in __ips_chipset_val()
346 	ips->chipset_power = result;  in __ips_chipset_val()
386 static void __gen5_ips_update(struct intel_ips *ips)  in __gen5_ips_update()  argument
389 		rps_to_uncore(container_of(ips, struct intel_rps, ips));  in __gen5_ips_update()
396 	dt = now - ips->last_time2;  in __gen5_ips_update()
404 	delta = count - ips->last_count2;  in __gen5_ips_update()
406 	ips->last_count2 = count;  in __gen5_ips_update()
407 	ips->last_time2 = now;  in __gen5_ips_update()
410 	ips->gfx_power = div_u64(delta * 1181, dt * 10);  in __gen5_ips_update()
416 	__gen5_ips_update(&rps->ips);  in gen5_rps_update()
423 	/* Invert the frequency bin into an ips delay */  in gen5_invert_freq()
444 	/* Invert the frequency bin into an ips delay */  in __gen5_rps_set()
601 	rps->ips.last_count1 = intel_uncore_read(uncore, DMIEC);  in gen5_rps_enable()
602 	rps->ips.last_count1 += intel_uncore_read(uncore, DDREC);  in gen5_rps_enable()
603 	rps->ips.last_count1 += intel_uncore_read(uncore, CSIEC);  in gen5_rps_enable()
604 	rps->ips.last_time1 = jiffies_to_msecs(jiffies);  in gen5_rps_enable()
606 	rps->ips.last_count2 = intel_uncore_read(uncore, GFXEC);  in gen5_rps_enable()
607 	rps->ips.last_time2 = ktime_get_raw_ns();  in gen5_rps_enable()
615 	rps->ips.corr = init_emon(uncore);  in gen5_rps_enable()
1476 static unsigned long __ips_gfx_val(struct intel_ips *ips)  in __ips_gfx_val()  argument
1478 	struct intel_rps *rps = container_of(ips, typeof(*rps), ips);  in __ips_gfx_val()
1504 	corr2 = div_u64(corr, 100000) * ips->corr;  in __ips_gfx_val()
1509 	__gen5_ips_update(ips);  in __ips_gfx_val()
1511 	return ips->gfx_power + state2;  in __ips_gfx_val()
2716  * IPS got loaded first.
2719  * other in order for IPS to do the appropriate communication of
2739 	 * We only register the i915 ips part with intel-ips once everything is  in intel_rps_driver_register()
2740 	 * set up, to avoid intel-ips sneaking in and reading bogus values.  in intel_rps_driver_register()
2769  * i915_read_mch_val - return value for IPS use
2771  * Calculate and return a value for the IPS driver to use when deciding whether
2786 		struct intel_ips *ips = &to_gt(i915)->rps.ips;  in i915_read_mch_val()  local
2789 		chipset_val = __ips_chipset_val(ips);  in i915_read_mch_val()
2790 		graphics_val = __ips_gfx_val(ips);  in i915_read_mch_val()
2802  * Raise the limit; IPS indicates we have thermal headroom.
2828  * IPS indicates we're close to a thermal limit, so throttle back the GPU
2853  * i915_gpu_busy - indicate GPU business to IPS
2855  * Tell the IPS driver whether or not the GPU is busy.