66 	enum plane_id plane_id = plane->id;  in chv_sprite_update_csc()  local
97 	intel_de_write_fw(dev_priv, SPCSCYGOFF(plane_id),  in chv_sprite_update_csc()
99 	intel_de_write_fw(dev_priv, SPCSCCBOFF(plane_id),  in chv_sprite_update_csc()
101 	intel_de_write_fw(dev_priv, SPCSCCROFF(plane_id),  in chv_sprite_update_csc()
104 	intel_de_write_fw(dev_priv, SPCSCC01(plane_id),  in chv_sprite_update_csc()
106 	intel_de_write_fw(dev_priv, SPCSCC23(plane_id),  in chv_sprite_update_csc()
108 	intel_de_write_fw(dev_priv, SPCSCC45(plane_id),  in chv_sprite_update_csc()
110 	intel_de_write_fw(dev_priv, SPCSCC67(plane_id),  in chv_sprite_update_csc()
112 	intel_de_write_fw(dev_priv, SPCSCC8(plane_id), SPCSC_C0(csc[8]));  in chv_sprite_update_csc()
114 	intel_de_write_fw(dev_priv, SPCSCYGICLAMP(plane_id),  in chv_sprite_update_csc()
116 	intel_de_write_fw(dev_priv, SPCSCCBICLAMP(plane_id),  in chv_sprite_update_csc()
118 	intel_de_write_fw(dev_priv, SPCSCCRICLAMP(plane_id),  in chv_sprite_update_csc()
121 	intel_de_write_fw(dev_priv, SPCSCYGOCLAMP(plane_id),  in chv_sprite_update_csc()
123 	intel_de_write_fw(dev_priv, SPCSCCBOCLAMP(plane_id),  in chv_sprite_update_csc()
125 	intel_de_write_fw(dev_priv, SPCSCCROCLAMP(plane_id),  in chv_sprite_update_csc()
139 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_clrc()  local
165 	intel_de_write_fw(dev_priv, SPCLRC0(pipe, plane_id),  in vlv_sprite_update_clrc()
167 	intel_de_write_fw(dev_priv, SPCLRC1(pipe, plane_id),  in vlv_sprite_update_clrc()
342 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_gamma()  local
355 		intel_de_write_fw(dev_priv, SPGAMC(pipe, plane_id, i - 1),  in vlv_sprite_update_gamma()
366 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_noarm()  local
372 	intel_de_write_fw(dev_priv, SPSTRIDE(pipe, plane_id),  in vlv_sprite_update_noarm()
374 	intel_de_write_fw(dev_priv, SPPOS(pipe, plane_id),  in vlv_sprite_update_noarm()
376 	intel_de_write_fw(dev_priv, SPSIZE(pipe, plane_id),  in vlv_sprite_update_noarm()
387 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_arm()  local
402 		intel_de_write_fw(dev_priv, SPKEYMINVAL(pipe, plane_id),  in vlv_sprite_update_arm()
404 		intel_de_write_fw(dev_priv, SPKEYMSK(pipe, plane_id),  in vlv_sprite_update_arm()
406 		intel_de_write_fw(dev_priv, SPKEYMAXVAL(pipe, plane_id),  in vlv_sprite_update_arm()
410 	intel_de_write_fw(dev_priv, SPCONSTALPHA(pipe, plane_id), 0);  in vlv_sprite_update_arm()
412 	intel_de_write_fw(dev_priv, SPLINOFF(pipe, plane_id), linear_offset);  in vlv_sprite_update_arm()
413 	intel_de_write_fw(dev_priv, SPTILEOFF(pipe, plane_id),  in vlv_sprite_update_arm()
421 	intel_de_write_fw(dev_priv, SPCNTR(pipe, plane_id), sprctl);  in vlv_sprite_update_arm()
422 	intel_de_write_fw(dev_priv, SPSURF(pipe, plane_id),  in vlv_sprite_update_arm()
435 	enum plane_id plane_id = plane->id;  in vlv_sprite_disable_arm()  local
437 	intel_de_write_fw(dev_priv, SPCNTR(pipe, plane_id), 0);  in vlv_sprite_disable_arm()
438 	intel_de_write_fw(dev_priv, SPSURF(pipe, plane_id), 0);  in vlv_sprite_disable_arm()
447 	enum plane_id plane_id = plane->id;  in vlv_sprite_get_hw_state()  local
456 	ret = intel_de_read(dev_priv, SPCNTR(plane->pipe, plane_id)) & SP_ENABLE;  in vlv_sprite_get_hw_state()